From 5a403079bcbe888638417dbe7aa77723b265f94e Mon Sep 17 00:00:00 2001 From: travisutk Date: Tue, 27 Mar 2012 21:12:20 +0000 Subject: [PATCH] Created z1 platform; radio seems to work. git-svn-id: https://svn.code.sf.net/p/goodfet/code/trunk@1110 12e2690d-a6be-4b82-a7b7-67c4a43b65c8 --- firmware/config.mk | 4 +- firmware/platforms/z1.h | 97 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 99 insertions(+), 2 deletions(-) diff --git a/firmware/config.mk b/firmware/config.mk index 79672b6..e033aaf 100644 --- a/firmware/config.mk +++ b/firmware/config.mk @@ -30,8 +30,8 @@ endif ifeq ($(board),z1) mcu ?= msp430f2618 -platform := goodfet -CONFIG_ccspi = y +platform := z1 +config = monitor spi ccspi MSP430BSL?=goodfet.bsl --z1 --speed=38400 endif diff --git a/firmware/platforms/z1.h b/firmware/platforms/z1.h index 8b13789..8fb2857 100644 --- a/firmware/platforms/z1.h +++ b/firmware/platforms/z1.h @@ -1 +1,98 @@ +/*! \file telosb.h + \author Travis Goodspeed + \brief Port descriptions for the TelosB platform. + + This file defines the Telos B hardware, so that the GoodFET firmware + may be loaded onto it. Adjustments include the !CS line of the CC2420 + radio, the choice of serial port, and the LEDs. + +*/ + +#ifndef _GNU_ASSEMBLER_ +#include +#endif + +//LED on P5.4 (LED1 red) +#define PLEDOUT P5OUT +#define PLEDDIR P5DIR +#define PLEDPIN BIT4 +//LED on P5.5 (LED2 green) +#define PLED2OUT P5OUT +#define PLED2DIR P5DIR +#define PLED2PIN BIT5 +//LED on P5.6 (LED3 blue) +#define PLED3OUT P5OUT +#define PLED3DIR P5DIR +#define PLED3PIN BIT6 + + +#define SPIOUT P3OUT +#define SPIDIR P3DIR +#define SPIIN P3IN +#define SPIREN P3REN + + +/* For the radio to be used: + 4.6 (!RST) must be low + 4.5 (VREF_EN) must be high + 4.2 (!CS) must be low for the transaction. +*/ + +#define INITPLATFORM \ + P1DIR = 0xe0;\ + P1OUT = 0x00;\ + P2DIR = 0x7b;\ + P2OUT = 0x10;\ + P3DIR = 0xf1;\ + P3OUT = 0x00;\ + P4DIR = 0xfd;\ + P4OUT = 0xFd;\ + P5DIR = 0xff;\ + P5OUT = 0xff;\ + P6DIR = 0xff;\ + P6OUT = 0x00; + +//Radio CS is P4.2 +#define SETSS P4OUT|=BIT2 +#define CLRSS P4OUT&=~BIT2 +#define DIRSS P4DIR|=BIT2 + +//Flash CS is P4.4, redefine only for the SPI app. +#ifdef SPIAPPLICATION +#undef SETSS +#undef CLRSS +#undef DIRSS +#define SETSS P4OUT|=BIT4 +#define CLRSS P4OUT&=~BIT4 +#define DIRSS P4DIR|=BIT4 +#endif + +//CC2420 Chip Enable +#define SETCE P4OUT|=BIT6 +#define CLRCE P4OUT&=~BIT6 +#define DIRCE P4DIR|=BIT6 + +//CC2420 signals +#define SFD (P4IN&BIT1) +#define FIFOP (P1IN&BIT0) +#define FIFO (P1IN&BIT3) + +//GPIO Expansion Pins +#define GIO0 (P2OUT&BIT0) +#define GIO0HIGH P2OUT|=BIT0 +#define GIO0LOW P2OUT&=~BIT0 +#define GIO0OUT P2OUT +#define GIO0DIR P2DIR +#define GIO0PIN BIT0 + +// network byte order converters +#define htons(x) ((((uint16_t)(x) & 0xFF00) >> 8) | \ + (((uint16_t)(x) & 0x00FF) << 8)) +#define htonl(x) ((((uint32_t)(x) & 0xFF000000) >> 24) | \ + (((uint32_t)(x) & 0x00FF0000) >> 8) | \ + (((uint32_t)(x) & 0x0000FF00) << 8) | \ + (((uint32_t)(x) & 0x000000FF) << 24)) + +#define ntohs htons +#define ntohl htonl -- 2.20.1