git.rot13.org Git - linux/blob - arch/arm/boot/dts/tegra20-ventana.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include "tegra20.dtsi"
   6
   7 / {
   8         model = "NVIDIA Tegra20 Ventana evaluation board";
   9         compatible = "nvidia,ventana", "nvidia,tegra20";
  10
  11         aliases {
  12                 rtc0 = "/i2c@7000d000/tps6586x@34";
  13                 rtc1 = "/rtc@7000e000";
  14                 serial0 = &uartd;
  15         };
  16
  17         chosen {
  18                 stdout-path = "serial0:115200n8";
  19                 bootargs = "mem=1024M@0M usbcore.old_scheme_first=1";
  20         };
  21
  22         memory@0 {
  23                 reg = <0x00000000 0x40000000>;
  24         };
  25
  26         host1x@50000000 {
  27                 dc@54200000 {
  28                         rgb {
  29                                 status = "okay";
  30
  31                                 nvidia,panel = <&panel>;
  32
  33                                 display-timings {
  34                                         timing@0 {
  35                                                 /* XXX tegra_dc_mode ventana_panel_modes -- works for u-boot */
  36                                                 clock-frequency = <72072000>;
  37                                                 hactive = <1280>;
  38                                                 vactive = <800>;
  39                                                 hback-porch = <72>;
  40                                                 hfront-porch = <48>;
  41                                                 hsync-len = <32>;
  42                                                 vback-porch = <22>;
  43                                                 vfront-porch = <3>;
  44                                                 vsync-len = <7>;
  45                                                 hsync-active = <1>;
  46                                         };
  47                                 };
  48                         };
  49                 };
  50
  51                 hdmi@54280000 {
  52                         status = "okay";
  53
  54                         vdd-supply = <&hdmi_vdd_reg>;
  55                         pll-supply = <&hdmi_pll_reg>;
  56
  57                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  58                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  59                                 GPIO_ACTIVE_HIGH>;
  60                 };
  61         };
  62
  63         pinmux@70000014 {
  64                 pinctrl-names = "default";
  65                 pinctrl-0 = <&state_default>;
  66
  67                 state_default: pinmux {
  68                         ata {
  69                                 nvidia,pins = "ata";
  70                                 nvidia,function = "ide";
  71                         };
  72                         atb {
  73                                 nvidia,pins = "atb", "gma", "gme";
  74                                 nvidia,function = "sdio4";
  75                         };
  76                         atc {
  77                                 nvidia,pins = "atc";
  78                                 nvidia,function = "nand";
  79                         };
  80                         atd {
  81                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  82                                         "spib", "spic";
  83                                 nvidia,function = "gmi";
  84                         };
  85                         cdev1 {
  86                                 nvidia,pins = "cdev1";
  87                                 nvidia,function = "plla_out";
  88                         };
  89                         cdev2 {
  90                                 nvidia,pins = "cdev2";
  91                                 nvidia,function = "pllp_out4";
  92                         };
  93                         crtp {
  94                                 nvidia,pins = "crtp", "lm1";
  95                                 nvidia,function = "crt";
  96                         };
  97                         csus {
  98                                 nvidia,pins = "csus";
  99                                 nvidia,function = "vi_sensor_clk";
 100                         };
 101                         dap1 {
 102                                 nvidia,pins = "dap1";
 103                                 nvidia,function = "dap1";
 104                         };
 105                         dap2 {
 106                                 nvidia,pins = "dap2";
 107                                 nvidia,function = "dap2";
 108                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 109                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 110                         };
 111                         dap3 {
 112                                 nvidia,pins = "dap3";
 113                                 nvidia,function = "dap3";
 114                         };
 115                         dap4 {
 116                                 nvidia,pins = "dap4";
 117                                 nvidia,function = "dap4";
 118                         };
 119                         dta {
 120                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 121                                 nvidia,function = "vi";
 122                         };
 123                         dtf {
 124                                 nvidia,pins = "dtf";
 125                                 nvidia,function = "i2c3";
 126                         };
 127                         gmc {
 128                                 nvidia,pins = "gmc";
 129                                 nvidia,function = "uartd";
 130                         };
 131                         gmd {
 132                                 nvidia,pins = "gmd";
 133                                 nvidia,function = "sflash";
 134                         };
 135                         gpu {
 136                                 nvidia,pins = "gpu";
 137                                 nvidia,function = "pwm";
 138                         };
 139                         gpu7 {
 140                                 nvidia,pins = "gpu7";
 141                                 nvidia,function = "rtck";
 142                         };
 143                         gpv {
 144                                 nvidia,pins = "gpv", "slxa", "slxk";
 145                                 nvidia,function = "pcie";
 146                         };
 147                         hdint {
 148                                 nvidia,pins = "hdint";
 149                                 nvidia,function = "hdmi";
 150                         };
 151                         i2cp {
 152                                 nvidia,pins = "i2cp";
 153                                 nvidia,function = "i2cp";
 154                         };
 155                         irrx {
 156                                 nvidia,pins = "irrx", "irtx";
 157                                 nvidia,function = "uartb";
 158                         };
 159                         kbca {
 160                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 161                                         "kbcf";
 162                                 nvidia,function = "kbc";
 163                         };
 164                         kbce {
 165                                 nvidia,pins = "kbce";
 166                                 nvidia,function = "kbc";
 167                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 168                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 169                         };
 170                         lcsn {
 171                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 172                                         "lsdi", "lvp0";
 173                                 nvidia,function = "rsvd4";
 174                         };
 175                         ld0 {
 176                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 177                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 178                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 179                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 180                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
 181                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
 182                                         "lspi", "lvp1", "lvs";
 183                                 nvidia,function = "displaya";
 184                         };
 185                         owc {
 186                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 187                                 nvidia,function = "rsvd2";
 188                         };
 189                         pmc {
 190                                 nvidia,pins = "pmc";
 191                                 nvidia,function = "pwr_on";
 192                         };
 193                         rm {
 194                                 nvidia,pins = "rm";
 195                                 nvidia,function = "i2c1";
 196                         };
 197                         sdb {
 198                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
 199                                 nvidia,function = "sdio3";
 200                         };
 201                         sdio1 {
 202                                 nvidia,pins = "sdio1";
 203                                 nvidia,function = "sdio1";
 204                         };
 205                         slxd {
 206                                 nvidia,pins = "slxd";
 207                                 nvidia,function = "spdif";
 208                         };
 209                         spid {
 210                                 nvidia,pins = "spid", "spif";
 211                                 nvidia,function = "spi1";
 212                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 213                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 214                         };
 215                         spie {
 216                                 nvidia,pins = "spie";
 217                                 nvidia,function = "spi1";
 218                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 219                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 220                         };
 221                         spig {
 222                                 nvidia,pins = "spig", "spih";
 223                                 nvidia,function = "spi2_alt";
 224                         };
 225                         uaa {
 226                                 nvidia,pins = "uaa", "uab", "uda";
 227                                 nvidia,function = "ulpi";
 228                         };
 229                         uad {
 230                                 nvidia,pins = "uad";
 231                                 nvidia,function = "irda";
 232                         };
 233                         uca {
 234                                 nvidia,pins = "uca", "ucb";
 235                                 nvidia,function = "uartc";
 236                         };
 237                         conf_ata {
 238                                 nvidia,pins = "ata", "atb", "atc", "atd",
 239                                         "cdev1", "cdev2", "dap1", "dap2",
 240                                         "dap4", "ddc", "dtf", "gma", "gmc",
 241                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 242                                         "irtx", "pta", "rm", "sdc", "sdd",
 243                                         "slxc", "slxd", "slxk", "spdi", "spdo",
 244                                         "uac", "uad", "uca", "ucb", "uda";
 245                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 246                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 247                         };
 248                         conf_ate {
 249                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
 250                                         "gpv", "owc", "spia", "spib", "spic",
 251                                         "spid", "spie", "spig";
 252                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 253                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 254                         };
 255                         conf_ck32 {
 256                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 257                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 258                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 259                         };
 260                         conf_crtp {
 261                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
 262                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 264                         };
 265                         conf_dta {
 266                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 267                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 268                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 269                         };
 270                         conf_dte {
 271                                 nvidia,pins = "dte", "spif";
 272                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 273                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 274                         };
 275                         conf_hdint {
 276                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 277                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
 278                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 279                         };
 280                         conf_kbca {
 281                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 282                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
 283                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 284                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 285                         };
 286                         conf_lc {
 287                                 nvidia,pins = "lc", "ls";
 288                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 289                         };
 290                         conf_ld0 {
 291                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 292                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 293                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 294                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 295                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 296                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 297                                         "lvp1", "lvs", "pmc", "sdb";
 298                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 299                         };
 300                         conf_ld17_0 {
 301                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 302                                         "ld23_22";
 303                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 304                         };
 305                         drive_sdio1 {
 306                                 nvidia,pins = "drive_sdio1";
 307                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 308                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 309                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 310                                 nvidia,pull-down-strength = <31>;
 311                                 nvidia,pull-up-strength = <31>;
 312                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 313                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 314                         };
 315                 };
 316
 317                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 318                         ddc {
 319                                 nvidia,pins = "ddc";
 320                                 nvidia,function = "i2c2";
 321                         };
 322                         pta {
 323                                 nvidia,pins = "pta";
 324                                 nvidia,function = "rsvd4";
 325                         };
 326                 };
 327
 328                 state_i2cmux_pta: pinmux_i2cmux_pta {
 329                         ddc {
 330                                 nvidia,pins = "ddc";
 331                                 nvidia,function = "rsvd4";
 332                         };
 333                         pta {
 334                                 nvidia,pins = "pta";
 335                                 nvidia,function = "i2c2";
 336                         };
 337                 };
 338
 339                 state_i2cmux_idle: pinmux_i2cmux_idle {
 340                         ddc {
 341                                 nvidia,pins = "ddc";
 342                                 nvidia,function = "rsvd4";
 343                         };
 344                         pta {
 345                                 nvidia,pins = "pta";
 346                                 nvidia,function = "rsvd4";
 347                         };
 348                 };
 349         };
 350
 351         i2s@70002800 {
 352                 status = "okay";
 353         };
 354
 355         serial@70006300 {
 356                 status = "okay";
 357         };
 358
 359         pwm: pwm@7000a000 {
 360                 status = "okay";
 361         };
 362
 363         i2c@7000c000 {
 364                 status = "okay";
 365                 clock-frequency = <400000>;
 366
 367                 wm8903: wm8903@1a {
 368                         compatible = "wlf,wm8903";
 369                         reg = <0x1a>;
 370                         interrupt-parent = <&gpio>;
 371                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 372
 373                         gpio-controller;
 374                         #gpio-cells = <2>;
 375
 376                         micdet-cfg = <0>;
 377                         micdet-delay = <100>;
 378                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 379                 };
 380
 381                 /* ALS and proximity sensor */
 382                 isl29018@44 {
 383                         compatible = "isil,isl29018";
 384                         reg = <0x44>;
 385                         interrupt-parent = <&gpio>;
 386                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
 387                 };
 388         };
 389
 390         i2c@7000c400 { /* i2c2 */
 391                 status = "okay";
 392                 clock-frequency = <100000>;
 393         };
 394
 395         i2cmux {
 396                 compatible = "i2c-mux-pinctrl";
 397                 #address-cells = <1>;
 398                 #size-cells = <0>;
 399
 400                 i2c-parent = <&{/i2c@7000c400}>;
 401
 402                 pinctrl-names = "ddc", "pta", "idle";
 403                 pinctrl-0 = <&state_i2cmux_ddc>;
 404                 pinctrl-1 = <&state_i2cmux_pta>;
 405                 pinctrl-2 = <&state_i2cmux_idle>;
 406
 407                 hdmi_ddc: i2c@0 {
 408                         reg = <0>;
 409                         #address-cells = <1>;
 410                         #size-cells = <0>;
 411                 };
 412
 413                 lvds_ddc: i2c@1 {
 414                         reg = <1>;
 415                         #address-cells = <1>;
 416                         #size-cells = <0>;
 417                 };
 418         };
 419
 420         i2c@7000c500 { /* i2c3 */
 421                 status = "okay";
 422                 clock-frequency = <100000>; /* 400000 */
 423         };
 424
 425         i2c@7000d000 { /* DVC according to Tegra2 TRM */
 426                 status = "okay";
 427                 clock-frequency = <400000>;
 428
 429                 pmic: tps6586x@34 {
 430                         compatible = "ti,tps6586x";
 431                         reg = <0x34>;
 432                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 433
 434                         ti,system-power-controller;
 435
 436                         #gpio-cells = <2>;
 437                         gpio-controller;
 438
 439                         sys-supply = <&vdd_5v0_reg>;
 440                         vin-sm0-supply = <&sys_reg>;
 441                         vin-sm1-supply = <&sys_reg>;
 442                         vin-sm2-supply = <&sys_reg>;
 443                         vinldo01-supply = <&sm2_reg>;
 444                         vinldo23-supply = <&sm2_reg>;
 445                         vinldo4-supply = <&sm2_reg>;
 446                         vinldo678-supply = <&sm2_reg>;
 447                         vinldo9-supply = <&sm2_reg>;
 448
 449                         regulators {
 450                                 sys_reg: sys {
 451                                         regulator-name = "vdd_sys";
 452                                         regulator-always-on;
 453                                 };
 454
 455                                 core_vdd_reg: sm0 {
 456                                         regulator-name = "vdd_sm0,vdd_core";
 457                                         regulator-min-microvolt = <1200000>;
 458                                         regulator-max-microvolt = <1300000>;
 459                                         regulator-coupled-with = <&rtc_vdd_reg>;
 460                                         regulator-coupled-max-spread = <150000>;
 461                                         regulator-always-on;
 462                                 };
 463
 464                                 cpu_vdd_reg: sm1 {
 465                                         regulator-name = "vdd_sm1,vdd_cpu";
 466                                         regulator-min-microvolt = <750000>;
 467                                         regulator-max-microvolt = <1125000>;
 468                                         regulator-always-on;
 469                                 };
 470
 471                                 sm2_reg: sm2 {
 472                                         regulator-name = "vdd_sm2,vin_ldo*";
 473                                         regulator-min-microvolt = <3700000>;
 474                                         regulator-max-microvolt = <3700000>;
 475                                         regulator-always-on;
 476                                 };
 477
 478                                 /* LDO0 is not connected to anything */
 479
 480                                 ldo1 {
 481                                         regulator-name = "vdd_ldo1,avdd_pll*";
 482                                         regulator-min-microvolt = <1100000>;
 483                                         regulator-max-microvolt = <1100000>;
 484                                         regulator-always-on;
 485                                 };
 486
 487                                 rtc_vdd_reg: ldo2 {
 488                                         regulator-name = "vdd_ldo2,vdd_rtc";
 489                                         regulator-min-microvolt = <1200000>;
 490                                         regulator-max-microvolt = <1300000>;
 491                                         regulator-coupled-with = <&core_vdd_reg>;
 492                                         regulator-coupled-max-spread = <150000>;
 493                                         regulator-always-on;
 494                                 };
 495
 496                                 ldo3 {
 497                                         regulator-name = "vdd_ldo3,avdd_usb*";
 498                                         regulator-min-microvolt = <3300000>;
 499                                         regulator-max-microvolt = <3300000>;
 500                                         regulator-always-on;
 501                                 };
 502
 503                                 ldo4 {
 504                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 505                                         regulator-min-microvolt = <1800000>;
 506                                         regulator-max-microvolt = <1800000>;
 507                                         regulator-always-on;
 508                                 };
 509
 510                                 ldo5 {
 511                                         regulator-name = "vdd_ldo5,vcore_mmc";
 512                                         regulator-min-microvolt = <2850000>;
 513                                         regulator-max-microvolt = <2850000>;
 514                                         regulator-always-on;
 515                                 };
 516
 517                                 ldo6 {
 518                                         regulator-name = "vdd_ldo6,avdd_vdac";
 519                                         regulator-min-microvolt = <1800000>;
 520                                         regulator-max-microvolt = <1800000>;
 521                                 };
 522
 523                                 hdmi_vdd_reg: ldo7 {
 524                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 525                                         regulator-min-microvolt = <3300000>;
 526                                         regulator-max-microvolt = <3300000>;
 527                                 };
 528
 529                                 hdmi_pll_reg: ldo8 {
 530                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 531                                         regulator-min-microvolt = <1800000>;
 532                                         regulator-max-microvolt = <1800000>;
 533                                 };
 534
 535                                 ldo9 {
 536                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 537                                         regulator-min-microvolt = <2850000>;
 538                                         regulator-max-microvolt = <2850000>;
 539                                         regulator-always-on;
 540                                 };
 541
 542                                 ldo_rtc {
 543                                         regulator-name = "vdd_rtc_out,vdd_cell";
 544                                         regulator-min-microvolt = <3300000>;
 545                                         regulator-max-microvolt = <3300000>;
 546                                         regulator-always-on;
 547                                 };
 548                         };
 549                 };
 550
 551                 temperature-sensor@4c {
 552                         compatible = "onnn,nct1008";
 553                         reg = <0x4c>;
 554                 };
 555         };
 556
 557         pmc@7000e400 {
 558                 nvidia,invert-interrupt;
 559                 nvidia,suspend-mode = <1>;
 560                 nvidia,cpu-pwr-good-time = <2000>;
 561                 nvidia,cpu-pwr-off-time = <100>;
 562                 nvidia,core-pwr-good-time = <3845 3845>;
 563                 nvidia,core-pwr-off-time = <458>;
 564                 nvidia,sys-clock-req-active-high;
 565         };
 566
 567         usb@c5000000 {
 568                 status = "okay";
 569         };
 570
 571         usb-phy@c5000000 {
 572                 status = "okay";
 573         };
 574
 575         usb@c5004000 {
 576                 status = "okay";
 577                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 578                         GPIO_ACTIVE_LOW>;
 579         };
 580
 581         usb-phy@c5004000 {
 582                 status = "okay";
 583                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 584                         GPIO_ACTIVE_LOW>;
 585         };
 586
 587         usb@c5008000 {
 588                 status = "okay";
 589         };
 590
 591         usb-phy@c5008000 {
 592                 status = "okay";
 593         };
 594
 595         sdhci@c8000000 {
 596                 status = "okay";
 597                 bus-width = <8>;
 598                 keep-power-in-suspend;
 599         };
 600
 601         sdhci@c8000400 {
 602                 status = "okay";
 603                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 604                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 605                 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 606                 bus-width = <4>;
 607         };
 608
 609         sdhci@c8000600 {
 610                 status = "okay";
 611                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 612                 bus-width = <8>;
 613                 non-removable;
 614         };
 615
 616         backlight: backlight {
 617                 compatible = "pwm-backlight";
 618
 619                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 620                 power-supply = <&vdd_bl_reg>;
 621                 pwms = <&pwm 2 5000000>;
 622
 623                 brightness-levels = <0 4 8 16 32 64 128 255>;
 624                 default-brightness-level = <6>;
 625         };
 626
 627         clocks {
 628                 compatible = "simple-bus";
 629                 #address-cells = <1>;
 630                 #size-cells = <0>;
 631
 632                 clk32k_in: clock@0 {
 633                         compatible = "fixed-clock";
 634                         reg = <0>;
 635                         #clock-cells = <0>;
 636                         clock-frequency = <32768>;
 637                 };
 638         };
 639
 640         gpio-keys {
 641                 compatible = "gpio-keys";
 642
 643                 power {
 644                         label = "Power";
 645                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 646                         linux,code = <KEY_POWER>;
 647                         wakeup-source;
 648                 };
 649         };
 650
 651         panel: panel {
 652                 compatible = "simple-panel";
 653
 654                 power-supply = <&vdd_pnl_reg>;
 655                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 656
 657                 backlight = <&backlight>;
 658                 ddc-i2c-bus = <&lvds_ddc>;
 659
 660         };
 661
 662         regulators {
 663                 compatible = "simple-bus";
 664                 #address-cells = <1>;
 665                 #size-cells = <0>;
 666
 667                 vdd_5v0_reg: regulator@0 {
 668                         compatible = "regulator-fixed";
 669                         reg = <0>;
 670                         regulator-name = "vdd_5v0";
 671                         regulator-min-microvolt = <5000000>;
 672                         regulator-max-microvolt = <5000000>;
 673                         regulator-always-on;
 674                 };
 675
 676                 regulator@1 {
 677                         compatible = "regulator-fixed";
 678                         reg = <1>;
 679                         regulator-name = "vdd_1v5";
 680                         regulator-min-microvolt = <1500000>;
 681                         regulator-max-microvolt = <1500000>;
 682                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 683                 };
 684
 685                 regulator@2 {
 686                         compatible = "regulator-fixed";
 687                         reg = <2>;
 688                         regulator-name = "vdd_1v2";
 689                         regulator-min-microvolt = <1200000>;
 690                         regulator-max-microvolt = <1200000>;
 691                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 692                         enable-active-high;
 693                 };
 694
 695                 vdd_pnl_reg: regulator@3 {
 696                         compatible = "regulator-fixed";
 697                         reg = <3>;
 698                         regulator-name = "vdd_pnl";
 699                         regulator-min-microvolt = <2800000>;
 700                         regulator-max-microvolt = <2800000>;
 701                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 702                         enable-active-high;
 703                 };
 704
 705                 vdd_bl_reg: regulator@4 {
 706                         compatible = "regulator-fixed";
 707                         reg = <4>;
 708                         regulator-name = "vdd_bl";
 709                         regulator-min-microvolt = <2800000>;
 710                         regulator-max-microvolt = <2800000>;
 711                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 712                         enable-active-high;
 713                 };
 714         };
 715
 716         sound {
 717                 compatible = "nvidia,tegra-audio-wm8903-ventana",
 718                              "nvidia,tegra-audio-wm8903";
 719                 nvidia,model = "NVIDIA Tegra Ventana";
 720
 721                 nvidia,audio-routing =
 722                         "Headphone Jack", "HPOUTR",
 723                         "Headphone Jack", "HPOUTL",
 724                         "Int Spk", "ROP",
 725                         "Int Spk", "RON",
 726                         "Int Spk", "LOP",
 727                         "Int Spk", "LON",
 728                         "Mic Jack", "MICBIAS",
 729                         "IN1L", "Mic Jack";
 730
 731                 nvidia,i2s-controller = <&tegra_i2s1>;
 732                 nvidia,audio-codec = <&wm8903>;
 733
 734                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 735                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; /* ok */
 736 /*
 737                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
 738                         GPIO_ACTIVE_HIGH>;
 739 */
 740                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(W, 3) /* fixed */
 741                         GPIO_ACTIVE_HIGH>;
 742
 743                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 744                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 745                          <&tegra_car TEGRA20_CLK_CDEV1>;
 746                 clock-names = "pll_a", "pll_a_out0", "mclk";
 747         };
 748
 749         cpus {
 750                 cpu0: cpu@0 {
 751                         cpu-supply = <&cpu_vdd_reg>;
 752                         core-supply = <&core_vdd_reg>;
 753                         rtc-supply = <&rtc_vdd_reg>;
 754                 };
 755         };
 756 };