git.rot13.org Git - linux/blob - arch/arm/boot/dts/tegra20-ventana.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /dts-v1/;
   3
   4 #include <dt-bindings/input/input.h>
   5 #include "tegra20.dtsi"
   6
   7 / {
   8         model = "Thinkpad Tablet paz00";
   9         compatible = "nvidia,ventana", "nvidia,tegra20";
  10
  11         aliases {
  12                 rtc0 = "/i2c@7000d000/tps6586x@34";
  13                 rtc1 = "/rtc@7000e000";
  14                 serial0 = &uartd;
  15         };
  16
  17         chosen {
  18                 stdout-path = "serial0:115200n8";
  19                 bootargs = "mem=1024M@0M usbcore.old_scheme_first=1";
  20         };
  21
  22         memory@0 {
  23                 reg = <0x00000000 0x40000000>;
  24         };
  25
  26         host1x@50000000 {
  27                 dc@54200000 {
  28                         rgb {
  29                                 status = "okay";
  30
  31                                 nvidia,panel = <&panel>;
  32
  33                         };
  34                 };
  35
  36                 hdmi@54280000 {
  37                         status = "okay";
  38
  39                         vdd-supply = <&hdmi_vdd_reg>;
  40                         pll-supply = <&hdmi_pll_reg>;
  41
  42                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  43                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  44                                 GPIO_ACTIVE_HIGH>;
  45                 };
  46         };
  47
  48         pinmux@70000014 {
  49                 pinctrl-names = "default";
  50                 pinctrl-0 = <&state_default>;
  51
  52                 state_default: pinmux {
  53                         ata {
  54                                 nvidia,pins = "ata";
  55                                 nvidia,function = "ide";
  56                         };
  57                         atb {
  58                                 nvidia,pins = "atb", "gma", "gme";
  59                                 nvidia,function = "sdio4";
  60                         };
  61                         atc {
  62                                 nvidia,pins = "atc";
  63                                 nvidia,function = "nand";
  64                         };
  65                         atd {
  66                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  67                                         "spib", "spic";
  68                                 nvidia,function = "gmi";
  69                         };
  70                         cdev1 {
  71                                 nvidia,pins = "cdev1";
  72                                 nvidia,function = "plla_out";
  73                         };
  74                         cdev2 {
  75                                 nvidia,pins = "cdev2";
  76                                 nvidia,function = "pllp_out4";
  77                         };
  78                         crtp {
  79                                 nvidia,pins = "crtp", "lm1";
  80                                 nvidia,function = "crt";
  81                         };
  82                         csus {
  83                                 nvidia,pins = "csus";
  84                                 nvidia,function = "vi_sensor_clk";
  85                         };
  86                         dap1 {
  87                                 nvidia,pins = "dap1";
  88                                 nvidia,function = "dap1";
  89                         };
  90                         dap2 { /* touch */
  91                                 nvidia,pins = "dap2";
  92                                 nvidia,function = "dap2";
  93                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
  94                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
  95                         };
  96                         dap3 {
  97                                 nvidia,pins = "dap3";
  98                                 nvidia,function = "dap3";
  99                         };
 100                         dap4 {
 101                                 nvidia,pins = "dap4";
 102                                 nvidia,function = "dap4";
 103                         };
 104                         dta {
 105                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
 106                                 nvidia,function = "vi";
 107                         };
 108                         dtf {
 109                                 nvidia,pins = "dtf";
 110                                 nvidia,function = "i2c3";
 111                         };
 112                         gmc {
 113                                 nvidia,pins = "gmc";
 114                                 nvidia,function = "uartd";
 115                         };
 116                         gmd {
 117                                 nvidia,pins = "gmd";
 118                                 nvidia,function = "sflash";
 119                         };
 120                         gpu {
 121                                 nvidia,pins = "gpu";
 122                                 nvidia,function = "pwm";
 123                         };
 124                         gpu7 {
 125                                 nvidia,pins = "gpu7";
 126                                 nvidia,function = "rtck";
 127                         };
 128                         gpv {
 129                                 nvidia,pins = "gpv", "slxa", "slxk";
 130                                 nvidia,function = "pcie";
 131                         };
 132                         hdint {
 133                                 nvidia,pins = "hdint";
 134                                 nvidia,function = "hdmi";
 135                         };
 136                         i2cp {
 137                                 nvidia,pins = "i2cp";
 138                                 nvidia,function = "i2cp";
 139                         };
 140                         irrx {
 141                                 nvidia,pins = "irrx", "irtx";
 142                                 nvidia,function = "uartb";
 143                         };
 144                         kbca {
 145                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 146                                         "kbcf";
 147                                 nvidia,function = "kbc";
 148                         };
 149                         kbce { /* touch */
 150                                 nvidia,pins = "kbce";
 151                                 nvidia,function = "kbc";
 152                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 153                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 154                         };
 155                         lcsn {
 156                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 157                                         "lsdi", "lvp0";
 158                                 nvidia,function = "rsvd4";
 159                         };
 160                         ld0 {
 161                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 162                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 163                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 164                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 165                                         "lhp1", "lhp2", "lhs", "lpp", "lpw0",
 166                                         "lpw2", "lsc0", "lsc1", "lsck", "lsda",
 167                                         "lspi", "lvp1", "lvs";
 168                                 nvidia,function = "displaya";
 169                         };
 170                         owc {
 171                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 172                                 nvidia,function = "rsvd2";
 173                         };
 174                         pmc {
 175                                 nvidia,pins = "pmc";
 176                                 nvidia,function = "pwr_on";
 177                         };
 178                         rm {
 179                                 nvidia,pins = "rm";
 180                                 nvidia,function = "i2c1";
 181                         };
 182                         sdb {
 183                                 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
 184                                 nvidia,function = "sdio3";
 185                         };
 186                         sdio1 {
 187                                 nvidia,pins = "sdio1";
 188                                 nvidia,function = "sdio1";
 189                         };
 190                         slxd {
 191                                 nvidia,pins = "slxd";
 192                                 nvidia,function = "spdif";
 193                         };
 194                         spid { /* touch */
 195                                 nvidia,pins = "spid", "spif";
 196                                 nvidia,function = "spi1";
 197                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 198                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 199                         };
 200                         spie { /* touch */
 201                                 nvidia,pins = "spie";
 202                                 nvidia,function = "spi1";
 203                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 204                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 205                         };
 206                         spig {
 207                                 nvidia,pins = "spig", "spih";
 208                                 nvidia,function = "spi2_alt";
 209                         };
 210                         uaa {
 211                                 nvidia,pins = "uaa", "uab", "uda";
 212                                 nvidia,function = "ulpi";
 213                         };
 214                         uad {
 215                                 nvidia,pins = "uad";
 216                                 nvidia,function = "irda";
 217                         };
 218                         uca {
 219                                 nvidia,pins = "uca", "ucb";
 220                                 nvidia,function = "uartc";
 221                         };
 222                         conf_ata {
 223                                 nvidia,pins = "ata", "atb", "atc", "atd",
 224                                         "cdev1", "cdev2", "dap1", "dap2",
 225                                         "dap4", "dtf", "gma", "gmc",
 226                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 227                                         "irtx", "pta", "rm", "sdc", "sdd",
 228                                         "slxc", "slxd", "slxk", "spdi", "spdo",
 229                                         "uac", "uad", "uca", "ucb", "uda";
 230                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 231                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 232                         };
 233                         conf_ate {
 234                                 nvidia,pins = "ate", "csus", "dap3", "gmd",
 235                                         "gpv", "owc", "spia", "spib", "spic",
 236                                         "spid", "spie", "spig";
 237                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 238                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 239                         };
 240                         conf_ck32 {
 241                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 242                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 243                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 244                         };
 245                         conf_crtp {
 246                                 nvidia,pins = "crtp", "gmb", "slxa", "spih";
 247                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 248                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 249                         };
 250                         conf_dta {
 251                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 252                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 253                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 254                         };
 255                         conf_dte {
 256                                 nvidia,pins = "dte", "spif";
 257                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 258                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 259                         };
 260                         conf_hdint {
 261                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 262                                         "lpw1", "lsck", "lsda", "lsdi", "lvp0";
 263                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 264                         };
 265                         conf_kbca {
 266                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 267                                         "kbce", "kbcf", "sdio1", "uaa", "uab";
 268                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 269                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 270                         };
 271                         conf_lc {
 272                                 nvidia,pins = "lc", "ls";
 273                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 274                         };
 275                         conf_ld0 {
 276                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 277                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 278                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 279                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 280                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 281                                         "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
 282                                         "lvp1", "lvs", "pmc", "sdb";
 283                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 284                         };
 285                         conf_ld17_0 {
 286                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 287                                         "ld23_22";
 288                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 289                         };
 290                         drive_sdio1 {
 291                                 nvidia,pins = "drive_sdio1";
 292                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 293                                 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
 294                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 295                                 nvidia,pull-down-strength = <31>;
 296                                 nvidia,pull-up-strength = <31>;
 297                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 298                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 299                         };
 300                 };
 301
 302                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 303                         ddc {
 304                                 nvidia,pins = "ddc";
 305                                 nvidia,function = "i2c2";
 306                         };
 307                         pta {
 308                                 nvidia,pins = "pta";
 309                                 nvidia,function = "rsvd4";
 310                         };
 311                 };
 312
 313                 state_i2cmux_pta: pinmux_i2cmux_pta {
 314                         ddc {
 315                                 nvidia,pins = "ddc";
 316                                 nvidia,function = "rsvd4";
 317                         };
 318                         pta {
 319                                 nvidia,pins = "pta";
 320                                 nvidia,function = "i2c2";
 321                         };
 322                 };
 323
 324                 state_i2cmux_idle: pinmux_i2cmux_idle {
 325                         ddc {
 326                                 nvidia,pins = "ddc";
 327                                 nvidia,function = "rsvd4";
 328                         };
 329                         pta {
 330                                 nvidia,pins = "pta";
 331                                 nvidia,function = "rsvd4";
 332                         };
 333                 };
 334         };
 335
 336         i2s@70002800 {
 337                 status = "okay";
 338         };
 339
 340         serial@70006300 {
 341                 status = "okay";
 342         };
 343
 344         pwm: pwm@7000a000 {
 345                 status = "okay";
 346         };
 347
 348         i2c@7000c000 { /* i2c0 -- kernel name, TRM is i2c1 */
 349                 status = "okay";
 350                 clock-frequency = <400000>;
 351
 352                 wm8903: wm8903@1a {
 353                         compatible = "wlf,wm8903";
 354                         reg = <0x1a>;
 355                         interrupt-parent = <&gpio>;
 356                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 357
 358                         gpio-controller;
 359                         #gpio-cells = <2>;
 360
 361                         micdet-cfg = <0>;
 362                         micdet-delay = <100>;
 363                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 364                 };
 365
 366         };
 367
 368         i2c@7000c400 { /* i2c1 */
 369                 status = "okay";
 370                 clock-frequency = <100000>; /* (invalid) panel edid: i2cdump -y 5 0x50 */
 371         };
 372
 373         i2cmux {
 374                 compatible = "i2c-mux-pinctrl";
 375                 #address-cells = <1>;
 376                 #size-cells = <0>;
 377
 378                 i2c-parent = <&{/i2c@7000c400}>; /* 7000c400 = i2c1, 7000c500 = i2c2 */
 379
 380                 pinctrl-names = "ddc", "pta", "idle";
 381                 pinctrl-0 = <&state_i2cmux_ddc>;
 382                 pinctrl-1 = <&state_i2cmux_pta>;
 383                 pinctrl-2 = <&state_i2cmux_idle>;
 384
 385                 hdmi_ddc: i2c@0 {
 386                         reg = <0>;
 387                         #address-cells = <1>;
 388                         #size-cells = <0>;
 389                 };
 390
 391                 lvds_ddc: i2c@1 {
 392                         reg = <1>;
 393                         #address-cells = <1>;
 394                         #size-cells = <0>;
 395                 };
 396         };
 397
 398         i2c@7000c500 { /* i2c2 */
 399                 status = "okay";
 400                 clock-frequency = <400000>; /* 400000 */
 401         };
 402
 403         i2c@7000d000 { /* DVC according to Tegra2 TRM */
 404                 status = "okay";
 405                 clock-frequency = <400000>;
 406
 407                 pmic: tps6586x@34 {
 408                         compatible = "ti,tps6586x";
 409                         reg = <0x34>;
 410                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 411
 412                         ti,system-power-controller;
 413
 414                         #gpio-cells = <2>;
 415                         gpio-controller;
 416
 417                         sys-supply = <&vdd_5v0_reg>;
 418                         vin-sm0-supply = <&sys_reg>;
 419                         vin-sm1-supply = <&sys_reg>;
 420                         vin-sm2-supply = <&sys_reg>;
 421                         vinldo01-supply = <&sm2_reg>;
 422                         vinldo23-supply = <&sm2_reg>;
 423                         vinldo4-supply = <&sm2_reg>;
 424                         vinldo678-supply = <&sm2_reg>;
 425                         vinldo9-supply = <&sm2_reg>;
 426
 427                         regulators {
 428                                 sys_reg: sys {
 429                                         regulator-name = "vdd_sys";
 430                                         regulator-always-on;
 431                                 };
 432
 433                                 core_vdd_reg: sm0 {
 434                                         regulator-name = "vdd_sm0,vdd_core";
 435                                         regulator-min-microvolt = <1200000>;
 436                                         regulator-max-microvolt = <1300000>;
 437                                         regulator-coupled-with = <&rtc_vdd_reg>;
 438                                         regulator-coupled-max-spread = <150000>;
 439                                         regulator-always-on;
 440                                 };
 441
 442                                 cpu_vdd_reg: sm1 {
 443                                         regulator-name = "vdd_sm1,vdd_cpu";
 444                                         regulator-min-microvolt = <750000>;
 445                                         regulator-max-microvolt = <1125000>;
 446                                         regulator-always-on;
 447                                 };
 448
 449                                 sm2_reg: sm2 {
 450                                         regulator-name = "vdd_sm2,vin_ldo*";
 451                                         regulator-min-microvolt = <3700000>;
 452                                         regulator-max-microvolt = <3700000>;
 453                                         regulator-always-on;
 454                                 };
 455
 456                                 /* LDO0 is not connected to anything */
 457
 458                                 ldo1 {
 459                                         regulator-name = "vdd_ldo1,avdd_pll*";
 460                                         regulator-min-microvolt = <1100000>;
 461                                         regulator-max-microvolt = <1100000>;
 462                                         regulator-always-on;
 463                                 };
 464
 465                                 rtc_vdd_reg: ldo2 {
 466                                         regulator-name = "vdd_ldo2,vdd_rtc";
 467                                         regulator-min-microvolt = <1200000>;
 468                                         regulator-max-microvolt = <1300000>;
 469                                         regulator-coupled-with = <&core_vdd_reg>;
 470                                         regulator-coupled-max-spread = <150000>;
 471                                         regulator-always-on;
 472                                 };
 473
 474                                 ldo3 {
 475                                         regulator-name = "vdd_ldo3,avdd_usb*";
 476                                         regulator-min-microvolt = <3300000>;
 477                                         regulator-max-microvolt = <3300000>;
 478                                         regulator-always-on;
 479                                 };
 480
 481                                 ldo4 {
 482                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 483                                         regulator-min-microvolt = <1800000>;
 484                                         regulator-max-microvolt = <1800000>;
 485                                         regulator-always-on;
 486                                 };
 487
 488                                 ldo5 {
 489                                         regulator-name = "vdd_ldo5,vcore_mmc";
 490                                         regulator-min-microvolt = <2850000>;
 491                                         regulator-max-microvolt = <2850000>;
 492                                         regulator-always-on;
 493                                 };
 494
 495                                 ldo6 {
 496                                         regulator-name = "vdd_ldo6,avdd_vdac";
 497                                         regulator-min-microvolt = <1800000>;
 498                                         regulator-max-microvolt = <1800000>;
 499                                 };
 500
 501                                 hdmi_vdd_reg: ldo7 {
 502                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 503                                         regulator-min-microvolt = <3300000>;
 504                                         regulator-max-microvolt = <3300000>;
 505                                 };
 506
 507                                 hdmi_pll_reg: ldo8 {
 508                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 509                                         regulator-min-microvolt = <1800000>;
 510                                         regulator-max-microvolt = <1800000>;
 511                                 };
 512
 513                                 ldo9 {
 514                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 515                                         regulator-min-microvolt = <2850000>;
 516                                         regulator-max-microvolt = <2850000>;
 517                                         regulator-always-on;
 518                                 };
 519
 520                                 ldo_rtc {
 521                                         regulator-name = "vdd_rtc_out,vdd_cell";
 522                                         regulator-min-microvolt = <3300000>;
 523                                         regulator-max-microvolt = <3300000>;
 524                                         regulator-always-on;
 525                                 };
 526                         };
 527                 };
 528
 529                 temperature-sensor@4c {
 530                         compatible = "onnn,nct1008";
 531                         reg = <0x4c>;
 532                         interrupt-parent = <&gpio>;
 533                         interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_LEVEL_LOW>; // FIXME Documentation/devicetree/bindings/hwmon/lm90.txt
 534                 };
 535
 536                 compass@c { // CONFIG_AK8975
 537                         compatible = "asahi-kasei,ak8975";
 538                         reg = <0x0c>;
 539                         interrupt-parent = <&gpio>;
 540                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
 541                 };
 542
 543                 accel@f { // CONFIG_KXCJK1013 -- does mention kxtf9 but doesn't work
 544                         compatible = "kxtf9";
 545                         reg = <0x0f>;
 546                 };
 547
 548         };
 549
 550         pmc@7000e400 {
 551                 nvidia,invert-interrupt;
 552                 nvidia,suspend-mode = <1>;
 553                 nvidia,cpu-pwr-good-time = <2000>;
 554                 nvidia,cpu-pwr-off-time = <100>;
 555                 nvidia,core-pwr-good-time = <3845 3845>;
 556                 nvidia,core-pwr-off-time = <458>;
 557                 nvidia,sys-clock-req-active-high;
 558         };
 559
 560         usb@c5000000 {
 561                 status = "okay";
 562         };
 563
 564         usb-phy@c5000000 {
 565                 status = "okay";
 566         };
 567
 568         usb@c5004000 {
 569                 status = "okay";
 570                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 571                         GPIO_ACTIVE_LOW>;
 572         };
 573
 574         usb-phy@c5004000 {
 575                 status = "okay";
 576                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 577                         GPIO_ACTIVE_LOW>;
 578         };
 579
 580         usb@c5008000 {
 581                 status = "okay";
 582         };
 583
 584         usb-phy@c5008000 {
 585                 status = "okay";
 586         };
 587
 588         sdhci@c8000000 {
 589                 status = "okay";
 590                 bus-width = <8>;
 591                 keep-power-in-suspend;
 592         };
 593
 594         sdhci@c8000400 {
 595                 status = "okay";
 596                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 597                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 598                 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 599                 bus-width = <4>;
 600         };
 601
 602         sdhci@c8000600 {
 603                 status = "okay";
 604                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 605                 bus-width = <8>;
 606                 non-removable;
 607         };
 608
 609         backlight: backlight {
 610                 compatible = "pwm-backlight";
 611
 612                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 613                 power-supply = <&vdd_bl_reg>;
 614                 pwms = <&pwm 2 5000000>;
 615
 616                 brightness-levels = <0 4 8 16 32 64 128 255>;
 617                 default-brightness-level = <6>;
 618         };
 619
 620         clocks {
 621                 compatible = "simple-bus";
 622                 #address-cells = <1>;
 623                 #size-cells = <0>;
 624
 625                 clk32k_in: clock@0 {
 626                         compatible = "fixed-clock";
 627                         reg = <0>;
 628                         #clock-cells = <0>;
 629                         clock-frequency = <32768>;
 630                 };
 631         };
 632
 633         gpio-keys {
 634                 compatible = "gpio-keys";
 635
 636                 /*
 637                         keys on device are: rotate, www, back, back, homepage
 638                         two back keys are connected to same pin
 639
 640                         relevant source from 2.6 kernel is:
 641
 642 #define GPIO_KEY(_id, _gpio, _isactivelow, _iswake)           \
 643 static struct gpio_keys_button ventana_keys[] = {
 644    [0] = GPIO_KEY(KEY_WWW, PQ0, 1, 0),
 645    [1] = GPIO_KEY(KEY_HOMEPAGE, PQ1, 1, 0),
 646    [2] = GPIO_KEY(KEY_BACK, PQ2, 1, 0),
 647    [3] = GPIO_KEY(KEY_AUTO_ROTATION, PQ3, 1, 0),
 648    [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 1, 0),
 649    [5] = GPIO_KEY(KEY_VOLUMEUP, PQ5, 1, 0),
 650    [6] = GPIO_KEY(KEY_POWER, PC7, 0, 1),
 651    [7] = GPIO_KEY(KEY_POWER, PI3, 0, 0),
 652 };
 653
 654                 */
 655                 www {
 656                         label = "www";
 657                         gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
 658                         linux,code = <KEY_WWW>;
 659                 };
 660
 661                 homepage {
 662                         label = "homepage";
 663                         gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
 664                         linux,code = <KEY_HOMEPAGE>;
 665                 };
 666
 667                 back {
 668                         label = "back";
 669                         gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
 670                         linux,code = <KEY_BACK>;
 671                 };
 672
 673                 rotation {
 674                         label = "rotation";
 675                         gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
 676                         linux,code = <KEY_ROTATE_DISPLAY>;
 677                 };
 678
 679                 volumedown {
 680                         label = "volumedown";
 681                         gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
 682                         linux,code = <KEY_VOLUMEDOWN>;
 683                 };
 684
 685                 volumeup {
 686                         label = "volumeup";
 687                         gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
 688                         linux,code = <KEY_VOLUMEUP>;
 689                 };
 690
 691                 power {
 692                         label = "Power";
 693                         gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
 694                         linux,code = <KEY_POWER>;
 695                         wakeup-source;
 696                 };
 697
 698                 power2 {
 699                         label = "Power2";
 700                         gpios = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>; /* this is power button on device */
 701                         linux,code = <KEY_POWER2>;
 702                 };
 703
 704    /* Charl5es 0508 start
 705     * wakeup source
 706     *
 707     * PC7 EXIT_LP0
 708     * PV2 AP_ONKEY
 709     * PV3 AP_ACOK
 710     * PI3 POWEROFF_AP
 711     */
 712
 713                 psensor { /* IQS128 on separate board with 3 wires */
 714                         label = "proximity";
 715                         gpios = <&gpio TEGRA_GPIO(C, 1) GPIO_ACTIVE_HIGH>;
 716                         linux,code = <KEY_DASHBOARD>; /* include/uapi/linux/input-event-codes.h */
 717                 };
 718         };
 719
 720         panel: panel {
 721                 compatible = "lg,lp101wx1", "simple-panel";
 722
 723                 power-supply = <&vdd_pnl_reg>;
 724                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 725
 726                 backlight = <&backlight>;
 727                 ddc-i2c-bus = <&lvds_ddc>;
 728
 729                                 x-display-timings {
 730                                         timing@0 {
 731                                                 /* XXX tegra_dc_mode ventana_panel_modes -- works for u-boot */
 732                                                 clock-frequency = <72072000>;
 733                                                 hactive = <1280>;
 734                                                 vactive = <800>;
 735                                                 hback-porch = <72>;
 736                                                 hfront-porch = <48>;
 737                                                 hsync-len = <32>;
 738                                                 vback-porch = <22>;
 739                                                 vfront-porch = <3>;
 740                                                 vsync-len = <7>;
 741                                                 hsync-active = <1>;
 742                                         };
 743                                 };
 744         };
 745
 746         regulators {
 747                 compatible = "simple-bus";
 748                 #address-cells = <1>;
 749                 #size-cells = <0>;
 750
 751                 vdd_5v0_reg: regulator@0 {
 752                         compatible = "regulator-fixed";
 753                         reg = <0>;
 754                         regulator-name = "vdd_5v0";
 755                         regulator-min-microvolt = <5000000>;
 756                         regulator-max-microvolt = <5000000>;
 757                         regulator-always-on;
 758                 };
 759
 760                 regulator@1 {
 761                         compatible = "regulator-fixed";
 762                         reg = <1>;
 763                         regulator-name = "vdd_1v5";
 764                         regulator-min-microvolt = <1500000>;
 765                         regulator-max-microvolt = <1500000>;
 766                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 767                 };
 768
 769                 regulator@2 {
 770                         compatible = "regulator-fixed";
 771                         reg = <2>;
 772                         regulator-name = "vdd_1v2";
 773                         regulator-min-microvolt = <1200000>;
 774                         regulator-max-microvolt = <1200000>;
 775                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 776                         enable-active-high;
 777                 };
 778
 779                 vdd_pnl_reg: regulator@3 {
 780                         compatible = "regulator-fixed";
 781                         reg = <3>;
 782                         regulator-name = "vdd_pnl";
 783                         regulator-min-microvolt = <2800000>;
 784                         regulator-max-microvolt = <2800000>;
 785                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 786                         enable-active-high;
 787                 };
 788
 789                 vdd_bl_reg: regulator@4 {
 790                         compatible = "regulator-fixed";
 791                         reg = <4>;
 792                         regulator-name = "vdd_bl";
 793                         regulator-min-microvolt = <2800000>;
 794                         regulator-max-microvolt = <2800000>;
 795                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 796                         enable-active-high;
 797                 };
 798         };
 799
 800         sound {
 801                 compatible = "nvidia,tegra-audio-wm8903-ventana",
 802                              "nvidia,tegra-audio-wm8903";
 803                 nvidia,model = "NVIDIA Tegra Ventana";
 804
 805                 nvidia,audio-routing =
 806                         "Headphone Jack", "HPOUTR",
 807                         "Headphone Jack", "HPOUTL",
 808                         "Int Spk", "ROP",
 809                         "Int Spk", "RON",
 810                         "Int Spk", "LOP",
 811                         "Int Spk", "LON",
 812                         "Mic Jack", "MICBIAS",
 813                         "IN1L", "Mic Jack";
 814
 815                 nvidia,i2s-controller = <&tegra_i2s1>;
 816                 nvidia,audio-codec = <&wm8903>;
 817
 818                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 819                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; /* ok */
 820 /*
 821                 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
 822                         GPIO_ACTIVE_HIGH>;
 823 */
 824                 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(W, 3) /* fixed */
 825                         GPIO_ACTIVE_HIGH>;
 826
 827                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 828                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 829                          <&tegra_car TEGRA20_CLK_CDEV1>;
 830                 clock-names = "pll_a", "pll_a_out0", "mclk";
 831         };
 832
 833         cpus {
 834                 cpu0: cpu@0 {
 835                         cpu-supply = <&cpu_vdd_reg>;
 836                         core-supply = <&core_vdd_reg>;
 837                         rtc-supply = <&rtc_vdd_reg>;
 838                 };
 839         };
 840 };