arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/smp_lock.h>
  31 #include <linux/threads.h>
  32 #include <linux/bitops.h>
  33 #include <linux/irq.h>
  34
  35 #include <asm/delay.h>
  36 #include <asm/intrinsics.h>
  37 #include <asm/io.h>
  38 #include <asm/hw_irq.h>
  39 #include <asm/machvec.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/system.h>
  42 #include <asm/tlbflush.h>
  43
  44 #ifdef CONFIG_PERFMON
  45 # include <asm/perfmon.h>
  46 #endif
  47
  48 #define IRQ_DEBUG       0
  49
  50 /* These can be overridden in platform_irq_init */
  51 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  52 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  53
  54 /* default base addr of IPI table */
  55 void __iomem *ipi_base_addr = ((void __iomem *)
  56                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  57
  58 /*
  59  * Legacy IRQ to IA-64 vector translation table.
  60  */
  61 __u8 isa_irq_to_vector_map[16] = {
  62         /* 8259 IRQ translation, first 16 entries */
  63         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  64         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  65 };
  66 EXPORT_SYMBOL(isa_irq_to_vector_map);
  67
  68 static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)];
  69
  70 int
  71 assign_irq_vector (int irq)
  72 {
  73         int pos, vector;
  74  again:
  75         pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
  76         vector = IA64_FIRST_DEVICE_VECTOR + pos;
  77         if (vector > IA64_LAST_DEVICE_VECTOR)
  78                 return -ENOSPC;
  79         if (test_and_set_bit(pos, ia64_vector_mask))
  80                 goto again;
  81         return vector;
  82 }
  83
  84 void
  85 free_irq_vector (int vector)
  86 {
  87         int pos;
  88
  89         if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
  90                 return;
  91
  92         pos = vector - IA64_FIRST_DEVICE_VECTOR;
  93         if (!test_and_clear_bit(pos, ia64_vector_mask))
  94                 printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
  95 }
  96
  97 int
  98 reserve_irq_vector (int vector)
  99 {
 100         int pos;
 101
 102         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 103             vector > IA64_LAST_DEVICE_VECTOR)
 104                 return -EINVAL;
 105
 106         pos = vector - IA64_FIRST_DEVICE_VECTOR;
 107         return test_and_set_bit(pos, ia64_vector_mask);
 108 }
 109
 110 /*
 111  * Dynamic irq allocate and deallocation for MSI
 112  */
 113 int create_irq(void)
 114 {
 115         int vector = assign_irq_vector(AUTO_ASSIGN);
 116
 117         if (vector >= 0)
 118                 dynamic_irq_init(vector);
 119
 120         return vector;
 121 }
 122
 123 void destroy_irq(unsigned int irq)
 124 {
 125         dynamic_irq_cleanup(irq);
 126         free_irq_vector(irq);
 127 }
 128
 129 #ifdef CONFIG_SMP
 130 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 131 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 132 #else
 133 #       define IS_RESCHEDULE(vec)       (0)
 134 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 135 #endif
 136 /*
 137  * That's where the IVT branches when we get an external
 138  * interrupt. This branches to the correct hardware IRQ handler via
 139  * function ptr.
 140  */
 141 void
 142 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 143 {
 144         struct pt_regs *old_regs = set_irq_regs(regs);
 145         unsigned long saved_tpr;
 146
 147 #if IRQ_DEBUG
 148         {
 149                 unsigned long bsp, sp;
 150
 151                 /*
 152                  * Note: if the interrupt happened while executing in
 153                  * the context switch routine (ia64_switch_to), we may
 154                  * get a spurious stack overflow here.  This is
 155                  * because the register and the memory stack are not
 156                  * switched atomically.
 157                  */
 158                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 159                 sp = ia64_getreg(_IA64_REG_SP);
 160
 161                 if ((sp - bsp) < 1024) {
 162                         static unsigned char count;
 163                         static long last_time;
 164
 165                         if (jiffies - last_time > 5*HZ)
 166                                 count = 0;
 167                         if (++count < 5) {
 168                                 last_time = jiffies;
 169                                 printk("ia64_handle_irq: DANGER: less than "
 170                                        "1KB of free stack space!!\n"
 171                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 172                         }
 173                 }
 174         }
 175 #endif /* IRQ_DEBUG */
 176
 177         /*
 178          * Always set TPR to limit maximum interrupt nesting depth to
 179          * 16 (without this, it would be ~240, which could easily lead
 180          * to kernel stack overflows).
 181          */
 182         irq_enter();
 183         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 184         ia64_srlz_d();
 185         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 186                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 187                         smp_local_flush_tlb();
 188                         kstat_this_cpu.irqs[vector]++;
 189                 } else if (unlikely(IS_RESCHEDULE(vector)))
 190                         kstat_this_cpu.irqs[vector]++;
 191                 else {
 192                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 193                         ia64_srlz_d();
 194
 195                         generic_handle_irq(local_vector_to_irq(vector));
 196
 197                         /*
 198                          * Disable interrupts and send EOI:
 199                          */
 200                         local_irq_disable();
 201                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 202                 }
 203                 ia64_eoi();
 204                 vector = ia64_get_ivr();
 205         }
 206         /*
 207          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 208          * handler needs to be able to wait for further keyboard interrupts, which can't
 209          * come through until ia64_eoi() has been done.
 210          */
 211         irq_exit();
 212         set_irq_regs(old_regs);
 213 }
 214
 215 #ifdef CONFIG_HOTPLUG_CPU
 216 /*
 217  * This function emulates a interrupt processing when a cpu is about to be
 218  * brought down.
 219  */
 220 void ia64_process_pending_intr(void)
 221 {
 222         ia64_vector vector;
 223         unsigned long saved_tpr;
 224         extern unsigned int vectors_in_migration[NR_IRQS];
 225
 226         vector = ia64_get_ivr();
 227
 228          irq_enter();
 229          saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 230          ia64_srlz_d();
 231
 232          /*
 233           * Perform normal interrupt style processing
 234           */
 235         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 236                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 237                         smp_local_flush_tlb();
 238                         kstat_this_cpu.irqs[vector]++;
 239                 } else if (unlikely(IS_RESCHEDULE(vector)))
 240                         kstat_this_cpu.irqs[vector]++;
 241                 else {
 242                         struct pt_regs *old_regs = set_irq_regs(NULL);
 243
 244                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 245                         ia64_srlz_d();
 246
 247                         /*
 248                          * Now try calling normal ia64_handle_irq as it would have got called
 249                          * from a real intr handler. Try passing null for pt_regs, hopefully
 250                          * it will work. I hope it works!.
 251                          * Probably could shared code.
 252                          */
 253                         vectors_in_migration[local_vector_to_irq(vector)]=0;
 254                         generic_handle_irq(local_vector_to_irq(vector));
 255                         set_irq_regs(old_regs);
 256
 257                         /*
 258                          * Disable interrupts and send EOI
 259                          */
 260                         local_irq_disable();
 261                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 262                 }
 263                 ia64_eoi();
 264                 vector = ia64_get_ivr();
 265         }
 266         irq_exit();
 267 }
 268 #endif
 269
 270
 271 #ifdef CONFIG_SMP
 272
 273 static irqreturn_t dummy_handler (int irq, void *dev_id)
 274 {
 275         BUG();
 276 }
 277 extern irqreturn_t handle_IPI (int irq, void *dev_id);
 278
 279 static struct irqaction ipi_irqaction = {
 280         .handler =      handle_IPI,
 281         .flags =        IRQF_DISABLED,
 282         .name =         "IPI"
 283 };
 284
 285 static struct irqaction resched_irqaction = {
 286         .handler =      dummy_handler,
 287         .flags =        IRQF_DISABLED,
 288         .name =         "resched"
 289 };
 290
 291 static struct irqaction tlb_irqaction = {
 292         .handler =      dummy_handler,
 293         .flags =        SA_INTERRUPT,
 294         .name =         "tlb_flush"
 295 };
 296
 297 #endif
 298
 299 void
 300 register_percpu_irq (ia64_vector vec, struct irqaction *action)
 301 {
 302         irq_desc_t *desc;
 303         unsigned int irq;
 304
 305         for (irq = 0; irq < NR_IRQS; ++irq)
 306                 if (irq_to_vector(irq) == vec) {
 307                         desc = irq_desc + irq;
 308                         desc->status |= IRQ_PER_CPU;
 309                         desc->chip = &irq_type_ia64_lsapic;
 310                         if (action)
 311                                 setup_irq(irq, action);
 312                 }
 313 }
 314
 315 void __init
 316 init_IRQ (void)
 317 {
 318         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 319 #ifdef CONFIG_SMP
 320         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 321         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 322         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 323 #endif
 324 #ifdef CONFIG_PERFMON
 325         pfm_init_percpu();
 326 #endif
 327         platform_irq_init();
 328 }
 329
 330 void
 331 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 332 {
 333         void __iomem *ipi_addr;
 334         unsigned long ipi_data;
 335         unsigned long phys_cpu_id;
 336
 337 #ifdef CONFIG_SMP
 338         phys_cpu_id = cpu_physical_id(cpu);
 339 #else
 340         phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
 341 #endif
 342
 343         /*
 344          * cpu number is in 8bit ID and 8bit EID
 345          */
 346
 347         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 348         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 349
 350         writeq(ipi_data, ipi_addr);
 351 }