[POWERPC] Delete boot-cpu property from all DTS files
[powerpc.git] / arch / powerpc / boot / dts / mpc8323emds.dts
1 /*
2  * MPC8323E EMDS Device Tree Source
3  *
4  * Copyright 2006 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 / {
13         model = "MPC8323EMDS";
14         compatible = "MPC83xx";
15         #address-cells = <1>;
16         #size-cells = <1>;
17         linux,phandle = <100>;
18
19         cpus {
20                 #cpus = <1>;
21                 #address-cells = <1>;
22                 #size-cells = <0>;
23                 linux,phandle = <200>;
24
25                 PowerPC,8323@0 {
26                         device_type = "cpu";
27                         reg = <0>;
28                         d-cache-line-size = <20>;       // 32 bytes
29                         i-cache-line-size = <20>;       // 32 bytes
30                         d-cache-size = <4000>;          // L1, 16K
31                         i-cache-size = <4000>;          // L1, 16K
32                         timebase-frequency = <0>;
33                         bus-frequency = <0>;
34                         clock-frequency = <0>;
35                         32-bit;
36                         linux,phandle = <201>;
37                 };
38         };
39
40         memory {
41                 device_type = "memory";
42                 linux,phandle = <300>;
43                 reg = <00000000 08000000>;
44         };
45
46         bcsr@f8000000 {
47                 device_type = "board-control";
48                 reg = <f8000000 8000>;
49         };
50
51         soc8323@e0000000 {
52                 #address-cells = <1>;
53                 #size-cells = <1>;
54                 #interrupt-cells = <2>;
55                 device_type = "soc";
56                 ranges = <0 e0000000 00100000>;
57                 reg = <e0000000 00000200>;
58                 bus-frequency = <7DE2900>;
59
60                 wdt@200 {
61                         device_type = "watchdog";
62                         compatible = "mpc83xx_wdt";
63                         reg = <200 100>;
64                 };
65
66                 i2c@3000 {
67                         device_type = "i2c";
68                         compatible = "fsl-i2c";
69                         reg = <3000 100>;
70                         interrupts = <e 8>;
71                         interrupt-parent = <700>;
72                         dfsrr;
73                 };
74
75                 serial@4500 {
76                         device_type = "serial";
77                         compatible = "ns16550";
78                         reg = <4500 100>;
79                         clock-frequency = <0>;
80                         interrupts = <9 8>;
81                         interrupt-parent = <700>;
82                 };
83
84                 serial@4600 {
85                         device_type = "serial";
86                         compatible = "ns16550";
87                         reg = <4600 100>;
88                         clock-frequency = <0>;
89                         interrupts = <a 8>;
90                         interrupt-parent = <700>;
91                 };
92
93                 crypto@30000 {
94                         device_type = "crypto";
95                         model = "SEC2";
96                         compatible = "talitos";
97                         reg = <30000 7000>;
98                         interrupts = <b 8>;
99                         interrupt-parent = <700>;
100                         /* Rev. 2.2 */
101                         num-channels = <1>;
102                         channel-fifo-len = <18>;
103                         exec-units-mask = <0000004c>;
104                         descriptor-types-mask = <0122003f>;
105                 };
106
107                 pci@8500 {
108                         linux,phandle = <8500>;
109                         interrupt-map-mask = <f800 0 0 7>;
110                         interrupt-map = <
111                                         /* IDSEL 0x11 AD17 */
112                                          8800 0 0 1 700 14 8
113                                          8800 0 0 2 700 15 8
114                                          8800 0 0 3 700 16 8
115                                          8800 0 0 4 700 17 8
116
117                                         /* IDSEL 0x12 AD18 */
118                                          9000 0 0 1 700 16 8
119                                          9000 0 0 2 700 17 8
120                                          9000 0 0 3 700 14 8
121                                          9000 0 0 4 700 15 8
122
123                                         /* IDSEL 0x13 AD19 */
124                                          9800 0 0 1 700 17 8
125                                          9800 0 0 2 700 14 8
126                                          9800 0 0 3 700 15 8
127                                          9800 0 0 4 700 16 8
128
129                                         /* IDSEL 0x15 AD21*/
130                                          a800 0 0 1 700 14 8
131                                          a800 0 0 2 700 15 8
132                                          a800 0 0 3 700 16 8
133                                          a800 0 0 4 700 17 8
134
135                                         /* IDSEL 0x16 AD22*/
136                                          b000 0 0 1 700 17 8
137                                          b000 0 0 2 700 14 8
138                                          b000 0 0 3 700 15 8
139                                          b000 0 0 4 700 16 8
140
141                                         /* IDSEL 0x17 AD23*/
142                                          b800 0 0 1 700 16 8
143                                          b800 0 0 2 700 17 8
144                                          b800 0 0 3 700 14 8
145                                          b800 0 0 4 700 15 8
146
147                                         /* IDSEL 0x18 AD24*/
148                                          c000 0 0 1 700 15 8
149                                          c000 0 0 2 700 16 8
150                                          c000 0 0 3 700 17 8
151                                          c000 0 0 4 700 14 8>;
152                         interrupt-parent = <700>;
153                         interrupts = <42 8>;
154                         bus-range = <0 0>;
155                         ranges = <02000000 0 a0000000 90000000 0 10000000
156                                   42000000 0 80000000 80000000 0 10000000
157                                   01000000 0 00000000 d0000000 0 00100000>;
158                         clock-frequency = <0>;
159                         #interrupt-cells = <1>;
160                         #size-cells = <2>;
161                         #address-cells = <3>;
162                         reg = <8500 100>;
163                         compatible = "83xx";
164                         device_type = "pci";
165                 };
166
167                 pic@700 {
168                         linux,phandle = <700>;
169                         interrupt-controller;
170                         #address-cells = <0>;
171                         #interrupt-cells = <2>;
172                         reg = <700 100>;
173                         built-in;
174                         device_type = "ipic";
175                 };
176                 
177                 par_io@1400 {
178                         reg = <1400 100>;
179                         device_type = "par_io";
180                         num-ports = <7>;
181
182                         ucc_pin@03 {
183                                 linux,phandle = <140003>;
184                                 pio-map = <
185                         /* port  pin  dir  open_drain  assignment  has_irq */
186                                         3  4  3  0  2  0  /* MDIO */
187                                         3  5  1  0  2  0  /* MDC */
188                                         0  d  2  0  1  0        /* RX_CLK (CLK9) */
189                                         3 18  2  0  1  0        /* TX_CLK (CLK10) */
190                                         1  1  1  0  1  0        /* TxD1 */
191                                         1  0  1  0  1  0        /* TxD0 */
192                                         1  1  1  0  1  0        /* TxD1 */
193                                         1  2  1  0  1  0        /* TxD2 */
194                                         1  3  1  0  1  0        /* TxD3 */
195                                         1  4  2  0  1  0        /* RxD0 */
196                                         1  5  2  0  1  0        /* RxD1 */
197                                         1  6  2  0  1  0        /* RxD2 */
198                                         1  7  2  0  1  0        /* RxD3 */
199                                         1  8  2  0  1  0        /* RX_ER */
200                                         1  9  1  0  1  0        /* TX_ER */
201                                         1  a  2  0  1  0        /* RX_DV */
202                                         1  b  2  0  1  0        /* COL */
203                                         1  c  1  0  1  0        /* TX_EN */
204                                         1  d  2  0  1  0>;/* CRS */
205                         };
206                         ucc_pin@04 {
207                                 linux,phandle = <140004>;
208                                 pio-map = <
209                         /* port  pin  dir  open_drain  assignment  has_irq */
210                                         3 1f  2  0  1  0        /* RX_CLK (CLK7) */
211                                         3  6  2  0  1  0        /* TX_CLK (CLK8) */
212                                         1 12  1  0  1  0        /* TxD0 */
213                                         1 13  1  0  1  0        /* TxD1 */
214                                         1 14  1  0  1  0        /* TxD2 */
215                                         1 15  1  0  1  0        /* TxD3 */
216                                         1 16  2  0  1  0        /* RxD0 */
217                                         1 17  2  0  1  0        /* RxD1 */
218                                         1 18  2  0  1  0        /* RxD2 */
219                                         1 19  2  0  1  0        /* RxD3 */
220                                         1 1a  2  0  1  0        /* RX_ER */
221                                         1 1b  1  0  1  0        /* TX_ER */
222                                         1 1c  2  0  1  0        /* RX_DV */
223                                         1 1d  2  0  1  0        /* COL */
224                                         1 1e  1  0  1  0        /* TX_EN */
225                                         1 1f  2  0  1  0>;/* CRS */
226                         };
227                 };
228         };
229
230         qe@e0100000 {
231                 #address-cells = <1>;
232                 #size-cells = <1>;
233                 device_type = "qe";
234                 model = "QE";
235                 ranges = <0 e0100000 00100000>;
236                 reg = <e0100000 480>;
237                 brg-frequency = <0>;
238                 bus-frequency = <BCD3D80>;
239                 
240                 muram@10000 {
241                         device_type = "muram";
242                         ranges = <0 00010000 00004000>;
243         
244                         data-only@0 {
245                                 reg = <0 4000>;
246                         };
247                 };
248
249                 spi@4c0 {
250                         device_type = "spi";
251                         compatible = "fsl_spi";
252                         reg = <4c0 40>;
253                         interrupts = <2>;
254                         interrupt-parent = <80>;
255                         mode = "cpu";
256                 };
257
258                 spi@500 {
259                         device_type = "spi";
260                         compatible = "fsl_spi";
261                         reg = <500 40>;
262                         interrupts = <1>;
263                         interrupt-parent = <80>;
264                         mode = "cpu";
265                 };
266
267                 usb@6c0 {
268                         device_type = "usb";
269                         compatible = "qe_udc";
270                         reg = <6c0 40 8B00 100>;
271                         interrupts = <b>;
272                         interrupt-parent = <80>;
273                         mode = "slave";
274                 };
275
276                 ucc@2200 {
277                         device_type = "network";
278                         compatible = "ucc_geth";
279                         model = "UCC";
280                         device-id = <3>;
281                         reg = <2200 200>;
282                         interrupts = <22>;
283                         interrupt-parent = <80>;
284                         mac-address = [ 00 04 9f 00 23 23 ];
285                         rx-clock = <19>;
286                         tx-clock = <1a>;
287                         phy-handle = <212003>;
288                         pio-handle = <140003>;
289                 };
290
291                 ucc@3200 {
292                         device_type = "network";
293                         compatible = "ucc_geth";
294                         model = "UCC";
295                         device-id = <4>;
296                         reg = <3000 200>;
297                         interrupts = <23>;
298                         interrupt-parent = <80>;
299                         mac-address = [ 00 11 22 33 44 55 ];
300                         rx-clock = <17>;
301                         tx-clock = <18>;
302                         phy-handle = <212004>;
303                         pio-handle = <140004>;
304                 };
305
306                 mdio@2320 {
307                         #address-cells = <1>;
308                         #size-cells = <0>;
309                         reg = <2320 18>;
310                         device_type = "mdio";
311                         compatible = "ucc_geth_phy";
312
313                         ethernet-phy@03 {
314                                 linux,phandle = <212003>;
315                                 interrupt-parent = <700>;
316                                 interrupts = <11 2>;
317                                 reg = <3>;
318                                 device_type = "ethernet-phy";
319                                 interface = <3>; //ENET_100_MII
320                         };
321                         ethernet-phy@04 {
322                                 linux,phandle = <212004>;
323                                 interrupt-parent = <700>;
324                                 interrupts = <12 2>;
325                                 reg = <4>;
326                                 device_type = "ethernet-phy";
327                                 interface = <3>;
328                         };
329                 };
330
331                 qeic@80 {
332                         linux,phandle = <80>;
333                         interrupt-controller;
334                         device_type = "qeic";
335                         #address-cells = <0>;
336                         #interrupt-cells = <1>;
337                         reg = <80 80>;
338                         built-in;
339                         big-endian;
340                         interrupts = <20 8 21 8>; //high:32 low:33
341                         interrupt-parent = <700>;
342                 };
343         };
344 };