1 #include <linux/kernel.h>
2 #include <linux/module.h>
3 #include <linux/stddef.h>
4 #include <linux/init.h>
5 #include <linux/sched.h>
6 #include <linux/signal.h>
8 #include <linux/dma-mapping.h>
12 #include <asm/8xx_immap.h>
13 #include <asm/mpc8xx.h>
15 #include "mpc8xx_pic.h"
18 #define PIC_VEC_SPURRIOUS 15
20 extern int cpm_get_irq(struct pt_regs *regs);
22 static struct irq_host *mpc8xx_pic_host;
23 #define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
24 static unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
25 static sysconf8xx_t *siu_reg;
27 int cpm_get_irq(struct pt_regs *regs);
29 static void mpc8xx_unmask_irq(unsigned int virq)
32 unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
37 ppc_cached_irq_mask[word] |= (1 << (31-bit));
38 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
41 static void mpc8xx_mask_irq(unsigned int virq)
44 unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
49 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
50 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
53 static void mpc8xx_ack(unsigned int virq)
56 unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
59 out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
62 static void mpc8xx_end_irq(unsigned int virq)
65 unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
70 ppc_cached_irq_mask[word] |= (1 << (31-bit));
71 out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
74 static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
76 struct irq_desc *desc = get_irq_desc(virq);
78 desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
79 desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
80 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
81 desc->status |= IRQ_LEVEL;
83 if (flow_type & IRQ_TYPE_EDGE_FALLING) {
84 irq_hw_number_t hw = (unsigned int)irq_map[virq].hwirq;
85 unsigned int siel = in_be32(&siu_reg->sc_siel);
87 /* only external IRQ senses are programmable */
89 siel |= (0x80000000 >> hw);
90 out_be32(&siu_reg->sc_siel, siel);
91 desc->handle_irq = handle_edge_irq;
97 static struct irq_chip mpc8xx_pic = {
98 .typename = " MPC8XX SIU ",
99 .unmask = mpc8xx_unmask_irq,
100 .mask = mpc8xx_mask_irq,
102 .eoi = mpc8xx_end_irq,
103 .set_type = mpc8xx_set_irq_type,
106 unsigned int mpc8xx_get_irq(void)
110 /* For MPC8xx, read the SIVEC register and shift the bits down
111 * to get the irq number.
113 irq = in_be32(&siu_reg->sc_sivec) >> 26;
115 if (irq == PIC_VEC_SPURRIOUS)
118 return irq_linear_revmap(mpc8xx_pic_host, irq);
122 static int mpc8xx_pic_host_match(struct irq_host *h, struct device_node *node)
124 return h->of_node == node;
127 static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
130 pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
132 /* Set default irq handle */
133 set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
138 static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct,
139 u32 *intspec, unsigned int intsize,
140 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
142 static unsigned char map_pic_senses[4] = {
143 IRQ_TYPE_EDGE_RISING,
146 IRQ_TYPE_EDGE_FALLING,
149 *out_hwirq = intspec[0];
150 if (intsize > 1 && intspec[1] < 4)
151 *out_flags = map_pic_senses[intspec[1]];
153 *out_flags = IRQ_TYPE_NONE;
159 static struct irq_host_ops mpc8xx_pic_host_ops = {
160 .match = mpc8xx_pic_host_match,
161 .map = mpc8xx_pic_host_map,
162 .xlate = mpc8xx_pic_host_xlate,
165 int mpc8xx_pic_init(void)
168 struct device_node *np = NULL;
171 np = of_find_node_by_type(np, "mpc8xx-pic");
174 printk(KERN_ERR "Could not find open-pic node\n");
178 ret = of_address_to_resource(np, 0, &res);
182 siu_reg = (void *)ioremap(res.start, res.end - res.start + 1);
183 if (siu_reg == NULL) {
188 mpc8xx_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR,
189 64, &mpc8xx_pic_host_ops, 64);
190 if (mpc8xx_pic_host == NULL) {
191 printk(KERN_ERR "MPC8xx PIC: failed to allocate irq host!\n");