2 * arch/ppc/kernel/cputable.c
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <linux/config.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <asm/cputable.h>
19 struct cpu_spec* cur_cpu_spec[NR_CPUS];
21 extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
22 extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
23 extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
24 extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
25 extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
26 extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
27 extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
28 extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
29 extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
30 extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
31 extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
32 extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
33 extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
35 #define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
36 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
37 !defined(CONFIG_BOOKE))
39 /* This table only contains "desktop" CPUs, it need to be filled with embedded
42 #define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
45 /* We only set the spe features if the kernel was compiled with
49 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
51 #define PPC_FEATURE_SPE_COMP 0
54 struct cpu_spec cpu_specs[] = {
57 .pvr_mask = 0xffff0000,
58 .pvr_value = 0x00010000,
60 .cpu_features = CPU_FTRS_PPC601,
61 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR |
62 PPC_FEATURE_UNIFIED_CACHE,
65 .cpu_setup = __setup_cpu_601
68 .pvr_mask = 0xffff0000,
69 .pvr_value = 0x00030000,
71 .cpu_features = CPU_FTRS_603,
72 .cpu_user_features = COMMON_PPC,
75 .cpu_setup = __setup_cpu_603
78 .pvr_mask = 0xffff0000,
79 .pvr_value = 0x00060000,
81 .cpu_features = CPU_FTRS_603,
82 .cpu_user_features = COMMON_PPC,
85 .cpu_setup = __setup_cpu_603
88 .pvr_mask = 0xffff0000,
89 .pvr_value = 0x00070000,
91 .cpu_features = CPU_FTRS_603,
92 .cpu_user_features = COMMON_PPC,
95 .cpu_setup = __setup_cpu_603
98 .pvr_mask = 0xffff0000,
99 .pvr_value = 0x00040000,
101 .cpu_features = CPU_FTRS_604,
102 .cpu_user_features = COMMON_PPC,
106 .cpu_setup = __setup_cpu_604
109 .pvr_mask = 0xfffff000,
110 .pvr_value = 0x00090000,
112 .cpu_features = CPU_FTRS_604,
113 .cpu_user_features = COMMON_PPC,
117 .cpu_setup = __setup_cpu_604
120 .pvr_mask = 0xffff0000,
121 .pvr_value = 0x00090000,
123 .cpu_features = CPU_FTRS_604,
124 .cpu_user_features = COMMON_PPC,
128 .cpu_setup = __setup_cpu_604
131 .pvr_mask = 0xffff0000,
132 .pvr_value = 0x000a0000,
134 .cpu_features = CPU_FTRS_604,
135 .cpu_user_features = COMMON_PPC,
139 .cpu_setup = __setup_cpu_604
141 { /* 740/750 (0x4202, don't support TAU ?) */
142 .pvr_mask = 0xffffffff,
143 .pvr_value = 0x00084202,
144 .cpu_name = "740/750",
145 .cpu_features = CPU_FTRS_740_NOTAU,
146 .cpu_user_features = COMMON_PPC,
150 .cpu_setup = __setup_cpu_750
152 { /* 750CX (80100 and 8010x?) */
153 .pvr_mask = 0xfffffff0,
154 .pvr_value = 0x00080100,
156 .cpu_features = CPU_FTRS_750,
157 .cpu_user_features = COMMON_PPC,
161 .cpu_setup = __setup_cpu_750cx
163 { /* 750CX (82201 and 82202) */
164 .pvr_mask = 0xfffffff0,
165 .pvr_value = 0x00082200,
167 .cpu_features = CPU_FTRS_750,
168 .cpu_user_features = COMMON_PPC,
172 .cpu_setup = __setup_cpu_750cx
174 { /* 750CXe (82214) */
175 .pvr_mask = 0xfffffff0,
176 .pvr_value = 0x00082210,
177 .cpu_name = "750CXe",
178 .cpu_features = CPU_FTRS_750,
179 .cpu_user_features = COMMON_PPC,
183 .cpu_setup = __setup_cpu_750cx
185 { /* 750CXe "Gekko" (83214) */
186 .pvr_mask = 0xffffffff,
187 .pvr_value = 0x00083214,
188 .cpu_name = "750CXe",
189 .cpu_features = CPU_FTRS_750,
190 .cpu_user_features = COMMON_PPC,
194 .cpu_setup = __setup_cpu_750cx
197 .pvr_mask = 0xfffff000,
198 .pvr_value = 0x00083000,
199 .cpu_name = "745/755",
200 .cpu_features = CPU_FTRS_750,
201 .cpu_user_features = COMMON_PPC,
205 .cpu_setup = __setup_cpu_750
207 { /* 750FX rev 1.x */
208 .pvr_mask = 0xffffff00,
209 .pvr_value = 0x70000100,
211 .cpu_features = CPU_FTRS_750FX1,
212 .cpu_user_features = COMMON_PPC,
216 .cpu_setup = __setup_cpu_750
218 { /* 750FX rev 2.0 must disable HID0[DPM] */
219 .pvr_mask = 0xffffffff,
220 .pvr_value = 0x70000200,
222 .cpu_features = CPU_FTRS_750FX2,
223 .cpu_user_features = COMMON_PPC,
227 .cpu_setup = __setup_cpu_750
229 { /* 750FX (All revs except 2.0) */
230 .pvr_mask = 0xffff0000,
231 .pvr_value = 0x70000000,
233 .cpu_features = CPU_FTRS_750FX,
234 .cpu_user_features = COMMON_PPC,
238 .cpu_setup = __setup_cpu_750fx
241 .pvr_mask = 0xffff0000,
242 .pvr_value = 0x70020000,
244 .cpu_features = CPU_FTRS_750GX,
245 .cpu_user_features = COMMON_PPC,
249 .cpu_setup = __setup_cpu_750fx
251 { /* 740/750 (L2CR bit need fixup for 740) */
252 .pvr_mask = 0xffff0000,
253 .pvr_value = 0x00080000,
254 .cpu_name = "740/750",
255 .cpu_features = CPU_FTRS_740,
256 .cpu_user_features = COMMON_PPC,
260 .cpu_setup = __setup_cpu_750
262 { /* 7400 rev 1.1 ? (no TAU) */
263 .pvr_mask = 0xffffffff,
264 .pvr_value = 0x000c1101,
265 .cpu_name = "7400 (1.1)",
266 .cpu_features = CPU_FTRS_7400_NOTAU,
267 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
271 .cpu_setup = __setup_cpu_7400
274 .pvr_mask = 0xffff0000,
275 .pvr_value = 0x000c0000,
277 .cpu_features = CPU_FTRS_7400,
278 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
282 .cpu_setup = __setup_cpu_7400
285 .pvr_mask = 0xffff0000,
286 .pvr_value = 0x800c0000,
288 .cpu_features = CPU_FTRS_7400,
289 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
293 .cpu_setup = __setup_cpu_7410
295 { /* 7450 2.0 - no doze/nap */
296 .pvr_mask = 0xffffffff,
297 .pvr_value = 0x80000200,
299 .cpu_features = CPU_FTRS_7450_20,
300 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
304 .cpu_setup = __setup_cpu_745x
307 .pvr_mask = 0xffffffff,
308 .pvr_value = 0x80000201,
310 .cpu_features = CPU_FTRS_7450_21,
311 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
315 .cpu_setup = __setup_cpu_745x
317 { /* 7450 2.3 and newer */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x80000000,
321 .cpu_features = CPU_FTRS_7450_23,
322 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
326 .cpu_setup = __setup_cpu_745x
329 .pvr_mask = 0xffffff00,
330 .pvr_value = 0x80010100,
332 .cpu_features = CPU_FTRS_7455_1,
333 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
337 .cpu_setup = __setup_cpu_745x
340 .pvr_mask = 0xffffffff,
341 .pvr_value = 0x80010200,
343 .cpu_features = CPU_FTRS_7455_20,
344 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
348 .cpu_setup = __setup_cpu_745x
351 .pvr_mask = 0xffff0000,
352 .pvr_value = 0x80010000,
354 .cpu_features = CPU_FTRS_7455,
355 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
359 .cpu_setup = __setup_cpu_745x
361 { /* 7447/7457 Rev 1.0 */
362 .pvr_mask = 0xffffffff,
363 .pvr_value = 0x80020100,
364 .cpu_name = "7447/7457",
365 .cpu_features = CPU_FTRS_7447_10,
366 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
370 .cpu_setup = __setup_cpu_745x
372 { /* 7447/7457 Rev 1.1 */
373 .pvr_mask = 0xffffffff,
374 .pvr_value = 0x80020101,
375 .cpu_name = "7447/7457",
376 .cpu_features = CPU_FTRS_7447_10,
377 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
381 .cpu_setup = __setup_cpu_745x
383 { /* 7447/7457 Rev 1.2 and later */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x80020000,
386 .cpu_name = "7447/7457",
387 .cpu_features = CPU_FTRS_7447,
388 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
392 .cpu_setup = __setup_cpu_745x
395 .pvr_mask = 0xffff0000,
396 .pvr_value = 0x80030000,
398 .cpu_features = CPU_FTRS_7447A,
399 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
403 .cpu_setup = __setup_cpu_745x
406 .pvr_mask = 0xffff0000,
407 .pvr_value = 0x80040000,
409 .cpu_features = CPU_FTRS_7447A,
410 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
414 .cpu_setup = __setup_cpu_745x
416 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
417 .pvr_mask = 0x7fff0000,
418 .pvr_value = 0x00810000,
420 .cpu_features = CPU_FTRS_82XX,
421 .cpu_user_features = COMMON_PPC,
424 .cpu_setup = __setup_cpu_603
426 { /* All G2_LE (603e core, plus some) have the same pvr */
427 .pvr_mask = 0x7fff0000,
428 .pvr_value = 0x00820000,
430 .cpu_features = CPU_FTRS_G2_LE,
431 .cpu_user_features = COMMON_PPC,
434 .cpu_setup = __setup_cpu_603
436 { /* e300 (a 603e core, plus some) on 83xx */
437 .pvr_mask = 0x7fff0000,
438 .pvr_value = 0x00830000,
440 .cpu_features = CPU_FTRS_E300,
441 .cpu_user_features = COMMON_PPC,
444 .cpu_setup = __setup_cpu_603
446 { /* default match, we assume split I/D cache & TB (non-601)... */
447 .pvr_mask = 0x00000000,
448 .pvr_value = 0x00000000,
449 .cpu_name = "(generic PPC)",
450 .cpu_features = CPU_FTRS_CLASSIC32,
451 .cpu_user_features = COMMON_PPC,
454 .cpu_setup = __setup_cpu_generic
456 #endif /* CLASSIC_PPC */
457 #ifdef CONFIG_PPC64BRIDGE
459 .pvr_mask = 0xffff0000,
460 .pvr_value = 0x00400000,
461 .cpu_name = "Power3 (630)",
462 .cpu_features = CPU_FTRS_POWER3_32,
463 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
467 .cpu_setup = __setup_cpu_power3
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x00410000,
472 .cpu_name = "Power3 (630+)",
473 .cpu_features = CPU_FTRS_POWER3_32,
474 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
478 .cpu_setup = __setup_cpu_power3
481 .pvr_mask = 0xffff0000,
482 .pvr_value = 0x00360000,
483 .cpu_name = "I-star",
484 .cpu_features = CPU_FTRS_POWER3_32,
485 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
489 .cpu_setup = __setup_cpu_power3
492 .pvr_mask = 0xffff0000,
493 .pvr_value = 0x00370000,
494 .cpu_name = "S-star",
495 .cpu_features = CPU_FTRS_POWER3_32,
496 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
500 .cpu_setup = __setup_cpu_power3
502 #endif /* CONFIG_PPC64BRIDGE */
505 .pvr_mask = 0xffff0000,
506 .pvr_value = 0x003c0000,
507 .cpu_name = "PPC970FX",
508 .cpu_features = CPU_FTRS_970_32,
509 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
513 .cpu_setup = __setup_cpu_ppc970
515 #endif /* CONFIG_POWER4 */
518 .pvr_mask = 0xffff0000,
519 .pvr_value = 0x00500000,
521 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
522 * if the 8xx code is there.... */
523 .cpu_features = CPU_FTRS_8XX,
524 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
528 #endif /* CONFIG_8xx */
531 .pvr_mask = 0xffffff00,
532 .pvr_value = 0x00200200,
534 .cpu_features = CPU_FTRS_40X,
535 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
540 .pvr_mask = 0xffffff00,
541 .pvr_value = 0x00201400,
542 .cpu_name = "403GCX",
543 .cpu_features = CPU_FTRS_40X,
544 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
549 .pvr_mask = 0xffff0000,
550 .pvr_value = 0x00200000,
551 .cpu_name = "403G ??",
552 .cpu_features = CPU_FTRS_40X,
553 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
558 .pvr_mask = 0xffff0000,
559 .pvr_value = 0x40110000,
561 .cpu_features = CPU_FTRS_40X,
562 .cpu_user_features = PPC_FEATURE_32 |
563 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
568 .pvr_mask = 0xffff0000,
569 .pvr_value = 0x40130000,
570 .cpu_name = "STB03xxx",
571 .cpu_features = CPU_FTRS_40X,
572 .cpu_user_features = PPC_FEATURE_32 |
573 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
578 .pvr_mask = 0xffff0000,
579 .pvr_value = 0x41810000,
580 .cpu_name = "STB04xxx",
581 .cpu_features = CPU_FTRS_40X,
582 .cpu_user_features = PPC_FEATURE_32 |
583 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
588 .pvr_mask = 0xffff0000,
589 .pvr_value = 0x41610000,
590 .cpu_name = "NP405L",
591 .cpu_features = CPU_FTRS_40X,
592 .cpu_user_features = PPC_FEATURE_32 |
593 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
598 .pvr_mask = 0xffff0000,
599 .pvr_value = 0x40B10000,
600 .cpu_name = "NP4GS3",
601 .cpu_features = CPU_FTRS_40X,
602 .cpu_user_features = PPC_FEATURE_32 |
603 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
608 .pvr_mask = 0xffff0000,
609 .pvr_value = 0x41410000,
610 .cpu_name = "NP405H",
611 .cpu_features = CPU_FTRS_40X,
612 .cpu_user_features = PPC_FEATURE_32 |
613 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
618 .pvr_mask = 0xffff0000,
619 .pvr_value = 0x50910000,
620 .cpu_name = "405GPr",
621 .cpu_features = CPU_FTRS_40X,
622 .cpu_user_features = PPC_FEATURE_32 |
623 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
628 .pvr_mask = 0xffff0000,
629 .pvr_value = 0x51510000,
630 .cpu_name = "STBx25xx",
631 .cpu_features = CPU_FTRS_40X,
632 .cpu_user_features = PPC_FEATURE_32 |
633 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
638 .pvr_mask = 0xffff0000,
639 .pvr_value = 0x41F10000,
641 .cpu_features = CPU_FTRS_40X,
642 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
646 { /* Xilinx Virtex-II Pro */
647 .pvr_mask = 0xffff0000,
648 .pvr_value = 0x20010000,
649 .cpu_name = "Virtex-II Pro",
650 .cpu_features = CPU_FTRS_40X,
651 .cpu_user_features = PPC_FEATURE_32 |
652 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
657 .pvr_mask = 0xffff0000,
658 .pvr_value = 0x51210000,
660 .cpu_features = CPU_FTRS_40X,
661 .cpu_user_features = PPC_FEATURE_32 |
662 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
667 #endif /* CONFIG_40x */
670 .pvr_mask = 0xf0000fff,
671 .pvr_value = 0x40000850,
672 .cpu_name = "440EP Rev. A",
673 .cpu_features = CPU_FTRS_44X,
674 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
679 .pvr_mask = 0xf0000fff,
680 .pvr_value = 0x400008d3,
681 .cpu_name = "440EP Rev. B",
682 .cpu_features = CPU_FTRS_44X,
683 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
688 .pvr_mask = 0xf0000fff,
689 .pvr_value = 0x40000440,
690 .cpu_name = "440GP Rev. B",
691 .cpu_features = CPU_FTRS_44X,
692 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
697 .pvr_mask = 0xf0000fff,
698 .pvr_value = 0x40000481,
699 .cpu_name = "440GP Rev. C",
700 .cpu_features = CPU_FTRS_44X,
701 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
706 .pvr_mask = 0xf0000fff,
707 .pvr_value = 0x50000850,
708 .cpu_name = "440GX Rev. A",
709 .cpu_features = CPU_FTRS_44X,
710 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
715 .pvr_mask = 0xf0000fff,
716 .pvr_value = 0x50000851,
717 .cpu_name = "440GX Rev. B",
718 .cpu_features = CPU_FTRS_44X,
719 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
724 .pvr_mask = 0xf0000fff,
725 .pvr_value = 0x50000892,
726 .cpu_name = "440GX Rev. C",
727 .cpu_features = CPU_FTRS_44X,
728 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
733 .pvr_mask = 0xf0000fff,
734 .pvr_value = 0x50000894,
735 .cpu_name = "440GX Rev. F",
736 .cpu_features = CPU_FTRS_44X,
737 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
742 .pvr_mask = 0xff000fff,
743 .pvr_value = 0x53000891,
744 .cpu_name = "440SP Rev. A",
745 .cpu_features = CPU_FTRS_44X,
746 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
750 #endif /* CONFIG_44x */
751 #ifdef CONFIG_FSL_BOOKE
753 .pvr_mask = 0xfff00000,
754 .pvr_value = 0x81000000,
755 .cpu_name = "e200z5",
756 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
757 .cpu_features = CPU_FTRS_E200,
758 .cpu_user_features = PPC_FEATURE_32 |
759 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
760 PPC_FEATURE_UNIFIED_CACHE,
764 .pvr_mask = 0xfff00000,
765 .pvr_value = 0x81100000,
766 .cpu_name = "e200z6",
767 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
768 .cpu_features = CPU_FTRS_E200,
769 .cpu_user_features = PPC_FEATURE_32 |
770 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
771 PPC_FEATURE_HAS_EFP_SINGLE |
772 PPC_FEATURE_UNIFIED_CACHE,
776 .pvr_mask = 0xffff0000,
777 .pvr_value = 0x80200000,
779 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
780 .cpu_features = CPU_FTRS_E500,
781 .cpu_user_features = PPC_FEATURE_32 |
782 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
783 PPC_FEATURE_HAS_EFP_SINGLE,
789 .pvr_mask = 0xffff0000,
790 .pvr_value = 0x80210000,
791 .cpu_name = "e500v2",
792 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
793 .cpu_features = CPU_FTRS_E500_2,
794 .cpu_user_features = PPC_FEATURE_32 |
795 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
796 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
803 { /* default match */
804 .pvr_mask = 0x00000000,
805 .pvr_value = 0x00000000,
806 .cpu_name = "(generic PPC)",
807 .cpu_features = CPU_FTRS_GENERIC_32,
808 .cpu_user_features = PPC_FEATURE_32,
812 #endif /* !CLASSIC_PPC */