arch/sparc64/kernel/irq.c

   1 /* $Id: irq.c,v 1.114 2002/01/11 08:45:38 davem Exp $
   2  * irq.c: UltraSparc IRQ handling/init/registry.
   3  *
   4  * Copyright (C) 1997  David S. Miller  (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   6  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/sched.h>
  11 #include <linux/ptrace.h>
  12 #include <linux/errno.h>
  13 #include <linux/kernel_stat.h>
  14 #include <linux/signal.h>
  15 #include <linux/mm.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/slab.h>
  18 #include <linux/random.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/proc_fs.h>
  22 #include <linux/seq_file.h>
  23 #include <linux/bootmem.h>
  24 #include <linux/irq.h>
  25 #include <linux/msi.h>
  26
  27 #include <asm/ptrace.h>
  28 #include <asm/processor.h>
  29 #include <asm/atomic.h>
  30 #include <asm/system.h>
  31 #include <asm/irq.h>
  32 #include <asm/io.h>
  33 #include <asm/sbus.h>
  34 #include <asm/iommu.h>
  35 #include <asm/upa.h>
  36 #include <asm/oplib.h>
  37 #include <asm/prom.h>
  38 #include <asm/timer.h>
  39 #include <asm/smp.h>
  40 #include <asm/starfire.h>
  41 #include <asm/uaccess.h>
  42 #include <asm/cache.h>
  43 #include <asm/cpudata.h>
  44 #include <asm/auxio.h>
  45 #include <asm/head.h>
  46
  47 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  48  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  49  * delivered.  We must translate this into a non-vector IRQ so we can
  50  * set the softint on this cpu.
  51  *
  52  * To make processing these packets efficient and race free we use
  53  * an array of irq buckets below.  The interrupt vector handler in
  54  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  55  * The IVEC handler does not need to act atomically, the PIL dispatch
  56  * code uses CAS to get an atomic snapshot of the list and clear it
  57  * at the same time.
  58  *
  59  * If you make changes to ino_bucket, please update hand coded assembler
  60  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
  61  */
  62 struct ino_bucket {
  63         /* Next handler in per-CPU IRQ worklist.  We know that
  64          * bucket pointers have the high 32-bits clear, so to
  65          * save space we only store the bits we need.
  66          */
  67 /*0x00*/unsigned int irq_chain;
  68
  69         /* Virtual interrupt number assigned to this INO.  */
  70 /*0x04*/unsigned int virt_irq;
  71 };
  72
  73 #define NUM_IVECS       (IMAP_INR + 1)
  74 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  75
  76 #define __irq_ino(irq) \
  77         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
  78 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
  79 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
  80
  81 /* This has to be in the main kernel image, it cannot be
  82  * turned into per-cpu data.  The reason is that the main
  83  * kernel image is locked into the TLB and this structure
  84  * is accessed from the vectored interrupt trap handler.  If
  85  * access to this structure takes a TLB miss it could cause
  86  * the 5-level sparc v9 trap stack to overflow.
  87  */
  88 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  89
  90 static unsigned int virt_to_real_irq_table[NR_IRQS];
  91
  92 static unsigned char virt_irq_alloc(unsigned int real_irq)
  93 {
  94         unsigned char ent;
  95
  96         BUILD_BUG_ON(NR_IRQS >= 256);
  97
  98         for (ent = 1; ent < NR_IRQS; ent++) {
  99                 if (!virt_to_real_irq_table[ent])
 100                         break;
 101         }
 102         if (ent >= NR_IRQS) {
 103                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 104                 return 0;
 105         }
 106
 107         virt_to_real_irq_table[ent] = real_irq;
 108
 109         return ent;
 110 }
 111
 112 #ifdef CONFIG_PCI_MSI
 113 static void virt_irq_free(unsigned int virt_irq)
 114 {
 115         unsigned int real_irq;
 116
 117         if (virt_irq >= NR_IRQS)
 118                 return;
 119
 120         real_irq = virt_to_real_irq_table[virt_irq];
 121         virt_to_real_irq_table[virt_irq] = 0;
 122
 123         __bucket(real_irq)->virt_irq = 0;
 124 }
 125 #endif
 126
 127 static unsigned int virt_to_real_irq(unsigned char virt_irq)
 128 {
 129         return virt_to_real_irq_table[virt_irq];
 130 }
 131
 132 /*
 133  * /proc/interrupts printing:
 134  */
 135
 136 int show_interrupts(struct seq_file *p, void *v)
 137 {
 138         int i = *(loff_t *) v, j;
 139         struct irqaction * action;
 140         unsigned long flags;
 141
 142         if (i == 0) {
 143                 seq_printf(p, "           ");
 144                 for_each_online_cpu(j)
 145                         seq_printf(p, "CPU%d       ",j);
 146                 seq_putc(p, '\n');
 147         }
 148
 149         if (i < NR_IRQS) {
 150                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 151                 action = irq_desc[i].action;
 152                 if (!action)
 153                         goto skip;
 154                 seq_printf(p, "%3d: ",i);
 155 #ifndef CONFIG_SMP
 156                 seq_printf(p, "%10u ", kstat_irqs(i));
 157 #else
 158                 for_each_online_cpu(j)
 159                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 160 #endif
 161                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
 162                 seq_printf(p, "  %s", action->name);
 163
 164                 for (action=action->next; action; action = action->next)
 165                         seq_printf(p, ", %s", action->name);
 166
 167                 seq_putc(p, '\n');
 168 skip:
 169                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 170         }
 171         return 0;
 172 }
 173
 174 extern unsigned long real_hard_smp_processor_id(void);
 175
 176 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 177 {
 178         unsigned int tid;
 179
 180         if (this_is_starfire) {
 181                 tid = starfire_translate(imap, cpuid);
 182                 tid <<= IMAP_TID_SHIFT;
 183                 tid &= IMAP_TID_UPA;
 184         } else {
 185                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 186                         unsigned long ver;
 187
 188                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 189                         if ((ver >> 32UL) == __JALAPENO_ID ||
 190                             (ver >> 32UL) == __SERRANO_ID) {
 191                                 tid = cpuid << IMAP_TID_SHIFT;
 192                                 tid &= IMAP_TID_JBUS;
 193                         } else {
 194                                 unsigned int a = cpuid & 0x1f;
 195                                 unsigned int n = (cpuid >> 5) & 0x1f;
 196
 197                                 tid = ((a << IMAP_AID_SHIFT) |
 198                                        (n << IMAP_NID_SHIFT));
 199                                 tid &= (IMAP_AID_SAFARI |
 200                                         IMAP_NID_SAFARI);;
 201                         }
 202                 } else {
 203                         tid = cpuid << IMAP_TID_SHIFT;
 204                         tid &= IMAP_TID_UPA;
 205                 }
 206         }
 207
 208         return tid;
 209 }
 210
 211 struct irq_handler_data {
 212         unsigned long   iclr;
 213         unsigned long   imap;
 214
 215         void            (*pre_handler)(unsigned int, void *, void *);
 216         void            *pre_handler_arg1;
 217         void            *pre_handler_arg2;
 218 };
 219
 220 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
 221 {
 222         unsigned int real_irq = virt_to_real_irq(virt_irq);
 223         struct ino_bucket *bucket = NULL;
 224
 225         if (likely(real_irq))
 226                 bucket = __bucket(real_irq);
 227
 228         return bucket;
 229 }
 230
 231 #ifdef CONFIG_SMP
 232 static int irq_choose_cpu(unsigned int virt_irq)
 233 {
 234         cpumask_t mask = irq_desc[virt_irq].affinity;
 235         int cpuid;
 236
 237         if (cpus_equal(mask, CPU_MASK_ALL)) {
 238                 static int irq_rover;
 239                 static DEFINE_SPINLOCK(irq_rover_lock);
 240                 unsigned long flags;
 241
 242                 /* Round-robin distribution... */
 243         do_round_robin:
 244                 spin_lock_irqsave(&irq_rover_lock, flags);
 245
 246                 while (!cpu_online(irq_rover)) {
 247                         if (++irq_rover >= NR_CPUS)
 248                                 irq_rover = 0;
 249                 }
 250                 cpuid = irq_rover;
 251                 do {
 252                         if (++irq_rover >= NR_CPUS)
 253                                 irq_rover = 0;
 254                 } while (!cpu_online(irq_rover));
 255
 256                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 257         } else {
 258                 cpumask_t tmp;
 259
 260                 cpus_and(tmp, cpu_online_map, mask);
 261
 262                 if (cpus_empty(tmp))
 263                         goto do_round_robin;
 264
 265                 cpuid = first_cpu(tmp);
 266         }
 267
 268         return cpuid;
 269 }
 270 #else
 271 static int irq_choose_cpu(unsigned int virt_irq)
 272 {
 273         return real_hard_smp_processor_id();
 274 }
 275 #endif
 276
 277 static void sun4u_irq_enable(unsigned int virt_irq)
 278 {
 279         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 280
 281         if (likely(data)) {
 282                 unsigned long cpuid, imap, val;
 283                 unsigned int tid;
 284
 285                 cpuid = irq_choose_cpu(virt_irq);
 286                 imap = data->imap;
 287
 288                 tid = sun4u_compute_tid(imap, cpuid);
 289
 290                 val = upa_readq(imap);
 291                 val &= ~(IMAP_TID_UPA | IMAP_TID_JBUS |
 292                          IMAP_AID_SAFARI | IMAP_NID_SAFARI);
 293                 val |= tid | IMAP_VALID;
 294                 upa_writeq(val, imap);
 295         }
 296 }
 297
 298 static void sun4u_irq_disable(unsigned int virt_irq)
 299 {
 300         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 301
 302         if (likely(data)) {
 303                 unsigned long imap = data->imap;
 304                 u32 tmp = upa_readq(imap);
 305
 306                 tmp &= ~IMAP_VALID;
 307                 upa_writeq(tmp, imap);
 308         }
 309 }
 310
 311 static void sun4u_irq_end(unsigned int virt_irq)
 312 {
 313         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 314
 315         if (likely(data))
 316                 upa_writeq(ICLR_IDLE, data->iclr);
 317 }
 318
 319 static void sun4v_irq_enable(unsigned int virt_irq)
 320 {
 321         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 322         unsigned int ino = bucket - &ivector_table[0];
 323
 324         if (likely(bucket)) {
 325                 unsigned long cpuid;
 326                 int err;
 327
 328                 cpuid = irq_choose_cpu(virt_irq);
 329
 330                 err = sun4v_intr_settarget(ino, cpuid);
 331                 if (err != HV_EOK)
 332                         printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
 333                                ino, cpuid, err);
 334                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 335                 if (err != HV_EOK)
 336                         printk("sun4v_intr_setenabled(%x): err(%d)\n",
 337                                ino, err);
 338         }
 339 }
 340
 341 static void sun4v_irq_disable(unsigned int virt_irq)
 342 {
 343         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 344         unsigned int ino = bucket - &ivector_table[0];
 345
 346         if (likely(bucket)) {
 347                 int err;
 348
 349                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 350                 if (err != HV_EOK)
 351                         printk("sun4v_intr_setenabled(%x): "
 352                                "err(%d)\n", ino, err);
 353         }
 354 }
 355
 356 #ifdef CONFIG_PCI_MSI
 357 static void sun4v_msi_enable(unsigned int virt_irq)
 358 {
 359         sun4v_irq_enable(virt_irq);
 360         unmask_msi_irq(virt_irq);
 361 }
 362
 363 static void sun4v_msi_disable(unsigned int virt_irq)
 364 {
 365         mask_msi_irq(virt_irq);
 366         sun4v_irq_disable(virt_irq);
 367 }
 368 #endif
 369
 370 static void sun4v_irq_end(unsigned int virt_irq)
 371 {
 372         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 373         unsigned int ino = bucket - &ivector_table[0];
 374
 375         if (likely(bucket)) {
 376                 int err;
 377
 378                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 379                 if (err != HV_EOK)
 380                         printk("sun4v_intr_setstate(%x): "
 381                                "err(%d)\n", ino, err);
 382         }
 383 }
 384
 385 static void run_pre_handler(unsigned int virt_irq)
 386 {
 387         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 388         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 389
 390         if (likely(data->pre_handler)) {
 391                 data->pre_handler(__irq_ino(__irq(bucket)),
 392                                   data->pre_handler_arg1,
 393                                   data->pre_handler_arg2);
 394         }
 395 }
 396
 397 static struct irq_chip sun4u_irq = {
 398         .typename       = "sun4u",
 399         .enable         = sun4u_irq_enable,
 400         .disable        = sun4u_irq_disable,
 401         .end            = sun4u_irq_end,
 402 };
 403
 404 static struct irq_chip sun4u_irq_ack = {
 405         .typename       = "sun4u+ack",
 406         .enable         = sun4u_irq_enable,
 407         .disable        = sun4u_irq_disable,
 408         .ack            = run_pre_handler,
 409         .end            = sun4u_irq_end,
 410 };
 411
 412 static struct irq_chip sun4v_irq = {
 413         .typename       = "sun4v",
 414         .enable         = sun4v_irq_enable,
 415         .disable        = sun4v_irq_disable,
 416         .end            = sun4v_irq_end,
 417 };
 418
 419 static struct irq_chip sun4v_irq_ack = {
 420         .typename       = "sun4v+ack",
 421         .enable         = sun4v_irq_enable,
 422         .disable        = sun4v_irq_disable,
 423         .ack            = run_pre_handler,
 424         .end            = sun4v_irq_end,
 425 };
 426
 427 #ifdef CONFIG_PCI_MSI
 428 static struct irq_chip sun4v_msi = {
 429         .typename       = "sun4v+msi",
 430         .mask           = mask_msi_irq,
 431         .unmask         = unmask_msi_irq,
 432         .enable         = sun4v_msi_enable,
 433         .disable        = sun4v_msi_disable,
 434         .ack            = run_pre_handler,
 435         .end            = sun4v_irq_end,
 436 };
 437 #endif
 438
 439 void irq_install_pre_handler(int virt_irq,
 440                              void (*func)(unsigned int, void *, void *),
 441                              void *arg1, void *arg2)
 442 {
 443         struct irq_handler_data *data = get_irq_chip_data(virt_irq);
 444         struct irq_chip *chip;
 445
 446         data->pre_handler = func;
 447         data->pre_handler_arg1 = arg1;
 448         data->pre_handler_arg2 = arg2;
 449
 450         chip = get_irq_chip(virt_irq);
 451         if (chip == &sun4u_irq_ack ||
 452             chip == &sun4v_irq_ack
 453 #ifdef CONFIG_PCI_MSI
 454             || chip == &sun4v_msi
 455 #endif
 456             )
 457                 return;
 458
 459         chip = (chip == &sun4u_irq ?
 460                 &sun4u_irq_ack : &sun4v_irq_ack);
 461         set_irq_chip(virt_irq, chip);
 462 }
 463
 464 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 465 {
 466         struct ino_bucket *bucket;
 467         struct irq_handler_data *data;
 468         int ino;
 469
 470         BUG_ON(tlb_type == hypervisor);
 471
 472         ino = (upa_readq(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 473         bucket = &ivector_table[ino];
 474         if (!bucket->virt_irq) {
 475                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 476                 set_irq_chip(bucket->virt_irq, &sun4u_irq);
 477         }
 478
 479         data = get_irq_chip_data(bucket->virt_irq);
 480         if (unlikely(data))
 481                 goto out;
 482
 483         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 484         if (unlikely(!data)) {
 485                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 486                 prom_halt();
 487         }
 488         set_irq_chip_data(bucket->virt_irq, data);
 489
 490         data->imap  = imap;
 491         data->iclr  = iclr;
 492
 493 out:
 494         return bucket->virt_irq;
 495 }
 496
 497 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 498 {
 499         struct ino_bucket *bucket;
 500         struct irq_handler_data *data;
 501         unsigned long sysino;
 502
 503         BUG_ON(tlb_type != hypervisor);
 504
 505         sysino = sun4v_devino_to_sysino(devhandle, devino);
 506         bucket = &ivector_table[sysino];
 507         if (!bucket->virt_irq) {
 508                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 509                 set_irq_chip(bucket->virt_irq, &sun4v_irq);
 510         }
 511
 512         data = get_irq_chip_data(bucket->virt_irq);
 513         if (unlikely(data))
 514                 goto out;
 515
 516         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 517         if (unlikely(!data)) {
 518                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 519                 prom_halt();
 520         }
 521         set_irq_chip_data(bucket->virt_irq, data);
 522
 523         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 524          * is done by hypervisor calls on sun4v platforms, not by direct
 525          * register accesses.
 526          */
 527         data->imap = ~0UL;
 528         data->iclr = ~0UL;
 529
 530 out:
 531         return bucket->virt_irq;
 532 }
 533
 534 #ifdef CONFIG_PCI_MSI
 535 unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
 536                              unsigned int msi_start, unsigned int msi_end)
 537 {
 538         struct ino_bucket *bucket;
 539         struct irq_handler_data *data;
 540         unsigned long sysino;
 541         unsigned int devino;
 542
 543         BUG_ON(tlb_type != hypervisor);
 544
 545         /* Find a free devino in the given range.  */
 546         for (devino = msi_start; devino < msi_end; devino++) {
 547                 sysino = sun4v_devino_to_sysino(devhandle, devino);
 548                 bucket = &ivector_table[sysino];
 549                 if (!bucket->virt_irq)
 550                         break;
 551         }
 552         if (devino >= msi_end)
 553                 return 0;
 554
 555         sysino = sun4v_devino_to_sysino(devhandle, devino);
 556         bucket = &ivector_table[sysino];
 557         bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 558         *virt_irq_p = bucket->virt_irq;
 559         set_irq_chip(bucket->virt_irq, &sun4v_msi);
 560
 561         data = get_irq_chip_data(bucket->virt_irq);
 562         if (unlikely(data))
 563                 return devino;
 564
 565         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 566         if (unlikely(!data)) {
 567                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 568                 prom_halt();
 569         }
 570         set_irq_chip_data(bucket->virt_irq, data);
 571
 572         data->imap = ~0UL;
 573         data->iclr = ~0UL;
 574
 575         return devino;
 576 }
 577
 578 void sun4v_destroy_msi(unsigned int virt_irq)
 579 {
 580         virt_irq_free(virt_irq);
 581 }
 582 #endif
 583
 584 void ack_bad_irq(unsigned int virt_irq)
 585 {
 586         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 587         unsigned int ino = 0xdeadbeef;
 588
 589         if (bucket)
 590                 ino = bucket - &ivector_table[0];
 591
 592         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 593                ino, virt_irq);
 594 }
 595
 596 void handler_irq(int irq, struct pt_regs *regs)
 597 {
 598         struct ino_bucket *bucket;
 599         struct pt_regs *old_regs;
 600
 601         clear_softint(1 << irq);
 602
 603         old_regs = set_irq_regs(regs);
 604         irq_enter();
 605
 606         /* Sliiiick... */
 607         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
 608         while (bucket) {
 609                 struct ino_bucket *next = __bucket(bucket->irq_chain);
 610
 611                 bucket->irq_chain = 0;
 612                 __do_IRQ(bucket->virt_irq);
 613
 614                 bucket = next;
 615         }
 616
 617         irq_exit();
 618         set_irq_regs(old_regs);
 619 }
 620
 621 struct sun5_timer {
 622         u64     count0;
 623         u64     limit0;
 624         u64     count1;
 625         u64     limit1;
 626 };
 627
 628 static struct sun5_timer *prom_timers;
 629 static u64 prom_limit0, prom_limit1;
 630
 631 static void map_prom_timers(void)
 632 {
 633         struct device_node *dp;
 634         const unsigned int *addr;
 635
 636         /* PROM timer node hangs out in the top level of device siblings... */
 637         dp = of_find_node_by_path("/");
 638         dp = dp->child;
 639         while (dp) {
 640                 if (!strcmp(dp->name, "counter-timer"))
 641                         break;
 642                 dp = dp->sibling;
 643         }
 644
 645         /* Assume if node is not present, PROM uses different tick mechanism
 646          * which we should not care about.
 647          */
 648         if (!dp) {
 649                 prom_timers = (struct sun5_timer *) 0;
 650                 return;
 651         }
 652
 653         /* If PROM is really using this, it must be mapped by him. */
 654         addr = of_get_property(dp, "address", NULL);
 655         if (!addr) {
 656                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 657                 prom_timers = (struct sun5_timer *) 0;
 658                 return;
 659         }
 660         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 661 }
 662
 663 static void kill_prom_timer(void)
 664 {
 665         if (!prom_timers)
 666                 return;
 667
 668         /* Save them away for later. */
 669         prom_limit0 = prom_timers->limit0;
 670         prom_limit1 = prom_timers->limit1;
 671
 672         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 673          * We turn both off here just to be paranoid.
 674          */
 675         prom_timers->limit0 = 0;
 676         prom_timers->limit1 = 0;
 677
 678         /* Wheee, eat the interrupt packet too... */
 679         __asm__ __volatile__(
 680 "       mov     0x40, %%g2\n"
 681 "       ldxa    [%%g0] %0, %%g1\n"
 682 "       ldxa    [%%g2] %1, %%g1\n"
 683 "       stxa    %%g0, [%%g0] %0\n"
 684 "       membar  #Sync\n"
 685         : /* no outputs */
 686         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 687         : "g1", "g2");
 688 }
 689
 690 void init_irqwork_curcpu(void)
 691 {
 692         int cpu = hard_smp_processor_id();
 693
 694         trap_block[cpu].irq_worklist = 0;
 695 }
 696
 697 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type)
 698 {
 699         unsigned long num_entries = 128;
 700         unsigned long status;
 701
 702         status = sun4v_cpu_qconf(type, paddr, num_entries);
 703         if (status != HV_EOK) {
 704                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 705                             "err %lu\n", type, paddr, num_entries, status);
 706                 prom_halt();
 707         }
 708 }
 709
 710 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
 711 {
 712         struct trap_per_cpu *tb = &trap_block[this_cpu];
 713
 714         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO);
 715         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO);
 716         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR);
 717         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR);
 718 }
 719
 720 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, int use_bootmem)
 721 {
 722         void *page;
 723
 724         if (use_bootmem)
 725                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 726         else
 727                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 728
 729         if (!page) {
 730                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 731                 prom_halt();
 732         }
 733
 734         *pa_ptr = __pa(page);
 735 }
 736
 737 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, int use_bootmem)
 738 {
 739         void *page;
 740
 741         if (use_bootmem)
 742                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 743         else
 744                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 745
 746         if (!page) {
 747                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 748                 prom_halt();
 749         }
 750
 751         *pa_ptr = __pa(page);
 752 }
 753
 754 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
 755 {
 756 #ifdef CONFIG_SMP
 757         void *page;
 758
 759         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 760
 761         if (use_bootmem)
 762                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 763         else
 764                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 765
 766         if (!page) {
 767                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 768                 prom_halt();
 769         }
 770
 771         tb->cpu_mondo_block_pa = __pa(page);
 772         tb->cpu_list_pa = __pa(page + 64);
 773 #endif
 774 }
 775
 776 /* Allocate and register the mondo and error queues for this cpu.  */
 777 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
 778 {
 779         struct trap_per_cpu *tb = &trap_block[cpu];
 780
 781         if (alloc) {
 782                 alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
 783                 alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
 784                 alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
 785                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
 786                 alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
 787                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
 788
 789                 init_cpu_send_mondo_info(tb, use_bootmem);
 790         }
 791
 792         if (load) {
 793                 if (cpu != hard_smp_processor_id()) {
 794                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
 795                                     cpu, hard_smp_processor_id());
 796                         prom_halt();
 797                 }
 798                 sun4v_register_mondo_queues(cpu);
 799         }
 800 }
 801
 802 static struct irqaction timer_irq_action = {
 803         .name = "timer",
 804 };
 805
 806 /* Only invoked on boot processor. */
 807 void __init init_IRQ(void)
 808 {
 809         map_prom_timers();
 810         kill_prom_timer();
 811         memset(&ivector_table[0], 0, sizeof(ivector_table));
 812
 813         if (tlb_type == hypervisor)
 814                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
 815
 816         /* We need to clear any IRQ's pending in the soft interrupt
 817          * registers, a spurious one could be left around from the
 818          * PROM timer which we just disabled.
 819          */
 820         clear_softint(get_softint());
 821
 822         /* Now that ivector table is initialized, it is safe
 823          * to receive IRQ vector traps.  We will normally take
 824          * one or two right now, in case some device PROM used
 825          * to boot us wants to speak to us.  We just ignore them.
 826          */
 827         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
 828                              "or        %%g1, %0, %%g1\n\t"
 829                              "wrpr      %%g1, 0x0, %%pstate"
 830                              : /* No outputs */
 831                              : "i" (PSTATE_IE)
 832                              : "g1");
 833
 834         irq_desc[0].action = &timer_irq_action;
 835 }