x86: cpa, preserve large pages if possible
[powerpc.git] / arch / x86 / mm / pageattr.c
1 /*
2  * Copyright 2002 Andi Kleen, SuSE Labs.
3  * Thanks to Ben LaHaise for precious feedback.
4  */
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
10 #include <linux/mm.h>
11
12 #include <asm/e820.h>
13 #include <asm/processor.h>
14 #include <asm/tlbflush.h>
15 #include <asm/sections.h>
16 #include <asm/uaccess.h>
17 #include <asm/pgalloc.h>
18
19 struct cpa_data {
20         unsigned long   vaddr;
21         pgprot_t        mask_set;
22         pgprot_t        mask_clr;
23         int             numpages;
24         int             flushtlb;
25 };
26
27 enum {
28         CPA_NO_SPLIT = 0,
29         CPA_SPLIT,
30 };
31
32 static inline int
33 within(unsigned long addr, unsigned long start, unsigned long end)
34 {
35         return addr >= start && addr < end;
36 }
37
38 /*
39  * Flushing functions
40  */
41
42 /**
43  * clflush_cache_range - flush a cache range with clflush
44  * @addr:       virtual start address
45  * @size:       number of bytes to flush
46  *
47  * clflush is an unordered instruction which needs fencing with mfence
48  * to avoid ordering issues.
49  */
50 void clflush_cache_range(void *vaddr, unsigned int size)
51 {
52         void *vend = vaddr + size - 1;
53
54         mb();
55
56         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
57                 clflush(vaddr);
58         /*
59          * Flush any possible final partial cacheline:
60          */
61         clflush(vend);
62
63         mb();
64 }
65
66 static void __cpa_flush_all(void *arg)
67 {
68         unsigned long cache = (unsigned long)arg;
69
70         /*
71          * Flush all to work around Errata in early athlons regarding
72          * large page flushing.
73          */
74         __flush_tlb_all();
75
76         if (cache && boot_cpu_data.x86_model >= 4)
77                 wbinvd();
78 }
79
80 static void cpa_flush_all(unsigned long cache)
81 {
82         BUG_ON(irqs_disabled());
83
84         on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
85 }
86
87 static void __cpa_flush_range(void *arg)
88 {
89         /*
90          * We could optimize that further and do individual per page
91          * tlb invalidates for a low number of pages. Caveat: we must
92          * flush the high aliases on 64bit as well.
93          */
94         __flush_tlb_all();
95 }
96
97 static void cpa_flush_range(unsigned long start, int numpages, int cache)
98 {
99         unsigned int i, level;
100         unsigned long addr;
101
102         BUG_ON(irqs_disabled());
103         WARN_ON(PAGE_ALIGN(start) != start);
104
105         on_each_cpu(__cpa_flush_range, NULL, 1, 1);
106
107         if (!cache)
108                 return;
109
110         /*
111          * We only need to flush on one CPU,
112          * clflush is a MESI-coherent instruction that
113          * will cause all other CPUs to flush the same
114          * cachelines:
115          */
116         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
117                 pte_t *pte = lookup_address(addr, &level);
118
119                 /*
120                  * Only flush present addresses:
121                  */
122                 if (pte && pte_present(*pte))
123                         clflush_cache_range((void *) addr, PAGE_SIZE);
124         }
125 }
126
127 #define HIGH_MAP_START  __START_KERNEL_map
128 #define HIGH_MAP_END    (__START_KERNEL_map + KERNEL_TEXT_SIZE)
129
130
131 /*
132  * Converts a virtual address to a X86-64 highmap address
133  */
134 static unsigned long virt_to_highmap(void *address)
135 {
136 #ifdef CONFIG_X86_64
137         return __pa((unsigned long)address) + HIGH_MAP_START - phys_base;
138 #else
139         return (unsigned long)address;
140 #endif
141 }
142
143 /*
144  * Certain areas of memory on x86 require very specific protection flags,
145  * for example the BIOS area or kernel text. Callers don't always get this
146  * right (again, ioremap() on BIOS memory is not uncommon) so this function
147  * checks and fixes these known static required protection bits.
148  */
149 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address)
150 {
151         pgprot_t forbidden = __pgprot(0);
152
153         /*
154          * The BIOS area between 640k and 1Mb needs to be executable for
155          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
156          */
157         if (within(__pa(address), BIOS_BEGIN, BIOS_END))
158                 pgprot_val(forbidden) |= _PAGE_NX;
159
160         /*
161          * The kernel text needs to be executable for obvious reasons
162          * Does not cover __inittext since that is gone later on
163          */
164         if (within(address, (unsigned long)_text, (unsigned long)_etext))
165                 pgprot_val(forbidden) |= _PAGE_NX;
166         /*
167          * Do the same for the x86-64 high kernel mapping
168          */
169         if (within(address, virt_to_highmap(_text), virt_to_highmap(_etext)))
170                 pgprot_val(forbidden) |= _PAGE_NX;
171
172
173 #ifdef CONFIG_DEBUG_RODATA
174         /* The .rodata section needs to be read-only */
175         if (within(address, (unsigned long)__start_rodata,
176                                 (unsigned long)__end_rodata))
177                 pgprot_val(forbidden) |= _PAGE_RW;
178         /*
179          * Do the same for the x86-64 high kernel mapping
180          */
181         if (within(address, virt_to_highmap(__start_rodata),
182                                 virt_to_highmap(__end_rodata)))
183                 pgprot_val(forbidden) |= _PAGE_RW;
184 #endif
185
186         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
187
188         return prot;
189 }
190
191 pte_t *lookup_address(unsigned long address, int *level)
192 {
193         pgd_t *pgd = pgd_offset_k(address);
194         pud_t *pud;
195         pmd_t *pmd;
196
197         *level = PG_LEVEL_NONE;
198
199         if (pgd_none(*pgd))
200                 return NULL;
201         pud = pud_offset(pgd, address);
202         if (pud_none(*pud))
203                 return NULL;
204         pmd = pmd_offset(pud, address);
205         if (pmd_none(*pmd))
206                 return NULL;
207
208         *level = PG_LEVEL_2M;
209         if (pmd_large(*pmd))
210                 return (pte_t *)pmd;
211
212         *level = PG_LEVEL_4K;
213         return pte_offset_kernel(pmd, address);
214 }
215
216 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
217 {
218         /* change init_mm */
219         set_pte_atomic(kpte, pte);
220 #ifdef CONFIG_X86_32
221         if (!SHARED_KERNEL_PMD) {
222                 struct page *page;
223
224                 list_for_each_entry(page, &pgd_list, lru) {
225                         pgd_t *pgd;
226                         pud_t *pud;
227                         pmd_t *pmd;
228
229                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
230                         pud = pud_offset(pgd, address);
231                         pmd = pmd_offset(pud, address);
232                         set_pte_atomic((pte_t *)pmd, pte);
233                 }
234         }
235 #endif
236 }
237
238 static int try_preserve_large_page(pte_t *kpte, unsigned long address,
239                                    struct cpa_data *cpa)
240 {
241         unsigned long nextpage_addr, numpages, pmask, psize, flags;
242         pte_t new_pte, old_pte, *tmp;
243         pgprot_t old_prot, new_prot;
244         int level, res = CPA_SPLIT;
245
246         spin_lock_irqsave(&pgd_lock, flags);
247         /*
248          * Check for races, another CPU might have split this page
249          * up already:
250          */
251         tmp = lookup_address(address, &level);
252         if (tmp != kpte)
253                 goto out_unlock;
254
255         switch (level) {
256         case PG_LEVEL_2M:
257                 psize = LARGE_PAGE_SIZE;
258                 pmask = LARGE_PAGE_MASK;
259                 break;
260         case PG_LEVEL_1G:
261         default:
262                 res = -EINVAL;
263                 goto out_unlock;
264         }
265
266         /*
267          * Calculate the number of pages, which fit into this large
268          * page starting at address:
269          */
270         nextpage_addr = (address + psize) & pmask;
271         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
272         if (numpages < cpa->numpages)
273                 cpa->numpages = numpages;
274
275         /*
276          * We are safe now. Check whether the new pgprot is the same:
277          */
278         old_pte = *kpte;
279         old_prot = new_prot = pte_pgprot(old_pte);
280
281         pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
282         pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
283         new_prot = static_protections(new_prot, address);
284
285         /*
286          * If there are no changes, return. maxpages has been updated
287          * above:
288          */
289         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
290                 res = CPA_NO_SPLIT;
291                 goto out_unlock;
292         }
293
294         /*
295          * We need to change the attributes. Check, whether we can
296          * change the large page in one go. We request a split, when
297          * the address is not aligned and the number of pages is
298          * smaller than the number of pages in the large page. Note
299          * that we limited the number of possible pages already to
300          * the number of pages in the large page.
301          */
302         if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
303                 /*
304                  * The address is aligned and the number of pages
305                  * covers the full page.
306                  */
307                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
308                 __set_pmd_pte(kpte, address, new_pte);
309                 cpa->flushtlb = 1;
310                 res = CPA_NO_SPLIT;
311         }
312
313 out_unlock:
314         spin_unlock_irqrestore(&pgd_lock, flags);
315         return res;
316 }
317
318 static int split_large_page(pte_t *kpte, unsigned long address)
319 {
320         pgprot_t ref_prot = pte_pgprot(pte_clrhuge(*kpte));
321         gfp_t gfp_flags = GFP_KERNEL;
322         unsigned long flags, addr, pfn;
323         pte_t *pbase, *tmp;
324         struct page *base;
325         unsigned int i, level;
326
327 #ifdef CONFIG_DEBUG_PAGEALLOC
328         gfp_flags = __GFP_HIGH | __GFP_NOFAIL | __GFP_NOWARN;
329         gfp_flags = GFP_ATOMIC | __GFP_NOWARN;
330 #endif
331         base = alloc_pages(gfp_flags, 0);
332         if (!base)
333                 return -ENOMEM;
334
335         spin_lock_irqsave(&pgd_lock, flags);
336         /*
337          * Check for races, another CPU might have split this page
338          * up for us already:
339          */
340         tmp = lookup_address(address, &level);
341         if (tmp != kpte) {
342                 WARN_ON_ONCE(1);
343                 goto out_unlock;
344         }
345
346         address = __pa(address);
347         addr = address & LARGE_PAGE_MASK;
348         pbase = (pte_t *)page_address(base);
349 #ifdef CONFIG_X86_32
350         paravirt_alloc_pt(&init_mm, page_to_pfn(base));
351 #endif
352
353         /*
354          * Get the target pfn from the original entry:
355          */
356         pfn = pte_pfn(*kpte);
357         for (i = 0; i < PTRS_PER_PTE; i++, pfn++)
358                 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
359
360         /*
361          * Install the new, split up pagetable. Important detail here:
362          *
363          * On Intel the NX bit of all levels must be cleared to make a
364          * page executable. See section 4.13.2 of Intel 64 and IA-32
365          * Architectures Software Developer's Manual).
366          */
367         ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
368         __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
369         base = NULL;
370
371 out_unlock:
372         spin_unlock_irqrestore(&pgd_lock, flags);
373
374         if (base)
375                 __free_pages(base, 0);
376
377         return 0;
378 }
379
380 static int __change_page_attr(unsigned long address, struct cpa_data *cpa)
381 {
382         struct page *kpte_page;
383         int level, res;
384         pte_t *kpte;
385
386 repeat:
387         kpte = lookup_address(address, &level);
388         if (!kpte)
389                 return -EINVAL;
390
391         kpte_page = virt_to_page(kpte);
392         BUG_ON(PageLRU(kpte_page));
393         BUG_ON(PageCompound(kpte_page));
394
395         if (level == PG_LEVEL_4K) {
396                 pte_t new_pte, old_pte = *kpte;
397                 pgprot_t new_prot = pte_pgprot(old_pte);
398
399                 if(!pte_val(old_pte)) {
400                         printk(KERN_WARNING "CPA: called for zero pte. "
401                                "vaddr = %lx cpa->vaddr = %lx\n", address,
402                                 cpa->vaddr);
403                         WARN_ON(1);
404                         return -EINVAL;
405                 }
406
407                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
408                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
409
410                 new_prot = static_protections(new_prot, address);
411
412                 /*
413                  * We need to keep the pfn from the existing PTE,
414                  * after all we're only going to change it's attributes
415                  * not the memory it points to
416                  */
417                 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
418
419                 /*
420                  * Do we really change anything ?
421                  */
422                 if (pte_val(old_pte) != pte_val(new_pte)) {
423                         set_pte_atomic(kpte, new_pte);
424                         cpa->flushtlb = 1;
425                 }
426                 cpa->numpages = 1;
427                 return 0;
428         }
429
430         /*
431          * Check, whether we can keep the large page intact
432          * and just change the pte:
433          */
434         res = try_preserve_large_page(kpte, address, cpa);
435         if (res < 0)
436                 return res;
437
438         /*
439          * When the range fits into the existing large page,
440          * return. cp->numpages and cpa->tlbflush have been updated in
441          * try_large_page:
442          */
443         if (res == CPA_NO_SPLIT)
444                 return 0;
445
446         /*
447          * We have to split the large page:
448          */
449         res = split_large_page(kpte, address);
450         if (res)
451                 return res;
452         cpa->flushtlb = 1;
453         goto repeat;
454 }
455
456 /**
457  * change_page_attr_addr - Change page table attributes in linear mapping
458  * @address: Virtual address in linear mapping.
459  * @prot:    New page table attribute (PAGE_*)
460  *
461  * Change page attributes of a page in the direct mapping. This is a variant
462  * of change_page_attr() that also works on memory holes that do not have
463  * mem_map entry (pfn_valid() is false).
464  *
465  * See change_page_attr() documentation for more details.
466  *
467  * Modules and drivers should use the set_memory_* APIs instead.
468  */
469
470 static int change_page_attr_addr(struct cpa_data *cpa)
471 {
472         int err;
473         unsigned long address = cpa->vaddr;
474
475 #ifdef CONFIG_X86_64
476         unsigned long phys_addr = __pa(address);
477
478         /*
479          * If we are inside the high mapped kernel range, then we
480          * fixup the low mapping first. __va() returns the virtual
481          * address in the linear mapping:
482          */
483         if (within(address, HIGH_MAP_START, HIGH_MAP_END))
484                 address = (unsigned long) __va(phys_addr);
485 #endif
486
487         err = __change_page_attr(address, cpa);
488         if (err)
489                 return err;
490
491 #ifdef CONFIG_X86_64
492         /*
493          * If the physical address is inside the kernel map, we need
494          * to touch the high mapped kernel as well:
495          */
496         if (within(phys_addr, 0, KERNEL_TEXT_SIZE)) {
497                 /*
498                  * Calc the high mapping address. See __phys_addr()
499                  * for the non obvious details.
500                  *
501                  * Note that NX and other required permissions are
502                  * checked in static_protections().
503                  */
504                 address = phys_addr + HIGH_MAP_START - phys_base;
505
506                 /*
507                  * Our high aliases are imprecise, because we check
508                  * everything between 0 and KERNEL_TEXT_SIZE, so do
509                  * not propagate lookup failures back to users:
510                  */
511                 __change_page_attr(address, cpa);
512         }
513 #endif
514         return err;
515 }
516
517 static int __change_page_attr_set_clr(struct cpa_data *cpa)
518 {
519         int ret, numpages = cpa->numpages;
520
521         while (numpages) {
522                 /*
523                  * Store the remaining nr of pages for the large page
524                  * preservation check.
525                  */
526                 cpa->numpages = numpages;
527                 ret = change_page_attr_addr(cpa);
528                 if (ret)
529                         return ret;
530
531                 /*
532                  * Adjust the number of pages with the result of the
533                  * CPA operation. Either a large page has been
534                  * preserved or a single page update happened.
535                  */
536                 BUG_ON(cpa->numpages > numpages);
537                 numpages -= cpa->numpages;
538                 cpa->vaddr += cpa->numpages * PAGE_SIZE;
539         }
540         return 0;
541 }
542
543 static inline int cache_attr(pgprot_t attr)
544 {
545         return pgprot_val(attr) &
546                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
547 }
548
549 static int change_page_attr_set_clr(unsigned long addr, int numpages,
550                                     pgprot_t mask_set, pgprot_t mask_clr)
551 {
552         struct cpa_data cpa;
553         int ret, cache;
554
555         /*
556          * Check, if we are requested to change a not supported
557          * feature:
558          */
559         mask_set = canon_pgprot(mask_set);
560         mask_clr = canon_pgprot(mask_clr);
561         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
562                 return 0;
563
564         cpa.vaddr = addr;
565         cpa.numpages = numpages;
566         cpa.mask_set = mask_set;
567         cpa.mask_clr = mask_clr;
568         cpa.flushtlb = 0;
569
570         ret = __change_page_attr_set_clr(&cpa);
571
572         /*
573          * Check whether we really changed something:
574          */
575         if (!cpa.flushtlb)
576                 return ret;
577
578         /*
579          * No need to flush, when we did not set any of the caching
580          * attributes:
581          */
582         cache = cache_attr(mask_set);
583
584         /*
585          * On success we use clflush, when the CPU supports it to
586          * avoid the wbindv. If the CPU does not support it and in the
587          * error case we fall back to cpa_flush_all (which uses
588          * wbindv):
589          */
590         if (!ret && cpu_has_clflush)
591                 cpa_flush_range(addr, numpages, cache);
592         else
593                 cpa_flush_all(cache);
594
595         return ret;
596 }
597
598 static inline int change_page_attr_set(unsigned long addr, int numpages,
599                                        pgprot_t mask)
600 {
601         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
602 }
603
604 static inline int change_page_attr_clear(unsigned long addr, int numpages,
605                                          pgprot_t mask)
606 {
607         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
608 }
609
610 int set_memory_uc(unsigned long addr, int numpages)
611 {
612         return change_page_attr_set(addr, numpages,
613                                     __pgprot(_PAGE_PCD | _PAGE_PWT));
614 }
615 EXPORT_SYMBOL(set_memory_uc);
616
617 int set_memory_wb(unsigned long addr, int numpages)
618 {
619         return change_page_attr_clear(addr, numpages,
620                                       __pgprot(_PAGE_PCD | _PAGE_PWT));
621 }
622 EXPORT_SYMBOL(set_memory_wb);
623
624 int set_memory_x(unsigned long addr, int numpages)
625 {
626         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
627 }
628 EXPORT_SYMBOL(set_memory_x);
629
630 int set_memory_nx(unsigned long addr, int numpages)
631 {
632         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
633 }
634 EXPORT_SYMBOL(set_memory_nx);
635
636 int set_memory_ro(unsigned long addr, int numpages)
637 {
638         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
639 }
640
641 int set_memory_rw(unsigned long addr, int numpages)
642 {
643         return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
644 }
645
646 int set_memory_np(unsigned long addr, int numpages)
647 {
648         return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
649 }
650
651 int set_pages_uc(struct page *page, int numpages)
652 {
653         unsigned long addr = (unsigned long)page_address(page);
654
655         return set_memory_uc(addr, numpages);
656 }
657 EXPORT_SYMBOL(set_pages_uc);
658
659 int set_pages_wb(struct page *page, int numpages)
660 {
661         unsigned long addr = (unsigned long)page_address(page);
662
663         return set_memory_wb(addr, numpages);
664 }
665 EXPORT_SYMBOL(set_pages_wb);
666
667 int set_pages_x(struct page *page, int numpages)
668 {
669         unsigned long addr = (unsigned long)page_address(page);
670
671         return set_memory_x(addr, numpages);
672 }
673 EXPORT_SYMBOL(set_pages_x);
674
675 int set_pages_nx(struct page *page, int numpages)
676 {
677         unsigned long addr = (unsigned long)page_address(page);
678
679         return set_memory_nx(addr, numpages);
680 }
681 EXPORT_SYMBOL(set_pages_nx);
682
683 int set_pages_ro(struct page *page, int numpages)
684 {
685         unsigned long addr = (unsigned long)page_address(page);
686
687         return set_memory_ro(addr, numpages);
688 }
689
690 int set_pages_rw(struct page *page, int numpages)
691 {
692         unsigned long addr = (unsigned long)page_address(page);
693
694         return set_memory_rw(addr, numpages);
695 }
696
697 #ifdef CONFIG_DEBUG_PAGEALLOC
698
699 static int __set_pages_p(struct page *page, int numpages)
700 {
701         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
702                                 .numpages = numpages,
703                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
704                                 .mask_clr = __pgprot(0)};
705
706         return __change_page_attr_set_clr(&cpa);
707 }
708
709 static int __set_pages_np(struct page *page, int numpages)
710 {
711         struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
712                                 .numpages = numpages,
713                                 .mask_set = __pgprot(0),
714                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
715
716         return __change_page_attr_set_clr(&cpa);
717 }
718
719 void kernel_map_pages(struct page *page, int numpages, int enable)
720 {
721         if (PageHighMem(page))
722                 return;
723         if (!enable) {
724                 debug_check_no_locks_freed(page_address(page),
725                                            numpages * PAGE_SIZE);
726         }
727
728         /*
729          * If page allocator is not up yet then do not call c_p_a():
730          */
731         if (!debug_pagealloc_enabled)
732                 return;
733
734         /*
735          * The return value is ignored - the calls cannot fail,
736          * large pages are disabled at boot time:
737          */
738         if (enable)
739                 __set_pages_p(page, numpages);
740         else
741                 __set_pages_np(page, numpages);
742
743         /*
744          * We should perform an IPI and flush all tlbs,
745          * but that can deadlock->flush only current cpu:
746          */
747         __flush_tlb_all();
748 }
749 #endif
750
751 /*
752  * The testcases use internal knowledge of the implementation that shouldn't
753  * be exposed to the rest of the kernel. Include these directly here.
754  */
755 #ifdef CONFIG_CPA_DEBUG
756 #include "pageattr-test.c"
757 #endif