2 * Machine check handler.
3 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
4 * Rest from unknown author(s).
5 * 2004 Andi Kleen. Rewrote most of it.
8 #include <linux/init.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/string.h>
13 #include <linux/rcupdate.h>
14 #include <linux/kallsyms.h>
15 #include <linux/sysdev.h>
16 #include <linux/miscdevice.h>
18 #include <linux/cpu.h>
19 #include <linux/percpu.h>
20 #include <asm/processor.h>
23 #include <asm/kdebug.h>
24 #include <asm/uaccess.h>
26 #define MISC_MCELOG_MINOR 227
29 static int mce_dont_init;
31 /* 0: always panic, 1: panic if deadlock possible, 2: try to avoid panic,
32 3: never panic or exit (for testing only) */
33 static int tolerant = 1;
35 static unsigned long bank[NR_BANKS] = { [0 ... NR_BANKS-1] = ~0UL };
36 static unsigned long console_logged;
37 static int notify_user;
41 * Lockless MCE logging infrastructure.
42 * This avoids deadlocks on printk locks without having to break locks. Also
43 * separate MCEs from kernel messages to avoid bogus bug reports.
46 struct mce_log mcelog = {
51 void mce_log(struct mce *mce)
57 entry = rcu_dereference(mcelog.next);
58 /* When the buffer fills up discard new entries. Assume
59 that the earlier errors are the more interesting. */
60 if (entry >= MCE_LOG_LEN) {
61 set_bit(MCE_OVERFLOW, &mcelog.flags);
64 /* Old left over entry. Skip. */
65 if (mcelog.entry[entry].finished)
69 if (cmpxchg(&mcelog.next, entry, next) == entry)
72 memcpy(mcelog.entry + entry, mce, sizeof(struct mce));
74 mcelog.entry[entry].finished = 1;
77 if (!test_and_set_bit(0, &console_logged))
81 static void print_mce(struct mce *m)
83 printk(KERN_EMERG "\n"
85 "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
86 m->cpu, m->mcgstatus, m->bank, m->status);
89 "RIP%s %02x:<%016Lx> ",
90 !(m->mcgstatus & MCG_STATUS_EIPV) ? " !INEXACT!" : "",
92 if (m->cs == __KERNEL_CS)
93 print_symbol("{%s}", m->rip);
96 printk(KERN_EMERG "TSC %Lx ", m->tsc);
98 printk("ADDR %Lx ", m->addr);
100 printk("MISC %Lx ", m->misc);
104 static void mce_panic(char *msg, struct mce *backup, unsigned long start)
108 for (i = 0; i < MCE_LOG_LEN; i++) {
109 unsigned long tsc = mcelog.entry[i].tsc;
110 if (time_before(tsc, start))
112 print_mce(&mcelog.entry[i]);
113 if (backup && mcelog.entry[i].tsc == backup->tsc)
119 printk("Fake panic: %s\n", msg);
124 static int mce_available(struct cpuinfo_x86 *c)
126 return test_bit(X86_FEATURE_MCE, &c->x86_capability) &&
127 test_bit(X86_FEATURE_MCA, &c->x86_capability);
130 static inline void mce_get_rip(struct mce *m, struct pt_regs *regs)
132 if (regs && (m->mcgstatus & MCG_STATUS_RIPV)) {
140 /* Assume the RIP in the MSR is exact. Is this true? */
141 m->mcgstatus |= MCG_STATUS_EIPV;
142 rdmsrl(rip_msr, m->rip);
148 * The actual machine check handler
151 void do_machine_check(struct pt_regs * regs, long error_code)
153 struct mce m, panicm;
154 int nowayout = (tolerant < 1);
158 int panicm_found = 0;
161 notify_die(DIE_NMI, "machine check", regs, error_code, 255, SIGKILL);
165 memset(&m, 0, sizeof(struct mce));
166 m.cpu = hard_smp_processor_id();
167 rdmsrl(MSR_IA32_MCG_STATUS, m.mcgstatus);
168 if (!(m.mcgstatus & MCG_STATUS_RIPV))
174 for (i = 0; i < banks; i++) {
183 rdmsrl(MSR_IA32_MC0_STATUS + i*4, m.status);
184 if ((m.status & MCI_STATUS_VAL) == 0)
187 if (m.status & MCI_STATUS_EN) {
188 /* In theory _OVER could be a nowayout too, but
189 assume any overflowed errors were no fatal. */
190 nowayout |= !!(m.status & MCI_STATUS_PCC);
191 kill_it |= !!(m.status & MCI_STATUS_UC);
194 if (m.status & MCI_STATUS_MISCV)
195 rdmsrl(MSR_IA32_MC0_MISC + i*4, m.misc);
196 if (m.status & MCI_STATUS_ADDRV)
197 rdmsrl(MSR_IA32_MC0_ADDR + i*4, m.addr);
199 mce_get_rip(&m, regs);
200 if (error_code != -1)
202 wrmsrl(MSR_IA32_MC0_STATUS + i*4, 0);
205 /* Did this bank cause the exception? */
206 /* Assume that the bank with uncorrectable errors did it,
207 and that there is only a single one. */
208 if ((m.status & MCI_STATUS_UC) && (m.status & MCI_STATUS_EN)) {
213 tainted |= TAINT_MACHINE_CHECK;
216 /* Never do anything final in the polling timer */
220 /* If we didn't find an uncorrectable error, pick
221 the last one (shouldn't happen, just being safe). */
225 mce_panic("Machine check", &panicm, mcestart);
229 if (m.mcgstatus & MCG_STATUS_RIPV)
230 user_space = panicm.rip && (panicm.cs & 3);
232 /* When the machine was in user space and the CPU didn't get
233 confused it's normally not necessary to panic, unless you
234 are paranoid (tolerant == 0)
236 RED-PEN could be more tolerant for MCEs in idle,
237 but most likely they occur at boot anyways, where
238 it is best to just halt the machine. */
239 if ((!user_space && (panic_on_oops || tolerant < 2)) ||
240 (unsigned)current->pid <= 1)
241 mce_panic("Uncorrected machine check", &panicm, mcestart);
243 /* do_exit takes an awful lot of locks and has as
244 slight risk of deadlocking. If you don't want that
245 don't set tolerant >= 2 */
251 /* Last thing done in the machine check exception to clear state. */
252 wrmsrl(MSR_IA32_MCG_STATUS, 0);
256 * Periodic polling timer for "silent" machine check errors.
259 static int check_interval = 5 * 60; /* 5 minutes */
260 static void mcheck_timer(void *data);
261 static DECLARE_WORK(mcheck_work, mcheck_timer, NULL);
263 static void mcheck_check_cpu(void *info)
265 if (mce_available(¤t_cpu_data))
266 do_machine_check(NULL, 0);
269 static void mcheck_timer(void *data)
271 on_each_cpu(mcheck_check_cpu, NULL, 1, 1);
272 schedule_delayed_work(&mcheck_work, check_interval * HZ);
275 * It's ok to read stale data here for notify_user and
276 * console_logged as we'll simply get the updated versions
277 * on the next mcheck_timer execution and atomic operations
278 * on console_logged act as synchronization for notify_user
281 if (notify_user && console_logged) {
283 clear_bit(0, &console_logged);
284 printk(KERN_INFO "Machine check events logged\n");
289 static __init int periodic_mcheck_init(void)
292 schedule_delayed_work(&mcheck_work, check_interval*HZ);
295 __initcall(periodic_mcheck_init);
299 * Initialize Machine Checks for a CPU.
301 static void mce_init(void *dummy)
306 rdmsrl(MSR_IA32_MCG_CAP, cap);
308 if (banks > NR_BANKS) {
309 printk(KERN_INFO "MCE: warning: using only %d banks\n", banks);
312 /* Use accurate RIP reporting if available. */
313 if ((cap & (1<<9)) && ((cap >> 16) & 0xff) >= 9)
314 rip_msr = MSR_IA32_MCG_EIP;
316 /* Log the machine checks left over from the previous reset.
317 This also clears all registers */
318 do_machine_check(NULL, -1);
320 set_in_cr4(X86_CR4_MCE);
323 wrmsr(MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
325 for (i = 0; i < banks; i++) {
326 wrmsrl(MSR_IA32_MC0_CTL+4*i, bank[i]);
327 wrmsrl(MSR_IA32_MC0_STATUS+4*i, 0);
331 /* Add per CPU specific workarounds here */
332 static void __cpuinit mce_cpu_quirks(struct cpuinfo_x86 *c)
334 /* This should be disabled by the BIOS, but isn't always */
335 if (c->x86_vendor == X86_VENDOR_AMD && c->x86 == 15) {
336 /* disable GART TBL walk error reporting, which trips off
337 incorrectly with the IOMMU & 3ware & Cerberus. */
338 clear_bit(10, &bank[4]);
342 static void __cpuinit mce_cpu_features(struct cpuinfo_x86 *c)
344 switch (c->x86_vendor) {
345 case X86_VENDOR_INTEL:
346 mce_intel_feature_init(c);
354 * Called for each booted CPU to set up machine checks.
355 * Must be called with preempt off.
357 void __cpuinit mcheck_init(struct cpuinfo_x86 *c)
359 static cpumask_t mce_cpus __initdata = CPU_MASK_NONE;
364 cpu_test_and_set(smp_processor_id(), mce_cpus) ||
373 * Character device to read and clear the MCE log.
376 static void collect_tscs(void *data)
378 unsigned long *cpu_tsc = (unsigned long *)data;
379 rdtscll(cpu_tsc[smp_processor_id()]);
382 static ssize_t mce_read(struct file *filp, char __user *ubuf, size_t usize, loff_t *off)
384 unsigned long *cpu_tsc;
385 static DECLARE_MUTEX(mce_read_sem);
387 char __user *buf = ubuf;
390 cpu_tsc = kmalloc(NR_CPUS * sizeof(long), GFP_KERNEL);
395 next = rcu_dereference(mcelog.next);
397 /* Only supports full reads right now */
398 if (*off != 0 || usize < MCE_LOG_LEN*sizeof(struct mce)) {
405 for (i = 0; i < next; i++) {
406 if (!mcelog.entry[i].finished)
409 err |= copy_to_user(buf, mcelog.entry + i, sizeof(struct mce));
410 buf += sizeof(struct mce);
413 memset(mcelog.entry, 0, next * sizeof(struct mce));
418 /* Collect entries that were still getting written before the synchronize. */
420 on_each_cpu(collect_tscs, cpu_tsc, 1, 1);
421 for (i = next; i < MCE_LOG_LEN; i++) {
422 if (mcelog.entry[i].finished &&
423 mcelog.entry[i].tsc < cpu_tsc[mcelog.entry[i].cpu]) {
424 err |= copy_to_user(buf, mcelog.entry+i, sizeof(struct mce));
426 buf += sizeof(struct mce);
427 memset(&mcelog.entry[i], 0, sizeof(struct mce));
432 return err ? -EFAULT : buf - ubuf;
435 static int mce_ioctl(struct inode *i, struct file *f,unsigned int cmd, unsigned long arg)
437 int __user *p = (int __user *)arg;
438 if (!capable(CAP_SYS_ADMIN))
441 case MCE_GET_RECORD_LEN:
442 return put_user(sizeof(struct mce), p);
443 case MCE_GET_LOG_LEN:
444 return put_user(MCE_LOG_LEN, p);
445 case MCE_GETCLEAR_FLAGS: {
448 flags = mcelog.flags;
449 } while (cmpxchg(&mcelog.flags, flags, 0) != flags);
450 return put_user(flags, p);
457 static struct file_operations mce_chrdev_ops = {
462 static struct miscdevice mce_log_device = {
469 * Old style boot options parsing. Only for compatibility.
472 static int __init mcheck_disable(char *str)
478 /* mce=off disables machine check. Note you can reenable it later
480 static int __init mcheck_enable(char *str)
482 if (!strcmp(str, "off"))
485 printk("mce= argument %s ignored. Please use /sys", str);
489 __setup("nomce", mcheck_disable);
490 __setup("mce", mcheck_enable);
496 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS. */
497 static int mce_resume(struct sys_device *dev)
499 on_each_cpu(mce_init, NULL, 1, 1);
503 /* Reinit MCEs after user configuration changes */
504 static void mce_restart(void)
507 cancel_delayed_work(&mcheck_work);
508 /* Timer race is harmless here */
509 on_each_cpu(mce_init, NULL, 1, 1);
511 schedule_delayed_work(&mcheck_work, check_interval*HZ);
514 static struct sysdev_class mce_sysclass = {
515 .resume = mce_resume,
516 set_kset_name("machinecheck"),
519 static DEFINE_PER_CPU(struct sys_device, device_mce);
521 /* Why are there no generic functions for this? */
522 #define ACCESSOR(name, var, start) \
523 static ssize_t show_ ## name(struct sys_device *s, char *buf) { \
524 return sprintf(buf, "%lx\n", (unsigned long)var); \
526 static ssize_t set_ ## name(struct sys_device *s,const char *buf,size_t siz) { \
528 unsigned long new = simple_strtoul(buf, &end, 0); \
529 if (end == buf) return -EINVAL; \
534 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
536 ACCESSOR(bank0ctl,bank[0],mce_restart())
537 ACCESSOR(bank1ctl,bank[1],mce_restart())
538 ACCESSOR(bank2ctl,bank[2],mce_restart())
539 ACCESSOR(bank3ctl,bank[3],mce_restart())
540 ACCESSOR(bank4ctl,bank[4],mce_restart())
541 ACCESSOR(tolerant,tolerant,)
542 ACCESSOR(check_interval,check_interval,mce_restart())
544 /* Per cpu sysdev init. All of the cpus still share the same ctl bank */
545 static __cpuinit int mce_create_device(unsigned int cpu)
548 if (!mce_available(&cpu_data[cpu]))
551 per_cpu(device_mce,cpu).id = cpu;
552 per_cpu(device_mce,cpu).cls = &mce_sysclass;
554 err = sysdev_register(&per_cpu(device_mce,cpu));
557 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_bank0ctl);
558 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_bank1ctl);
559 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_bank2ctl);
560 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_bank3ctl);
561 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_bank4ctl);
562 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_tolerant);
563 sysdev_create_file(&per_cpu(device_mce,cpu), &attr_check_interval);
568 #ifdef CONFIG_HOTPLUG_CPU
569 static __cpuinit void mce_remove_device(unsigned int cpu)
571 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_bank0ctl);
572 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_bank1ctl);
573 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_bank2ctl);
574 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_bank3ctl);
575 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_bank4ctl);
576 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_tolerant);
577 sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_check_interval);
578 sysdev_unregister(&per_cpu(device_mce,cpu));
582 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
584 mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
586 unsigned int cpu = (unsigned long)hcpu;
590 mce_create_device(cpu);
592 #ifdef CONFIG_HOTPLUG_CPU
594 mce_remove_device(cpu);
601 static struct notifier_block mce_cpu_notifier = {
602 .notifier_call = mce_cpu_callback,
605 static __init int mce_init_device(void)
610 if (!mce_available(&boot_cpu_data))
612 err = sysdev_class_register(&mce_sysclass);
614 for_each_online_cpu(i) {
615 mce_create_device(i);
618 register_cpu_notifier(&mce_cpu_notifier);
619 misc_register(&mce_log_device);
623 device_initcall(mce_init_device);