2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
11 * This file handles the architecture-dependent parts of initialization
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/ptrace.h>
21 #include <linux/slab.h>
22 #include <linux/user.h>
23 #include <linux/a.out.h>
24 #include <linux/screen_info.h>
25 #include <linux/ioport.h>
26 #include <linux/delay.h>
27 #include <linux/init.h>
28 #include <linux/initrd.h>
29 #include <linux/highmem.h>
30 #include <linux/bootmem.h>
31 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <linux/console.h>
34 #include <linux/seq_file.h>
35 #include <linux/crash_dump.h>
36 #include <linux/root_dev.h>
37 #include <linux/pci.h>
38 #include <linux/acpi.h>
39 #include <linux/kallsyms.h>
40 #include <linux/edd.h>
41 #include <linux/mmzone.h>
42 #include <linux/kexec.h>
43 #include <linux/cpufreq.h>
44 #include <linux/dmi.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/ctype.h>
49 #include <asm/uaccess.h>
50 #include <asm/system.h>
55 #include <video/edid.h>
58 #include <asm/mpspec.h>
59 #include <asm/mmu_context.h>
60 #include <asm/bootsetup.h>
61 #include <asm/proto.h>
62 #include <asm/setup.h>
63 #include <asm/mach_apic.h>
65 #include <asm/sections.h>
72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
73 EXPORT_SYMBOL(boot_cpu_data);
75 unsigned long mmu_cr4_features;
77 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
80 unsigned long saved_video_mode;
86 char dmi_alloc_data[DMI_MAX_DATA];
91 struct screen_info screen_info;
92 EXPORT_SYMBOL(screen_info);
93 struct sys_desc_table_struct {
94 unsigned short length;
95 unsigned char table[0];
98 struct edid_info edid_info;
99 EXPORT_SYMBOL_GPL(edid_info);
101 extern int root_mountflags;
103 char command_line[COMMAND_LINE_SIZE];
105 struct resource standard_io_resources[] = {
106 { .name = "dma1", .start = 0x00, .end = 0x1f,
107 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
108 { .name = "pic1", .start = 0x20, .end = 0x21,
109 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
110 { .name = "timer0", .start = 0x40, .end = 0x43,
111 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
112 { .name = "timer1", .start = 0x50, .end = 0x53,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "keyboard", .start = 0x60, .end = 0x6f,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "pic2", .start = 0xa0, .end = 0xa1,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "dma2", .start = 0xc0, .end = 0xdf,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "fpu", .start = 0xf0, .end = 0xff,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
126 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
128 struct resource data_resource = {
129 .name = "Kernel data",
132 .flags = IORESOURCE_RAM,
134 struct resource code_resource = {
135 .name = "Kernel code",
138 .flags = IORESOURCE_RAM,
141 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
143 static struct resource system_rom_resource = {
144 .name = "System ROM",
147 .flags = IORESOURCE_ROM,
150 static struct resource extension_rom_resource = {
151 .name = "Extension ROM",
154 .flags = IORESOURCE_ROM,
157 static struct resource adapter_rom_resources[] = {
158 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
159 .flags = IORESOURCE_ROM },
160 { .name = "Adapter ROM", .start = 0, .end = 0,
161 .flags = IORESOURCE_ROM },
162 { .name = "Adapter ROM", .start = 0, .end = 0,
163 .flags = IORESOURCE_ROM },
164 { .name = "Adapter ROM", .start = 0, .end = 0,
165 .flags = IORESOURCE_ROM },
166 { .name = "Adapter ROM", .start = 0, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM }
172 static struct resource video_rom_resource = {
176 .flags = IORESOURCE_ROM,
179 static struct resource video_ram_resource = {
180 .name = "Video RAM area",
183 .flags = IORESOURCE_RAM,
186 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
188 static int __init romchecksum(unsigned char *rom, unsigned long length)
190 unsigned char *p, sum = 0;
192 for (p = rom; p < rom + length; p++)
197 static void __init probe_roms(void)
199 unsigned long start, length, upper;
204 upper = adapter_rom_resources[0].start;
205 for (start = video_rom_resource.start; start < upper; start += 2048) {
206 rom = isa_bus_to_virt(start);
207 if (!romsignature(rom))
210 video_rom_resource.start = start;
212 /* 0 < length <= 0x7f * 512, historically */
213 length = rom[2] * 512;
215 /* if checksum okay, trust length byte */
216 if (length && romchecksum(rom, length))
217 video_rom_resource.end = start + length - 1;
219 request_resource(&iomem_resource, &video_rom_resource);
223 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
228 request_resource(&iomem_resource, &system_rom_resource);
229 upper = system_rom_resource.start;
231 /* check for extension rom (ignore length byte!) */
232 rom = isa_bus_to_virt(extension_rom_resource.start);
233 if (romsignature(rom)) {
234 length = extension_rom_resource.end - extension_rom_resource.start + 1;
235 if (romchecksum(rom, length)) {
236 request_resource(&iomem_resource, &extension_rom_resource);
237 upper = extension_rom_resource.start;
241 /* check for adapter roms on 2k boundaries */
242 for (i = 0; i < ARRAY_SIZE(adapter_rom_resources) && start < upper;
244 rom = isa_bus_to_virt(start);
245 if (!romsignature(rom))
248 /* 0 < length <= 0x7f * 512, historically */
249 length = rom[2] * 512;
251 /* but accept any length that fits if checksum okay */
252 if (!length || start + length > upper || !romchecksum(rom, length))
255 adapter_rom_resources[i].start = start;
256 adapter_rom_resources[i].end = start + length - 1;
257 request_resource(&iomem_resource, &adapter_rom_resources[i]);
259 start = adapter_rom_resources[i++].end & ~2047UL;
263 #ifdef CONFIG_PROC_VMCORE
264 /* elfcorehdr= specifies the location of elf core header
265 * stored by the crashed kernel. This option will be passed
266 * by kexec loader to the capture kernel.
268 static int __init setup_elfcorehdr(char *arg)
273 elfcorehdr_addr = memparse(arg, &end);
274 return end > arg ? 0 : -EINVAL;
276 early_param("elfcorehdr", setup_elfcorehdr);
281 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
283 unsigned long bootmap_size, bootmap;
285 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
286 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
288 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
289 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
290 e820_register_active_regions(0, start_pfn, end_pfn);
291 free_bootmem_with_active_regions(0, end_pfn);
292 reserve_bootmem(bootmap, bootmap_size);
296 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
298 #ifdef CONFIG_EDD_MODULE
302 * copy_edd() - Copy the BIOS EDD information
303 * from boot_params into a safe place.
306 static inline void copy_edd(void)
308 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
309 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
310 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
311 edd.edd_info_nr = EDD_NR;
314 static inline void copy_edd(void)
319 #define EBDA_ADDR_POINTER 0x40E
321 unsigned __initdata ebda_addr;
322 unsigned __initdata ebda_size;
324 static void discover_ebda(void)
327 * there is a real-mode segmented pointer pointing to the
328 * 4K EBDA area at 0x40E
330 ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
333 ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
335 /* Round EBDA up to pages */
339 ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
340 if (ebda_size > 64*1024)
344 void __init setup_arch(char **cmdline_p)
346 printk(KERN_INFO "Command line: %s\n", saved_command_line);
348 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
349 screen_info = SCREEN_INFO;
350 edid_info = EDID_INFO;
351 saved_video_mode = SAVED_VIDEO_MODE;
352 bootloader_type = LOADER_TYPE;
354 #ifdef CONFIG_BLK_DEV_RAM
355 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
356 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
357 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
359 setup_memory_region();
362 if (!MOUNT_ROOT_RDONLY)
363 root_mountflags &= ~MS_RDONLY;
364 init_mm.start_code = (unsigned long) &_text;
365 init_mm.end_code = (unsigned long) &_etext;
366 init_mm.end_data = (unsigned long) &_edata;
367 init_mm.brk = (unsigned long) &_end;
369 code_resource.start = virt_to_phys(&_text);
370 code_resource.end = virt_to_phys(&_etext)-1;
371 data_resource.start = virt_to_phys(&_etext);
372 data_resource.end = virt_to_phys(&_edata)-1;
374 early_identify_cpu(&boot_cpu_data);
376 strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
377 *cmdline_p = command_line;
381 finish_e820_parsing();
383 e820_register_active_regions(0, 0, -1UL);
385 * partially used pages are not usable - thus
386 * we are rounding upwards:
388 end_pfn = e820_end_of_ram();
389 num_physpages = end_pfn;
395 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
403 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
404 * Call this early for SRAT node setup.
406 acpi_boot_table_init();
409 /* How many end-of-memory variables you have, grandma! */
410 max_low_pfn = end_pfn;
412 high_memory = (void *)__va(end_pfn * PAGE_SIZE - 1) + 1;
414 /* Remove active ranges so rediscovery with NUMA-awareness happens */
415 remove_all_active_ranges();
417 #ifdef CONFIG_ACPI_NUMA
419 * Parse SRAT to discover nodes.
425 numa_initmem_init(0, end_pfn);
427 contig_initmem_init(0, end_pfn);
430 /* Reserve direct mapping */
431 reserve_bootmem_generic(table_start << PAGE_SHIFT,
432 (table_end - table_start) << PAGE_SHIFT);
435 reserve_bootmem_generic(__pa_symbol(&_text),
436 __pa_symbol(&_end) - __pa_symbol(&_text));
439 * reserve physical page 0 - it's a special BIOS page on many boxes,
440 * enabling clean reboots, SMP operation, laptop functions.
442 reserve_bootmem_generic(0, PAGE_SIZE);
444 /* reserve ebda region */
446 reserve_bootmem_generic(ebda_addr, ebda_size);
450 * But first pinch a few for the stack/trampoline stuff
451 * FIXME: Don't need the extra page at 4K, but need to fix
452 * trampoline before removing it. (see the GDT stuff)
454 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
456 /* Reserve SMP trampoline */
457 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
460 #ifdef CONFIG_ACPI_SLEEP
462 * Reserve low memory region for sleep support.
464 acpi_reserve_bootmem();
467 * Find and reserve possible boot-time SMP configuration:
470 #ifdef CONFIG_BLK_DEV_INITRD
471 if (LOADER_TYPE && INITRD_START) {
472 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
473 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
475 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
476 initrd_end = initrd_start+INITRD_SIZE;
479 printk(KERN_ERR "initrd extends beyond end of memory "
480 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
481 (unsigned long)(INITRD_START + INITRD_SIZE),
482 (unsigned long)(end_pfn << PAGE_SHIFT));
488 if (crashk_res.start != crashk_res.end) {
489 reserve_bootmem_generic(crashk_res.start,
490 crashk_res.end - crashk_res.start + 1);
501 * set this early, so we dont allocate cpu0
502 * if MADT list doesnt list BSP first
503 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
505 cpu_set(0, cpu_present_map);
508 * Read APIC and some other early information from ACPI tables.
516 * get boot-time SMP configuration:
518 if (smp_found_config)
520 init_apic_mappings();
523 * Request address space for all standard RAM and ROM resources
524 * and also for regions reported as reserved by the e820.
527 e820_reserve_resources();
528 e820_mark_nosave_regions();
530 request_resource(&iomem_resource, &video_ram_resource);
534 /* request I/O space for devices used on all i[345]86 PCs */
535 for (i = 0; i < ARRAY_SIZE(standard_io_resources); i++)
536 request_resource(&ioport_resource, &standard_io_resources[i]);
542 #if defined(CONFIG_VGA_CONSOLE)
543 conswitchp = &vga_con;
544 #elif defined(CONFIG_DUMMY_CONSOLE)
545 conswitchp = &dummy_con;
550 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
554 if (c->extended_cpuid_level < 0x80000004)
557 v = (unsigned int *) c->x86_model_id;
558 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
559 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
560 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
561 c->x86_model_id[48] = 0;
566 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
568 unsigned int n, dummy, eax, ebx, ecx, edx;
570 n = c->extended_cpuid_level;
572 if (n >= 0x80000005) {
573 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
574 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
575 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
576 c->x86_cache_size=(ecx>>24)+(edx>>24);
577 /* On K8 L1 TLB is inclusive, so don't count it */
581 if (n >= 0x80000006) {
582 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
583 ecx = cpuid_ecx(0x80000006);
584 c->x86_cache_size = ecx >> 16;
585 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
587 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
588 c->x86_cache_size, ecx & 0xFF);
592 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
593 if (n >= 0x80000008) {
594 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
595 c->x86_virt_bits = (eax >> 8) & 0xff;
596 c->x86_phys_bits = eax & 0xff;
601 static int nearby_node(int apicid)
604 for (i = apicid - 1; i >= 0; i--) {
605 int node = apicid_to_node[i];
606 if (node != NUMA_NO_NODE && node_online(node))
609 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
610 int node = apicid_to_node[i];
611 if (node != NUMA_NO_NODE && node_online(node))
614 return first_node(node_online_map); /* Shouldn't happen */
619 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
620 * Assumes number of cores is a power of two.
622 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
627 int cpu = smp_processor_id();
629 unsigned apicid = hard_smp_processor_id();
631 unsigned ecx = cpuid_ecx(0x80000008);
633 c->x86_max_cores = (ecx & 0xff) + 1;
635 /* CPU telling us the core id bits shift? */
636 bits = (ecx >> 12) & 0xF;
638 /* Otherwise recompute */
640 while ((1 << bits) < c->x86_max_cores)
644 /* Low order bits define the core id (index of core in socket) */
645 c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
646 /* Convert the APIC ID into the socket ID */
647 c->phys_proc_id = phys_pkg_id(bits);
650 node = c->phys_proc_id;
651 if (apicid_to_node[apicid] != NUMA_NO_NODE)
652 node = apicid_to_node[apicid];
653 if (!node_online(node)) {
654 /* Two possibilities here:
655 - The CPU is missing memory and no node was created.
656 In that case try picking one from a nearby CPU
657 - The APIC IDs differ from the HyperTransport node IDs
658 which the K8 northbridge parsing fills in.
659 Assume they are all increased by a constant offset,
660 but in the same order as the HT nodeids.
661 If that doesn't result in a usable node fall back to the
662 path for the previous case. */
663 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
664 if (ht_nodeid >= 0 &&
665 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
666 node = apicid_to_node[ht_nodeid];
667 /* Pick a nearby node */
668 if (!node_online(node))
669 node = nearby_node(apicid);
671 numa_set_node(cpu, node);
673 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
678 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
686 * Disable TLB flush filter by setting HWCR.FFDIS on K8
687 * bit 6 of msr C001_0015
689 * Errata 63 for SH-B3 steppings
690 * Errata 122 for all steppings (F+ have it disabled by default)
693 rdmsrl(MSR_K8_HWCR, value);
695 wrmsrl(MSR_K8_HWCR, value);
699 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
700 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
701 clear_bit(0*32+31, &c->x86_capability);
703 /* On C+ stepping K8 rep microcode works well for copy/memset */
704 level = cpuid_eax(1);
705 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
706 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
708 /* Enable workaround for FXSAVE leak */
710 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
712 level = get_model_name(c);
716 /* Should distinguish Models here, but this is only
717 a fallback anyways. */
718 strcpy(c->x86_model_id, "Hammer");
722 display_cacheinfo(c);
724 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
725 if (c->x86_power & (1<<8))
726 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
728 /* Multi core CPU? */
729 if (c->extended_cpuid_level >= 0x80000008)
732 /* Fix cpuid4 emulation for more */
733 num_cache_leaves = 3;
735 /* RDTSC can be speculated around */
736 clear_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
739 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
742 u32 eax, ebx, ecx, edx;
743 int index_msb, core_bits;
745 cpuid(1, &eax, &ebx, &ecx, &edx);
748 if (!cpu_has(c, X86_FEATURE_HT))
750 if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
753 smp_num_siblings = (ebx & 0xff0000) >> 16;
755 if (smp_num_siblings == 1) {
756 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
757 } else if (smp_num_siblings > 1 ) {
759 if (smp_num_siblings > NR_CPUS) {
760 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
761 smp_num_siblings = 1;
765 index_msb = get_count_order(smp_num_siblings);
766 c->phys_proc_id = phys_pkg_id(index_msb);
768 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
770 index_msb = get_count_order(smp_num_siblings) ;
772 core_bits = get_count_order(c->x86_max_cores);
774 c->cpu_core_id = phys_pkg_id(index_msb) &
775 ((1 << core_bits) - 1);
778 if ((c->x86_max_cores * smp_num_siblings) > 1) {
779 printk(KERN_INFO "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
780 printk(KERN_INFO "CPU: Processor Core ID: %d\n", c->cpu_core_id);
787 * find out the number of processor cores on the die
789 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
793 if (c->cpuid_level < 4)
796 cpuid_count(4, 0, &eax, &t, &t, &t);
799 return ((eax >> 26) + 1);
804 static void srat_detect_node(void)
808 int cpu = smp_processor_id();
809 int apicid = hard_smp_processor_id();
811 /* Don't do the funky fallback heuristics the AMD version employs
813 node = apicid_to_node[apicid];
814 if (node == NUMA_NO_NODE)
815 node = first_node(node_online_map);
816 numa_set_node(cpu, node);
818 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
822 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
827 init_intel_cacheinfo(c);
828 if (c->cpuid_level > 9 ) {
829 unsigned eax = cpuid_eax(10);
830 /* Check for version and the number of counters */
831 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
832 set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
837 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
839 set_bit(X86_FEATURE_BTS, c->x86_capability);
841 set_bit(X86_FEATURE_PEBS, c->x86_capability);
844 n = c->extended_cpuid_level;
845 if (n >= 0x80000008) {
846 unsigned eax = cpuid_eax(0x80000008);
847 c->x86_virt_bits = (eax >> 8) & 0xff;
848 c->x86_phys_bits = eax & 0xff;
849 /* CPUID workaround for Intel 0F34 CPU */
850 if (c->x86_vendor == X86_VENDOR_INTEL &&
851 c->x86 == 0xF && c->x86_model == 0x3 &&
853 c->x86_phys_bits = 36;
857 c->x86_cache_alignment = c->x86_clflush_size * 2;
858 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
859 (c->x86 == 0x6 && c->x86_model >= 0x0e))
860 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
862 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
863 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
864 c->x86_max_cores = intel_num_cpu_cores(c);
869 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
871 char *v = c->x86_vendor_id;
873 if (!strcmp(v, "AuthenticAMD"))
874 c->x86_vendor = X86_VENDOR_AMD;
875 else if (!strcmp(v, "GenuineIntel"))
876 c->x86_vendor = X86_VENDOR_INTEL;
878 c->x86_vendor = X86_VENDOR_UNKNOWN;
881 struct cpu_model_info {
884 char *model_names[16];
887 /* Do some early cpuid on the boot CPU to get some parameter that are
888 needed before check_bugs. Everything advanced is in identify_cpu
890 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
894 c->loops_per_jiffy = loops_per_jiffy;
895 c->x86_cache_size = -1;
896 c->x86_vendor = X86_VENDOR_UNKNOWN;
897 c->x86_model = c->x86_mask = 0; /* So far unknown... */
898 c->x86_vendor_id[0] = '\0'; /* Unset */
899 c->x86_model_id[0] = '\0'; /* Unset */
900 c->x86_clflush_size = 64;
901 c->x86_cache_alignment = c->x86_clflush_size;
902 c->x86_max_cores = 1;
903 c->extended_cpuid_level = 0;
904 memset(&c->x86_capability, 0, sizeof c->x86_capability);
906 /* Get vendor name */
907 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
908 (unsigned int *)&c->x86_vendor_id[0],
909 (unsigned int *)&c->x86_vendor_id[8],
910 (unsigned int *)&c->x86_vendor_id[4]);
914 /* Initialize the standard set of capabilities */
915 /* Note that the vendor-specific code below might override */
917 /* Intel-defined flags: level 0x00000001 */
918 if (c->cpuid_level >= 0x00000001) {
920 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
921 &c->x86_capability[0]);
922 c->x86 = (tfms >> 8) & 0xf;
923 c->x86_model = (tfms >> 4) & 0xf;
924 c->x86_mask = tfms & 0xf;
926 c->x86 += (tfms >> 20) & 0xff;
928 c->x86_model += ((tfms >> 16) & 0xF) << 4;
929 if (c->x86_capability[0] & (1<<19))
930 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
932 /* Have CPUID level 0 only - unheard of */
937 c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
942 * This does the hard work of actually picking apart the CPU stuff...
944 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
949 early_identify_cpu(c);
951 /* AMD-defined flags: level 0x80000001 */
952 xlvl = cpuid_eax(0x80000000);
953 c->extended_cpuid_level = xlvl;
954 if ((xlvl & 0xffff0000) == 0x80000000) {
955 if (xlvl >= 0x80000001) {
956 c->x86_capability[1] = cpuid_edx(0x80000001);
957 c->x86_capability[6] = cpuid_ecx(0x80000001);
959 if (xlvl >= 0x80000004)
960 get_model_name(c); /* Default name */
963 /* Transmeta-defined flags: level 0x80860001 */
964 xlvl = cpuid_eax(0x80860000);
965 if ((xlvl & 0xffff0000) == 0x80860000) {
966 /* Don't set x86_cpuid_level here for now to not confuse. */
967 if (xlvl >= 0x80860001)
968 c->x86_capability[2] = cpuid_edx(0x80860001);
971 c->apicid = phys_pkg_id(0);
974 * Vendor-specific initialization. In this section we
975 * canonicalize the feature flags, meaning if there are
976 * features a certain CPU supports which CPUID doesn't
977 * tell us, CPUID claiming incorrect flags, or other bugs,
978 * we handle them here.
980 * At the end of this section, c->x86_capability better
981 * indicate the features this CPU genuinely supports!
983 switch (c->x86_vendor) {
988 case X86_VENDOR_INTEL:
992 case X86_VENDOR_UNKNOWN:
994 display_cacheinfo(c);
998 select_idle_routine(c);
1002 * On SMP, boot_cpu_data holds the common feature set between
1003 * all CPUs; so make sure that we indicate which features are
1004 * common between the CPUs. The first time this routine gets
1005 * executed, c == &boot_cpu_data.
1007 if (c != &boot_cpu_data) {
1008 /* AND the already accumulated flags with these */
1009 for (i = 0 ; i < NCAPINTS ; i++)
1010 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1013 #ifdef CONFIG_X86_MCE
1016 if (c == &boot_cpu_data)
1021 numa_add_cpu(smp_processor_id());
1026 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1028 if (c->x86_model_id[0])
1029 printk("%s", c->x86_model_id);
1031 if (c->x86_mask || c->cpuid_level >= 0)
1032 printk(" stepping %02x\n", c->x86_mask);
1038 * Get CPU information for use by the procfs.
1041 static int show_cpuinfo(struct seq_file *m, void *v)
1043 struct cpuinfo_x86 *c = v;
1046 * These flag bits must match the definitions in <asm/cpufeature.h>.
1047 * NULL means this bit is undefined or reserved; either way it doesn't
1048 * have meaning as far as Linux is concerned. Note that it's important
1049 * to realize there is a difference between this table and CPUID -- if
1050 * applications want to get the raw CPUID data, they should access
1051 * /dev/cpu/<cpu_nr>/cpuid instead.
1053 static char *x86_cap_flags[] = {
1055 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1056 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1057 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1058 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1061 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1062 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1063 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1064 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1066 /* Transmeta-defined */
1067 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1068 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1069 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1070 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1072 /* Other (Linux-defined) */
1073 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1074 "constant_tsc", NULL, NULL,
1075 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1076 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1077 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1079 /* Intel-defined (#2) */
1080 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1081 "tm2", "ssse3", "cid", NULL, NULL, "cx16", "xtpr", NULL,
1082 NULL, NULL, "dca", NULL, NULL, NULL, NULL, NULL,
1083 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1085 /* VIA/Cyrix/Centaur-defined */
1086 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1087 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1088 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1089 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1091 /* AMD-defined (#2) */
1092 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1093 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1094 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1095 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1097 static char *x86_power_flags[] = {
1098 "ts", /* temperature sensor */
1099 "fid", /* frequency id control */
1100 "vid", /* voltage id control */
1101 "ttp", /* thermal trip */
1105 /* nothing */ /* constant_tsc - moved to flags */
1110 if (!cpu_online(c-cpu_data))
1114 seq_printf(m,"processor\t: %u\n"
1116 "cpu family\t: %d\n"
1118 "model name\t: %s\n",
1119 (unsigned)(c-cpu_data),
1120 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1123 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1125 if (c->x86_mask || c->cpuid_level >= 0)
1126 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1128 seq_printf(m, "stepping\t: unknown\n");
1130 if (cpu_has(c,X86_FEATURE_TSC)) {
1131 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1134 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1135 freq / 1000, (freq % 1000));
1139 if (c->x86_cache_size >= 0)
1140 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1143 if (smp_num_siblings * c->x86_max_cores > 1) {
1144 int cpu = c - cpu_data;
1145 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1146 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1147 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1148 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1154 "fpu_exception\t: yes\n"
1155 "cpuid level\t: %d\n"
1162 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1163 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1164 seq_printf(m, " %s", x86_cap_flags[i]);
1167 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1168 c->loops_per_jiffy/(500000/HZ),
1169 (c->loops_per_jiffy/(5000/HZ)) % 100);
1171 if (c->x86_tlbsize > 0)
1172 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1173 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1174 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1176 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1177 c->x86_phys_bits, c->x86_virt_bits);
1179 seq_printf(m, "power management:");
1182 for (i = 0; i < 32; i++)
1183 if (c->x86_power & (1 << i)) {
1184 if (i < ARRAY_SIZE(x86_power_flags) &&
1186 seq_printf(m, "%s%s",
1187 x86_power_flags[i][0]?" ":"",
1188 x86_power_flags[i]);
1190 seq_printf(m, " [%d]", i);
1194 seq_printf(m, "\n\n");
1199 static void *c_start(struct seq_file *m, loff_t *pos)
1201 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1204 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1207 return c_start(m, pos);
1210 static void c_stop(struct seq_file *m, void *v)
1214 struct seq_operations cpuinfo_op = {
1218 .show = show_cpuinfo,
1221 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1222 #include <linux/platform_device.h>
1223 static __init int add_pcspkr(void)
1225 struct platform_device *pd;
1228 pd = platform_device_alloc("pcspkr", -1);
1232 ret = platform_device_add(pd);
1234 platform_device_put(pd);
1238 device_initcall(add_pcspkr);