2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
58 //! Initialize the debugger
60 //Two positive debug clock pulses while !RST is low.
61 //Take RST low, pulse twice, then high.
79 //! Read and write a CC bit.
80 unsigned char cctrans8(unsigned char byte){
82 //This function came from the SPI Wikipedia article.
85 for (bit = 0; bit < 8; bit++) {
86 /* write MOSI on trailing edge of previous clock */
93 /* half a clock cycle before leading/rising edge */
97 /* half a clock cycle before trailing/falling edge */
100 /* read MISO on trailing edge */
108 //! Send a command from txbytes.
109 void cccmd(unsigned char len){
113 cctrans8(cmddata[i]);
116 //! Fetch a reply, usually 1 byte.
117 void ccread(unsigned char len){
121 cmddata[i]=cctrans8(0);
124 //! Handles a monitor command.
125 void cchandle(unsigned char app,
128 //Always init. Might help with buggy lines.
134 //CC_PEEK and CC_POKE will come later.
136 cmddata[0]=cc_peekirambyte(cmddata[0]);
140 cmddata[0]=cc_pokeirambyte(cmddata[0],cmddata[1]);
143 case READ: //Write a command and return 1-byte reply.
148 case WRITE: //Write a command with no reply.
152 case START://enter debugger
157 case STOP://exit debugger
158 //Take RST low, then high.
175 cc_wr_config(cmddata[0]);
188 //no break, return status
193 case CC_SET_HW_BRKPNT:
194 cc_set_hw_brkpnt(cmddataword[0]);
213 case CC_STEP_REPLACE:
214 txdata(app,NOK,0);//TODO add me
223 case CC_READ_CODE_MEMORY:
224 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
227 case CC_READ_XDATA_MEMORY:
228 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
231 case CC_WRITE_XDATA_MEMORY:
232 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
236 cc_set_pc(cmddatalong[0]);
239 case CC_WRITE_FLASH_PAGE:
240 cc_write_flash_page(cmddatalong[0]);
243 case CC_WIPEFLASHBUFFER:
244 for(i=0xf000;i<0xf800;i++)
245 cc_pokedatabyte(i,0xFF);
248 case CC_MASS_ERASE_FLASH:
250 case CC_PROGRAM_FLASH:
251 debugstr("This Chipcon command is not yet implemented.");
252 txdata(app,NOK,0);//TODO implement me.
257 //! Set the Chipcon's Program Counter
258 void cc_set_pc(u32 adr){
259 cmddata[0]=0x02; //SetPC
260 cmddata[1]=((adr>>8)&0xff); //HIBYTE
261 cmddata[2]=adr&0xff; //LOBYTE
266 //! Erase all of a Chipcon's memory.
267 void cc_chip_erase(){
268 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
272 //! Write the configuration byte.
273 void cc_wr_config(unsigned char config){
274 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
284 debugstr("Locking chip.");
285 cc_wr_config(1);//Select Info Flash
286 if(!(cc_rd_config()&1))
287 debugstr("Config forgotten!");
291 cc_pokedatabyte(0xf000+i,0);
292 cc_write_flash_page(0);
293 if(cc_peekcodebyte(0))
294 debugstr("Failed to clear info flash byte.");
298 debugstr("Stuck in info flash mode!");
301 //! Read the configuration byte.
302 unsigned char cc_rd_config(){
303 cmddata[0]=CCCMD_RD_CONFIG; //0x24
310 //! Read the status register
311 unsigned char cc_read_status(){
312 cmddata[0]=CCCMD_READ_STATUS; //0x3f
318 //! Read the CHIP ID bytes.
319 unsigned short cc_get_chip_id(){
320 unsigned short toret;
321 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
327 toret=(toret<<8)+cmddata[1];
331 //! Populates flash buffer in xdata.
332 void cc_write_flash_buffer(u8 *data, u16 len){
333 cc_write_xdata(0xf000, data, len);
335 //! Populates flash buffer in xdata.
336 void cc_write_xdata(u16 adr, u8 *data, u16 len){
338 for(i=0; i<len; i++){
339 cc_pokedatabyte(adr+i,
345 //32-bit words, 2KB pages
346 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
347 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
348 #define FLASHPAGE_SIZE 0x800
351 #define FLASH_WORD_SIZE 0x4
353 const u8 flash_routine[] = {
356 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
358 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
360 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
361 // ; Wait for flash erase to complete
362 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
363 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
364 /* End erase page. */
365 // ; Initialize the data pointer
366 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
368 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
369 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
370 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
372 0x7D, FLASH_WORD_SIZE, // writeLoop: MOV R5, #imm;
373 0xE0, // writeWordLoop: MOVX A, @DPTR;
375 0xF5, 0xAF, // MOV FWDATA, A;
376 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
377 // ; Wait for completion
378 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
379 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
380 0xDE, 0xF1, // DJNZ R6, writeLoop;
381 0xDF, 0xEF, // DJNZ R7, writeLoop;
382 // ; Done, fake a breakpoint
387 //! Copies flash buffer to flash.
388 void cc_write_flash_page(u32 adr){
389 //Assumes that page has already been written to XDATA 0xF000
390 //debugstr("Flashing 2kb at 0xF000 to given adr.");
392 if(adr&(FLASHPAGE_SIZE-1)){
393 debugstr("Flash page address is not on a multiple of 2kB. Aborting.");
398 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
399 cc_write_xdata(0xF000+FLASHPAGE_SIZE,
400 (u8*) flash_routine, sizeof(flash_routine));
401 //Patch routine's third byte with
402 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
403 cc_pokedatabyte(0xF000+FLASHPAGE_SIZE+2,
404 ((adr>>8)/FLASH_WORD_SIZE)&0x7E);
405 //debugstr("Wrote flash routine.");
408 //MOV MEMCTR, (bank * 16) + 1;
413 debugstr("Loaded bank info.");
415 cc_set_pc(0xf000+FLASHPAGE_SIZE);//execute code fragment
418 debugstr("Executing.");
421 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
422 P1OUT^=1;//blink LED while flashing
426 debugstr("Done flashing.");
428 P1OUT&=~1;//clear LED
432 unsigned short cc_get_pc(){
433 cmddata[0]=CCCMD_GET_PC; //0x28
438 return cmddataword[0];
441 //! Set a hardware breakpoint.
442 void cc_set_hw_brkpnt(unsigned short adr){
443 debugstr("FIXME: This certainly won't work.");
453 cmddata[0]=CCCMD_HALT; //0x44
460 cmddata[0]=CCCMD_RESUME; //0x4C
467 //! Step an instruction
468 void cc_step_instr(){
469 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
475 //! Debug an instruction.
476 void cc_debug_instr(unsigned char len){
477 //Bottom two bits of command indicate length.
478 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
480 cctrans8(cmd); //Second command code
481 cccmd(len&0x3); //Command itself.
486 //! Debug an instruction, for local use.
487 unsigned char cc_debug(unsigned char len,
491 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
501 return cctrans8(0x00);
504 //! Fetch a byte of code memory.
505 unsigned char cc_peekcodebyte(unsigned long adr){
506 /** See page 9 of SWRA124 */
507 unsigned char bank=adr>>15,
513 //MOV MEMCTR, (bank*16)+1
514 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
516 cc_debug(3, 0x90, hb, lb);
520 cc_debug(2, 0xE4, 0, 0);
522 toret=cc_debug(3, 0x93, 0, 0);
524 //cc_debug(1, 0xA3, 0, 0);
530 //! Set a byte of data memory.
531 unsigned char cc_pokedatabyte(unsigned int adr,
538 cc_debug(3, 0x90, hb, lb);
540 cc_debug(2, 0x74, val, 0);
542 cc_debug(1, 0xF0, 0, 0);
546 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
547 for (n = 0; n < count; n++) {
548 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
549 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
550 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
555 //! Fetch a byte of data memory.
556 unsigned char cc_peekdatabyte(unsigned int adr){
562 cc_debug(3, 0x90, hb, lb);
564 //Must be 2, perhaps for clocking?
565 return cc_debug(3, 0xE0, 0, 0);
569 //! Fetch a byte of IRAM.
570 u8 cc_peekirambyte(u8 adr){
572 cc_debug(2, 0xE4, 0, 0);
574 return cc_debug(3, 0xE5, adr, 0);
577 //! Write a byte of IRAM.
578 u8 cc_pokeirambyte(u8 adr, u8 val){
580 cc_debug(2, 0xE4, 0, 0);
582 return cc_debug(3, 0x75, adr, val);
583 //return cc_debug(3, 0x75, val, adr);