2 * pata_sis.c - SiS ATA driver
4 * (C) 2005 Red Hat <alan@redhat.com>
6 * Based upon linux/drivers/ide/pci/sis5513.c
7 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
9 * Copyright (C) 2003 Vojtech Pavlik <vojtech@suse.cz>
10 * SiS Taiwan : for direct support and hardware.
11 * Daniela Engert : for initial ATA100 advices and numerous others.
12 * John Fremlin, Manfred Spraul, Dave Morgan, Peter Kjellerstedt :
13 * for checking code correctness, providing patches.
14 * Original tests and design on the SiS620 chipset.
15 * ATA100 tests and design on the SiS735 chipset.
16 * ATA16/33 support from specs
17 * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
21 * Check MWDMA on drives that don't support MWDMA speed pio cycles ?
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/pci.h>
28 #include <linux/init.h>
29 #include <linux/blkdev.h>
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <scsi/scsi_host.h>
33 #include <linux/libata.h>
34 #include <linux/ata.h>
37 #define DRV_NAME "pata_sis"
38 #define DRV_VERSION "0.4.5"
41 u16 device; /* PCI host ID */
42 struct ata_port_info *info; /* Info block */
43 /* Probably add family, cable detect type etc here to clean
53 static const struct sis_laptop sis_laptop[] = {
54 /* devid, subvendor, subdev */
55 { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
60 static int sis_short_ata40(struct pci_dev *dev)
62 const struct sis_laptop *lap = &sis_laptop[0];
65 if (lap->device == dev->device &&
66 lap->subvendor == dev->subsystem_vendor &&
67 lap->subdevice == dev->subsystem_device)
76 * sis_port_base - return PCI configuration base for dev
79 * Returns the base of the PCI configuration registers for this port
83 static int sis_port_base(struct ata_device *adev)
85 return 0x40 + (4 * adev->ap->port_no) + (2 * adev->devno);
89 * sis_133_pre_reset - check for 40/80 pin
92 * Perform cable detection for the later UDMA133 capable
96 static int sis_133_pre_reset(struct ata_port *ap)
98 static const struct pci_bits sis_enable_bits[] = {
99 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
100 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
103 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
106 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no]))
109 /* The top bit of this register is the cable detect bit */
110 pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
111 if ((tmp & 0x8000) && !sis_short_ata40(pdev))
112 ap->cbl = ATA_CBL_PATA40;
114 ap->cbl = ATA_CBL_PATA80;
116 return ata_std_prereset(ap);
120 * sis_error_handler - Probe specified port on PATA host controller
124 * None (inherited from caller).
127 static void sis_133_error_handler(struct ata_port *ap)
129 ata_bmdma_drive_eh(ap, sis_133_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
134 * sis_66_pre_reset - check for 40/80 pin
137 * Perform cable detection on the UDMA66, UDMA100 and early UDMA133
138 * SiS IDE controllers.
141 static int sis_66_pre_reset(struct ata_port *ap)
143 static const struct pci_bits sis_enable_bits[] = {
144 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
145 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
148 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
151 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) {
152 ata_port_disable(ap);
153 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
156 /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
157 pci_read_config_byte(pdev, 0x48, &tmp);
159 if ((tmp & 0x10) && !sis_short_ata40(pdev))
160 ap->cbl = ATA_CBL_PATA40;
162 ap->cbl = ATA_CBL_PATA80;
164 return ata_std_prereset(ap);
168 * sis_66_error_handler - Probe specified port on PATA host controller
173 * None (inherited from caller).
176 static void sis_66_error_handler(struct ata_port *ap)
178 ata_bmdma_drive_eh(ap, sis_66_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
182 * sis_old_pre_reset - probe begin
185 * Set up cable type and use generic probe init
188 static int sis_old_pre_reset(struct ata_port *ap)
190 static const struct pci_bits sis_enable_bits[] = {
191 { 0x4aU, 1U, 0x02UL, 0x02UL }, /* port 0 */
192 { 0x4aU, 1U, 0x04UL, 0x04UL }, /* port 1 */
195 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
197 if (!pci_test_config_bits(pdev, &sis_enable_bits[ap->port_no])) {
198 ata_port_disable(ap);
199 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
202 ap->cbl = ATA_CBL_PATA40;
203 return ata_std_prereset(ap);
208 * sis_old_error_handler - Probe specified port on PATA host controller
212 * None (inherited from caller).
215 static void sis_old_error_handler(struct ata_port *ap)
217 ata_bmdma_drive_eh(ap, sis_old_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
221 * sis_set_fifo - Set RWP fifo bits for this device
225 * SIS chipsets implement prefetch/postwrite bits for each device
226 * on both channels. This functionality is not ATAPI compatible and
227 * must be configured according to the class of device present
230 static void sis_set_fifo(struct ata_port *ap, struct ata_device *adev)
232 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
236 mask <<= (2 * ap->port_no);
237 mask <<= adev->devno;
239 /* This holds various bits including the FIFO control */
240 pci_read_config_byte(pdev, 0x4B, &fifoctrl);
243 /* Enable for ATA (disk) only */
244 if (adev->class == ATA_DEV_ATA)
246 pci_write_config_byte(pdev, 0x4B, fifoctrl);
250 * sis_old_set_piomode - Initialize host controller PATA PIO timings
251 * @ap: Port whose timings we are configuring
252 * @adev: Device we are configuring for.
254 * Set PIO mode for device, in host controller PCI config space. This
255 * function handles PIO set up for all chips that are pre ATA100 and
256 * also early ATA100 devices.
259 * None (inherited from caller).
262 static void sis_old_set_piomode (struct ata_port *ap, struct ata_device *adev)
264 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
265 int port = sis_port_base(adev);
267 int speed = adev->pio_mode - XFER_PIO_0;
269 const u8 active[] = { 0x00, 0x07, 0x04, 0x03, 0x01 };
270 const u8 recovery[] = { 0x00, 0x06, 0x04, 0x03, 0x03 };
272 sis_set_fifo(ap, adev);
274 pci_read_config_byte(pdev, port, &t1);
275 pci_read_config_byte(pdev, port + 1, &t2);
277 t1 &= ~0x0F; /* Clear active/recovery timings */
281 t2 |= recovery[speed];
283 pci_write_config_byte(pdev, port, t1);
284 pci_write_config_byte(pdev, port + 1, t2);
288 * sis_100_set_pioode - Initialize host controller PATA PIO timings
289 * @ap: Port whose timings we are configuring
290 * @adev: Device we are configuring for.
292 * Set PIO mode for device, in host controller PCI config space. This
293 * function handles PIO set up for ATA100 devices and early ATA133.
296 * None (inherited from caller).
299 static void sis_100_set_piomode (struct ata_port *ap, struct ata_device *adev)
301 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
302 int port = sis_port_base(adev);
303 int speed = adev->pio_mode - XFER_PIO_0;
305 const u8 actrec[] = { 0x00, 0x67, 0x44, 0x33, 0x31 };
307 sis_set_fifo(ap, adev);
309 pci_write_config_byte(pdev, port, actrec[speed]);
313 * sis_133_set_pioode - Initialize host controller PATA PIO timings
314 * @ap: Port whose timings we are configuring
315 * @adev: Device we are configuring for.
317 * Set PIO mode for device, in host controller PCI config space. This
318 * function handles PIO set up for the later ATA133 devices.
321 * None (inherited from caller).
324 static void sis_133_set_piomode (struct ata_port *ap, struct ata_device *adev)
326 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
330 int speed = adev->pio_mode - XFER_PIO_0;
332 const u32 timing133[] = {
333 0x28269000, /* Recovery << 24 | Act << 16 | Ini << 12 */
339 const u32 timing100[] = {
340 0x1E1C6000, /* Recovery << 24 | Act << 16 | Ini << 12 */
347 sis_set_fifo(ap, adev);
349 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
350 pci_read_config_dword(pdev, 0x54, ®54);
351 if (reg54 & 0x40000000)
353 port += 8 * ap->port_no + 4 * adev->devno;
355 pci_read_config_dword(pdev, port, &t1);
356 t1 &= 0xC0C00FFF; /* Mask out timing */
358 if (t1 & 0x08) /* 100 or 133 ? */
359 t1 |= timing133[speed];
361 t1 |= timing100[speed];
362 pci_write_config_byte(pdev, port, t1);
366 * sis_old_set_dmamode - Initialize host controller PATA DMA timings
367 * @ap: Port whose timings we are configuring
368 * @adev: Device to program
370 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
371 * Handles pre UDMA and UDMA33 devices. Supports MWDMA as well unlike
372 * the old ide/pci driver.
375 * None (inherited from caller).
378 static void sis_old_set_dmamode (struct ata_port *ap, struct ata_device *adev)
380 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
381 int speed = adev->dma_mode - XFER_MW_DMA_0;
382 int drive_pci = sis_port_base(adev);
385 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
386 const u16 udma_bits[] = { 0xE000, 0xC000, 0xA000 };
388 pci_read_config_word(pdev, drive_pci, &timing);
390 if (adev->dma_mode < XFER_UDMA_0) {
391 /* bits 3-0 hold recovery timing bits 8-10 active timing and
392 the higer bits are dependant on the device */
394 timing |= mwdma_bits[speed];
395 pci_write_config_word(pdev, drive_pci, timing);
397 /* Bit 15 is UDMA on/off, bit 13-14 are cycle time */
398 speed = adev->dma_mode - XFER_UDMA_0;
400 timing |= udma_bits[speed];
405 * sis_66_set_dmamode - Initialize host controller PATA DMA timings
406 * @ap: Port whose timings we are configuring
407 * @adev: Device to program
409 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
410 * Handles UDMA66 and early UDMA100 devices. Supports MWDMA as well unlike
411 * the old ide/pci driver.
414 * None (inherited from caller).
417 static void sis_66_set_dmamode (struct ata_port *ap, struct ata_device *adev)
419 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
420 int speed = adev->dma_mode - XFER_MW_DMA_0;
421 int drive_pci = sis_port_base(adev);
424 const u16 mwdma_bits[] = { 0x707, 0x202, 0x202 };
425 const u16 udma_bits[] = { 0xF000, 0xD000, 0xB000, 0xA000, 0x9000};
427 pci_read_config_word(pdev, drive_pci, &timing);
429 if (adev->dma_mode < XFER_UDMA_0) {
430 /* bits 3-0 hold recovery timing bits 8-10 active timing and
431 the higer bits are dependant on the device, bit 15 udma */
433 timing |= mwdma_bits[speed];
435 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
436 speed = adev->dma_mode - XFER_UDMA_0;
438 timing |= udma_bits[speed];
440 pci_write_config_word(pdev, drive_pci, timing);
444 * sis_100_set_dmamode - Initialize host controller PATA DMA timings
445 * @ap: Port whose timings we are configuring
446 * @adev: Device to program
448 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
449 * Handles UDMA66 and early UDMA100 devices.
452 * None (inherited from caller).
455 static void sis_100_set_dmamode (struct ata_port *ap, struct ata_device *adev)
457 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
458 int speed = adev->dma_mode - XFER_MW_DMA_0;
459 int drive_pci = sis_port_base(adev);
462 const u16 udma_bits[] = { 0x8B00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
464 pci_read_config_word(pdev, drive_pci, &timing);
466 if (adev->dma_mode < XFER_UDMA_0) {
467 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
469 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
470 speed = adev->dma_mode - XFER_UDMA_0;
472 timing |= udma_bits[speed];
474 pci_write_config_word(pdev, drive_pci, timing);
478 * sis_133_early_set_dmamode - Initialize host controller PATA DMA timings
479 * @ap: Port whose timings we are configuring
480 * @adev: Device to program
482 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
483 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
484 * the old ide/pci driver.
487 * None (inherited from caller).
490 static void sis_133_early_set_dmamode (struct ata_port *ap, struct ata_device *adev)
492 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
493 int speed = adev->dma_mode - XFER_MW_DMA_0;
494 int drive_pci = sis_port_base(adev);
497 const u16 udma_bits[] = { 0x8F00, 0x8A00, 0x8700, 0x8500, 0x8300, 0x8200, 0x8100};
499 pci_read_config_word(pdev, drive_pci, &timing);
501 if (adev->dma_mode < XFER_UDMA_0) {
502 /* NOT SUPPORTED YET: NEED DATA SHEET. DITTO IN OLD DRIVER */
504 /* Bit 15 is UDMA on/off, bit 12-14 are cycle time */
505 speed = adev->dma_mode - XFER_UDMA_0;
507 timing |= udma_bits[speed];
509 pci_write_config_word(pdev, drive_pci, timing);
513 * sis_133_set_dmamode - Initialize host controller PATA DMA timings
514 * @ap: Port whose timings we are configuring
515 * @adev: Device to program
517 * Set UDMA/MWDMA mode for device, in host controller PCI config space.
518 * Handles early SiS 961 bridges. Supports MWDMA as well unlike
519 * the old ide/pci driver.
522 * None (inherited from caller).
525 static void sis_133_set_dmamode (struct ata_port *ap, struct ata_device *adev)
527 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
528 int speed = adev->dma_mode - XFER_MW_DMA_0;
533 /* bits 4- cycle time 8 - cvs time */
534 const u32 timing_u100[] = { 0x6B0, 0x470, 0x350, 0x140, 0x120, 0x110, 0x000 };
535 const u32 timing_u133[] = { 0x9F0, 0x6A0, 0x470, 0x250, 0x230, 0x220, 0x210 };
537 /* If bit 14 is set then the registers are mapped at 0x70 not 0x40 */
538 pci_read_config_dword(pdev, 0x54, ®54);
539 if (reg54 & 0x40000000)
541 port += (8 * ap->port_no) + (4 * adev->devno);
543 pci_read_config_dword(pdev, port, &t1);
545 if (adev->dma_mode < XFER_UDMA_0) {
547 /* FIXME: need data sheet to add MWDMA here. Also lacking on
550 speed = adev->dma_mode - XFER_UDMA_0;
551 /* if & 8 no UDMA133 - need info for ... */
555 t1 |= timing_u133[speed];
557 t1 |= timing_u100[speed];
559 pci_write_config_dword(pdev, port, t1);
562 static struct scsi_host_template sis_sht = {
563 .module = THIS_MODULE,
565 .ioctl = ata_scsi_ioctl,
566 .queuecommand = ata_scsi_queuecmd,
567 .can_queue = ATA_DEF_QUEUE,
568 .this_id = ATA_SHT_THIS_ID,
569 .sg_tablesize = LIBATA_MAX_PRD,
570 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
571 .emulated = ATA_SHT_EMULATED,
572 .use_clustering = ATA_SHT_USE_CLUSTERING,
573 .proc_name = DRV_NAME,
574 .dma_boundary = ATA_DMA_BOUNDARY,
575 .slave_configure = ata_scsi_slave_config,
576 .slave_destroy = ata_scsi_slave_destroy,
577 .bios_param = ata_std_bios_param,
578 .resume = ata_scsi_device_resume,
579 .suspend = ata_scsi_device_suspend,
582 static const struct ata_port_operations sis_133_ops = {
583 .port_disable = ata_port_disable,
584 .set_piomode = sis_133_set_piomode,
585 .set_dmamode = sis_133_set_dmamode,
586 .mode_filter = ata_pci_default_filter,
588 .tf_load = ata_tf_load,
589 .tf_read = ata_tf_read,
590 .check_status = ata_check_status,
591 .exec_command = ata_exec_command,
592 .dev_select = ata_std_dev_select,
594 .freeze = ata_bmdma_freeze,
595 .thaw = ata_bmdma_thaw,
596 .error_handler = sis_133_error_handler,
597 .post_internal_cmd = ata_bmdma_post_internal_cmd,
599 .bmdma_setup = ata_bmdma_setup,
600 .bmdma_start = ata_bmdma_start,
601 .bmdma_stop = ata_bmdma_stop,
602 .bmdma_status = ata_bmdma_status,
603 .qc_prep = ata_qc_prep,
604 .qc_issue = ata_qc_issue_prot,
605 .data_xfer = ata_pio_data_xfer,
607 .irq_handler = ata_interrupt,
608 .irq_clear = ata_bmdma_irq_clear,
610 .port_start = ata_port_start,
613 static const struct ata_port_operations sis_133_early_ops = {
614 .port_disable = ata_port_disable,
615 .set_piomode = sis_100_set_piomode,
616 .set_dmamode = sis_133_early_set_dmamode,
617 .mode_filter = ata_pci_default_filter,
619 .tf_load = ata_tf_load,
620 .tf_read = ata_tf_read,
621 .check_status = ata_check_status,
622 .exec_command = ata_exec_command,
623 .dev_select = ata_std_dev_select,
625 .freeze = ata_bmdma_freeze,
626 .thaw = ata_bmdma_thaw,
627 .error_handler = sis_66_error_handler,
628 .post_internal_cmd = ata_bmdma_post_internal_cmd,
630 .bmdma_setup = ata_bmdma_setup,
631 .bmdma_start = ata_bmdma_start,
632 .bmdma_stop = ata_bmdma_stop,
633 .bmdma_status = ata_bmdma_status,
634 .qc_prep = ata_qc_prep,
635 .qc_issue = ata_qc_issue_prot,
636 .data_xfer = ata_pio_data_xfer,
638 .irq_handler = ata_interrupt,
639 .irq_clear = ata_bmdma_irq_clear,
641 .port_start = ata_port_start,
644 static const struct ata_port_operations sis_100_ops = {
645 .port_disable = ata_port_disable,
646 .set_piomode = sis_100_set_piomode,
647 .set_dmamode = sis_100_set_dmamode,
648 .mode_filter = ata_pci_default_filter,
650 .tf_load = ata_tf_load,
651 .tf_read = ata_tf_read,
652 .check_status = ata_check_status,
653 .exec_command = ata_exec_command,
654 .dev_select = ata_std_dev_select,
656 .freeze = ata_bmdma_freeze,
657 .thaw = ata_bmdma_thaw,
658 .error_handler = sis_66_error_handler,
659 .post_internal_cmd = ata_bmdma_post_internal_cmd,
662 .bmdma_setup = ata_bmdma_setup,
663 .bmdma_start = ata_bmdma_start,
664 .bmdma_stop = ata_bmdma_stop,
665 .bmdma_status = ata_bmdma_status,
666 .qc_prep = ata_qc_prep,
667 .qc_issue = ata_qc_issue_prot,
668 .data_xfer = ata_pio_data_xfer,
670 .irq_handler = ata_interrupt,
671 .irq_clear = ata_bmdma_irq_clear,
673 .port_start = ata_port_start,
676 static const struct ata_port_operations sis_66_ops = {
677 .port_disable = ata_port_disable,
678 .set_piomode = sis_old_set_piomode,
679 .set_dmamode = sis_66_set_dmamode,
680 .mode_filter = ata_pci_default_filter,
682 .tf_load = ata_tf_load,
683 .tf_read = ata_tf_read,
684 .check_status = ata_check_status,
685 .exec_command = ata_exec_command,
686 .dev_select = ata_std_dev_select,
688 .freeze = ata_bmdma_freeze,
689 .thaw = ata_bmdma_thaw,
690 .error_handler = sis_66_error_handler,
691 .post_internal_cmd = ata_bmdma_post_internal_cmd,
693 .bmdma_setup = ata_bmdma_setup,
694 .bmdma_start = ata_bmdma_start,
695 .bmdma_stop = ata_bmdma_stop,
696 .bmdma_status = ata_bmdma_status,
697 .qc_prep = ata_qc_prep,
698 .qc_issue = ata_qc_issue_prot,
699 .data_xfer = ata_pio_data_xfer,
701 .irq_handler = ata_interrupt,
702 .irq_clear = ata_bmdma_irq_clear,
704 .port_start = ata_port_start,
707 static const struct ata_port_operations sis_old_ops = {
708 .port_disable = ata_port_disable,
709 .set_piomode = sis_old_set_piomode,
710 .set_dmamode = sis_old_set_dmamode,
711 .mode_filter = ata_pci_default_filter,
713 .tf_load = ata_tf_load,
714 .tf_read = ata_tf_read,
715 .check_status = ata_check_status,
716 .exec_command = ata_exec_command,
717 .dev_select = ata_std_dev_select,
719 .freeze = ata_bmdma_freeze,
720 .thaw = ata_bmdma_thaw,
721 .error_handler = sis_old_error_handler,
722 .post_internal_cmd = ata_bmdma_post_internal_cmd,
724 .bmdma_setup = ata_bmdma_setup,
725 .bmdma_start = ata_bmdma_start,
726 .bmdma_stop = ata_bmdma_stop,
727 .bmdma_status = ata_bmdma_status,
728 .qc_prep = ata_qc_prep,
729 .qc_issue = ata_qc_issue_prot,
730 .data_xfer = ata_pio_data_xfer,
732 .irq_handler = ata_interrupt,
733 .irq_clear = ata_bmdma_irq_clear,
735 .port_start = ata_port_start,
738 static struct ata_port_info sis_info = {
740 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
741 .pio_mask = 0x1f, /* pio0-4 */
744 .port_ops = &sis_old_ops,
746 static struct ata_port_info sis_info33 = {
748 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
749 .pio_mask = 0x1f, /* pio0-4 */
751 .udma_mask = ATA_UDMA2, /* UDMA 33 */
752 .port_ops = &sis_old_ops,
754 static struct ata_port_info sis_info66 = {
756 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
757 .pio_mask = 0x1f, /* pio0-4 */
758 .udma_mask = ATA_UDMA4, /* UDMA 66 */
759 .port_ops = &sis_66_ops,
761 static struct ata_port_info sis_info100 = {
763 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
764 .pio_mask = 0x1f, /* pio0-4 */
765 .udma_mask = ATA_UDMA5,
766 .port_ops = &sis_100_ops,
768 static struct ata_port_info sis_info100_early = {
770 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
771 .udma_mask = ATA_UDMA5,
772 .pio_mask = 0x1f, /* pio0-4 */
773 .port_ops = &sis_66_ops,
775 struct ata_port_info sis_info133 = {
777 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
778 .pio_mask = 0x1f, /* pio0-4 */
779 .udma_mask = ATA_UDMA6,
780 .port_ops = &sis_133_ops,
782 static struct ata_port_info sis_info133_early = {
784 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
785 .pio_mask = 0x1f, /* pio0-4 */
786 .udma_mask = ATA_UDMA6,
787 .port_ops = &sis_133_early_ops,
790 /* Privately shared with the SiS180 SATA driver, not for use elsewhere */
791 EXPORT_SYMBOL_GPL(sis_info133);
793 static void sis_fixup(struct pci_dev *pdev, struct sis_chipset *sis)
798 if (sis->info == &sis_info133) {
799 pci_read_config_word(pdev, 0x50, ®w);
801 pci_write_config_word(pdev, 0x50, regw & ~0x08);
802 pci_read_config_word(pdev, 0x52, ®w);
804 pci_write_config_word(pdev, 0x52, regw & ~0x08);
808 if (sis->info == &sis_info133_early || sis->info == &sis_info100) {
810 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
811 /* Set compatibility bit */
812 pci_read_config_byte(pdev, 0x49, ®);
814 pci_write_config_byte(pdev, 0x49, reg | 0x01);
818 if (sis->info == &sis_info66 || sis->info == &sis_info100_early) {
820 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
821 /* Set compatibility bit */
822 pci_read_config_byte(pdev, 0x52, ®);
824 pci_write_config_byte(pdev, 0x52, reg | 0x04);
828 if (sis->info == &sis_info33) {
829 pci_read_config_byte(pdev, PCI_CLASS_PROG, ®);
830 if (( reg & 0x0F ) != 0x00)
831 pci_write_config_byte(pdev, PCI_CLASS_PROG, reg & 0xF0);
832 /* Fall through to ATA16 fixup below */
835 if (sis->info == &sis_info || sis->info == &sis_info33) {
836 /* force per drive recovery and active timings
837 needed on ATA_33 and below chips */
838 pci_read_config_byte(pdev, 0x52, ®);
840 pci_write_config_byte(pdev, 0x52, reg|0x08);
848 * sis_init_one - Register SiS ATA PCI device with kernel services
849 * @pdev: PCI device to register
850 * @ent: Entry in sis_pci_tbl matching with @pdev
852 * Called from kernel PCI layer. We probe for combined mode (sigh),
853 * and then hand over control to libata, for it to do the rest.
856 * Inherited from PCI layer (may sleep).
859 * Zero on success, or -ERRNO value.
862 static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
864 static int printed_version;
865 static struct ata_port_info *port_info[2];
866 struct ata_port_info *port;
867 struct pci_dev *host = NULL;
868 struct sis_chipset *chipset = NULL;
870 static struct sis_chipset sis_chipsets[] = {
872 { 0x0968, &sis_info133 },
873 { 0x0966, &sis_info133 },
874 { 0x0965, &sis_info133 },
875 { 0x0745, &sis_info100 },
876 { 0x0735, &sis_info100 },
877 { 0x0733, &sis_info100 },
878 { 0x0635, &sis_info100 },
879 { 0x0633, &sis_info100 },
881 { 0x0730, &sis_info100_early }, /* 100 with ATA 66 layout */
882 { 0x0550, &sis_info100_early }, /* 100 with ATA 66 layout */
884 { 0x0640, &sis_info66 },
885 { 0x0630, &sis_info66 },
886 { 0x0620, &sis_info66 },
887 { 0x0540, &sis_info66 },
888 { 0x0530, &sis_info66 },
890 { 0x5600, &sis_info33 },
891 { 0x5598, &sis_info33 },
892 { 0x5597, &sis_info33 },
893 { 0x5591, &sis_info33 },
894 { 0x5582, &sis_info33 },
895 { 0x5581, &sis_info33 },
897 { 0x5596, &sis_info },
898 { 0x5571, &sis_info },
899 { 0x5517, &sis_info },
900 { 0x5511, &sis_info },
904 static struct sis_chipset sis133_early = {
905 0x0, &sis_info133_early
907 static struct sis_chipset sis133 = {
910 static struct sis_chipset sis100_early = {
911 0x0, &sis_info100_early
913 static struct sis_chipset sis100 = {
917 if (!printed_version++)
918 dev_printk(KERN_DEBUG, &pdev->dev,
919 "version " DRV_VERSION "\n");
921 /* We have to find the bridge first */
923 for (chipset = &sis_chipsets[0]; chipset->device; chipset++) {
924 host = pci_get_device(PCI_VENDOR_ID_SI, chipset->device, NULL);
926 if (chipset->device == 0x630) { /* SIS630 */
928 pci_read_config_byte(host, PCI_REVISION_ID, &host_rev);
929 if (host_rev >= 0x30) /* 630 ET */
930 chipset = &sis100_early;
936 /* Look for concealed bridges */
942 /* Disable ID masking and register remapping then
943 see what the real ID is */
945 pci_read_config_dword(pdev, 0x54, &idemisc);
946 pci_write_config_dword(pdev, 0x54, idemisc & 0x7fffffff);
947 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
948 pci_write_config_dword(pdev, 0x54, idemisc);
951 case 0x5518: /* SIS 962/963 */
953 if ((idemisc & 0x40000000) == 0) {
954 pci_write_config_dword(pdev, 0x54, idemisc | 0x40000000);
955 printk(KERN_INFO "SIS5513: Switching to 5513 register mapping\n");
958 case 0x0180: /* SIS 965/965L */
961 case 0x1180: /* SIS 966/966L */
968 if (chipset == NULL) {
969 struct pci_dev *lpc_bridge;
975 /* Try the second unmasking technique */
976 pci_read_config_byte(pdev, 0x4a, &idecfg);
977 pci_write_config_byte(pdev, 0x4a, idecfg | 0x10);
978 pci_read_config_word(pdev, PCI_DEVICE_ID, &trueid);
979 pci_write_config_byte(pdev, 0x4a, idecfg);
983 lpc_bridge = pci_get_slot(pdev->bus, 0x10); /* Bus 0 Dev 2 Fn 0 */
984 if (lpc_bridge == NULL)
986 pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev);
987 pci_read_config_byte(pdev, 0x49, &prefctl);
988 pci_dev_put(lpc_bridge);
990 if (sbrev == 0x10 && (prefctl & 0x80)) {
991 chipset = &sis133_early;
1000 /* No chipset info, no support */
1001 if (chipset == NULL)
1004 port = chipset->info;
1005 port->private_data = chipset;
1007 sis_fixup(pdev, chipset);
1009 port_info[0] = port_info[1] = port;
1010 return ata_pci_init_one(pdev, port_info, 2);
1013 static const struct pci_device_id sis_pci_tbl[] = {
1014 { PCI_VDEVICE(SI, 0x5513), }, /* SiS 5513 */
1015 { PCI_VDEVICE(SI, 0x5518), }, /* SiS 5518 */
1020 static struct pci_driver sis_pci_driver = {
1022 .id_table = sis_pci_tbl,
1023 .probe = sis_init_one,
1024 .remove = ata_pci_remove_one,
1025 .suspend = ata_pci_device_suspend,
1026 .resume = ata_pci_device_resume,
1029 static int __init sis_init(void)
1031 return pci_register_driver(&sis_pci_driver);
1034 static void __exit sis_exit(void)
1036 pci_unregister_driver(&sis_pci_driver);
1039 module_init(sis_init);
1040 module_exit(sis_exit);
1042 MODULE_AUTHOR("Alan Cox");
1043 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
1044 MODULE_LICENSE("GPL");
1045 MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
1046 MODULE_VERSION(DRV_VERSION);