[PATCH] ieee1394: remove NULL checks for kfree
[powerpc.git] / drivers / ieee1394 / video1394.c
1 /*
2  * video1394.c - video driver for OHCI 1394 boards
3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software Foundation,
18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19  *
20  * NOTES:
21  *
22  * jds -- add private data to file to keep track of iso contexts associated
23  * with each open -- so release won't kill all iso transfers.
24  * 
25  * Damien Douxchamps: Fix failure when the number of DMA pages per frame is
26  * one.
27  * 
28  * ioctl return codes:
29  * EFAULT is only for invalid address for the argp
30  * EINVAL for out of range values
31  * EBUSY when trying to use an already used resource
32  * ESRCH when trying to free/stop a not used resource
33  * EAGAIN for resource allocation failure that could perhaps succeed later
34  * ENOTTY for unsupported ioctl request
35  *
36  */
37
38 #include <linux/config.h>
39 #include <linux/kernel.h>
40 #include <linux/list.h>
41 #include <linux/slab.h>
42 #include <linux/interrupt.h>
43 #include <linux/wait.h>
44 #include <linux/errno.h>
45 #include <linux/module.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/fs.h>
49 #include <linux/poll.h>
50 #include <linux/smp_lock.h>
51 #include <linux/delay.h>
52 #include <linux/devfs_fs_kernel.h>
53 #include <linux/bitops.h>
54 #include <linux/types.h>
55 #include <linux/vmalloc.h>
56 #include <linux/timex.h>
57 #include <linux/mm.h>
58 #include <linux/ioctl32.h>
59 #include <linux/compat.h>
60 #include <linux/cdev.h>
61
62 #include "ieee1394.h"
63 #include "ieee1394_types.h"
64 #include "hosts.h"
65 #include "ieee1394_core.h"
66 #include "highlevel.h"
67 #include "video1394.h"
68 #include "nodemgr.h"
69 #include "dma.h"
70
71 #include "ohci1394.h"
72
73 #define ISO_CHANNELS 64
74
75 #ifndef virt_to_page
76 #define virt_to_page(x) MAP_NR(x)
77 #endif
78
79 #ifndef vmalloc_32
80 #define vmalloc_32(x) vmalloc(x)
81 #endif
82
83 struct it_dma_prg {
84         struct dma_cmd begin;
85         quadlet_t data[4];
86         struct dma_cmd end;
87         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
88 };
89
90 struct dma_iso_ctx {
91         struct ti_ohci *ohci;
92         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
93         struct ohci1394_iso_tasklet iso_tasklet;
94         int channel;
95         int ctx;
96         int last_buffer;
97         int * next_buffer;  /* For ISO Transmit of video packets
98                                to write the correct SYT field
99                                into the next block */
100         unsigned int num_desc;
101         unsigned int buf_size;
102         unsigned int frame_size;
103         unsigned int packet_size;
104         unsigned int left_size;
105         unsigned int nb_cmd;
106
107         struct dma_region dma;
108
109         struct dma_prog_region *prg_reg;
110
111         struct dma_cmd **ir_prg;
112         struct it_dma_prg **it_prg;
113
114         unsigned int *buffer_status;
115         struct timeval *buffer_time; /* time when the buffer was received */
116         unsigned int *last_used_cmd; /* For ISO Transmit with
117                                         variable sized packets only ! */
118         int ctrlClear;
119         int ctrlSet;
120         int cmdPtr;
121         int ctxMatch;
122         wait_queue_head_t waitq;
123         spinlock_t lock;
124         unsigned int syt_offset;
125         int flags;
126
127         struct list_head link;
128 };
129
130
131 struct file_ctx {
132         struct ti_ohci *ohci;
133         struct list_head context_list;
134         struct dma_iso_ctx *current_ctx;
135 };
136
137 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
138 #define VIDEO1394_DEBUG
139 #endif
140
141 #ifdef DBGMSG
142 #undef DBGMSG
143 #endif
144
145 #ifdef VIDEO1394_DEBUG
146 #define DBGMSG(card, fmt, args...) \
147 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
148 #else
149 #define DBGMSG(card, fmt, args...)
150 #endif
151
152 /* print general (card independent) information */
153 #define PRINT_G(level, fmt, args...) \
154 printk(level "video1394: " fmt "\n" , ## args)
155
156 /* print card specific information */
157 #define PRINT(level, card, fmt, args...) \
158 printk(level "video1394_%d: " fmt "\n" , card , ## args)
159
160 static void wakeup_dma_ir_ctx(unsigned long l);
161 static void wakeup_dma_it_ctx(unsigned long l);
162
163 static struct hpsb_highlevel video1394_highlevel;
164
165 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
166 {
167         int i;
168
169         DBGMSG(d->ohci->host->id, "Freeing dma_iso_ctx %d", d->ctx);
170
171         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
172         if (d->iso_tasklet.link.next != NULL)
173                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
174
175         dma_region_free(&d->dma);
176
177         if (d->prg_reg) {
178                 for (i = 0; i < d->num_desc; i++)
179                         dma_prog_region_free(&d->prg_reg[i]);
180                 kfree(d->prg_reg);
181         }
182
183         kfree(d->ir_prg);
184         kfree(d->it_prg);
185         kfree(d->buffer_status);
186         kfree(d->buffer_time);
187         kfree(d->last_used_cmd);
188         kfree(d->next_buffer);
189         list_del(&d->link);
190         kfree(d);
191
192         return 0;
193 }
194
195 static struct dma_iso_ctx *
196 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
197                   int buf_size, int channel, unsigned int packet_size)
198 {
199         struct dma_iso_ctx *d;
200         int i;
201
202         d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL);
203         if (d == NULL) {
204                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma_iso_ctx");
205                 return NULL;
206         }
207
208         memset(d, 0, sizeof *d);
209
210         d->ohci = ohci;
211         d->type = type;
212         d->channel = channel;
213         d->num_desc = num_desc;
214         d->frame_size = buf_size;
215         d->buf_size = PAGE_ALIGN(buf_size);
216         d->last_buffer = -1;
217         INIT_LIST_HEAD(&d->link);
218         init_waitqueue_head(&d->waitq);
219
220         /* Init the regions for easy cleanup */
221         dma_region_init(&d->dma);
222
223         if (dma_region_alloc(&d->dma, d->num_desc * d->buf_size, ohci->dev,
224                              PCI_DMA_BIDIRECTIONAL)) {
225                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma buffer");
226                 free_dma_iso_ctx(d);
227                 return NULL;
228         }
229
230         if (type == OHCI_ISO_RECEIVE)
231                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
232                                           wakeup_dma_ir_ctx,
233                                           (unsigned long) d);
234         else
235                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
236                                           wakeup_dma_it_ctx,
237                                           (unsigned long) d);
238
239         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
240                 PRINT(KERN_ERR, ohci->host->id, "no free iso %s contexts",
241                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
242                 free_dma_iso_ctx(d);
243                 return NULL;
244         }
245         d->ctx = d->iso_tasklet.context;
246
247         d->prg_reg = kmalloc(d->num_desc * sizeof(struct dma_prog_region),
248                         GFP_KERNEL);
249         if (d->prg_reg == NULL) {
250                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate ir prg regs");
251                 free_dma_iso_ctx(d);
252                 return NULL;
253         }
254         /* Makes for easier cleanup */
255         for (i = 0; i < d->num_desc; i++)
256                 dma_prog_region_init(&d->prg_reg[i]);
257
258         if (type == OHCI_ISO_RECEIVE) {
259                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
260                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
261                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
262                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
263
264                 d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *),
265                                     GFP_KERNEL);
266
267                 if (d->ir_prg == NULL) {
268                         PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
269                         free_dma_iso_ctx(d);
270                         return NULL;
271                 }
272                 memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *));
273
274                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
275                 d->left_size = (d->frame_size % PAGE_SIZE) ?
276                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
277
278                 for (i = 0;i < d->num_desc; i++) {
279                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
280                                                   sizeof(struct dma_cmd), ohci->dev)) {
281                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma ir prg");
282                                 free_dma_iso_ctx(d);
283                                 return NULL;
284                         }
285                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
286                 }
287
288         } else {  /* OHCI_ISO_TRANSMIT */
289                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
290                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
291                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
292
293                 d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *),
294                                     GFP_KERNEL);
295
296                 if (d->it_prg == NULL) {
297                         PRINT(KERN_ERR, ohci->host->id,
298                               "Failed to allocate dma it prg");
299                         free_dma_iso_ctx(d);
300                         return NULL;
301                 }
302                 memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *));
303
304                 d->packet_size = packet_size;
305
306                 if (PAGE_SIZE % packet_size || packet_size>4096) {
307                         PRINT(KERN_ERR, ohci->host->id,
308                               "Packet size %d (page_size: %ld) "
309                               "not yet supported\n",
310                               packet_size, PAGE_SIZE);
311                         free_dma_iso_ctx(d);
312                         return NULL;
313                 }
314
315                 d->nb_cmd = d->frame_size / d->packet_size;
316                 if (d->frame_size % d->packet_size) {
317                         d->nb_cmd++;
318                         d->left_size = d->frame_size % d->packet_size;
319                 } else
320                         d->left_size = d->packet_size;
321
322                 for (i = 0; i < d->num_desc; i++) {
323                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
324                                                 sizeof(struct it_dma_prg), ohci->dev)) {
325                                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate dma it prg");
326                                 free_dma_iso_ctx(d);
327                                 return NULL;
328                         }
329                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
330                 }
331         }
332
333         d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),
334                                    GFP_KERNEL);
335         d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),
336                                    GFP_KERNEL);
337         d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),
338                                    GFP_KERNEL);
339         d->next_buffer = kmalloc(d->num_desc * sizeof(int),
340                                  GFP_KERNEL);
341
342         if (d->buffer_status == NULL) {
343                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_status");
344                 free_dma_iso_ctx(d);
345                 return NULL;
346         }
347         if (d->buffer_time == NULL) {
348                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate buffer_time");
349                 free_dma_iso_ctx(d);
350                 return NULL;
351         }
352         if (d->last_used_cmd == NULL) {
353                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate last_used_cmd");
354                 free_dma_iso_ctx(d);
355                 return NULL;
356         }
357         if (d->next_buffer == NULL) {
358                 PRINT(KERN_ERR, ohci->host->id, "Failed to allocate next_buffer");
359                 free_dma_iso_ctx(d);
360                 return NULL;
361         }
362         memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));
363         memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));
364         memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));
365         memset(d->next_buffer, -1, d->num_desc * sizeof(int));
366
367         spin_lock_init(&d->lock);
368
369         PRINT(KERN_INFO, ohci->host->id, "Iso %s DMA: %d buffers "
370               "of size %d allocated for a frame size %d, each with %d prgs",
371               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
372               d->num_desc, d->buf_size, d->frame_size, d->nb_cmd);
373
374         return d;
375 }
376
377 static void reset_ir_status(struct dma_iso_ctx *d, int n)
378 {
379         int i;
380         d->ir_prg[n][0].status = cpu_to_le32(4);
381         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
382         for (i = 2; i < d->nb_cmd - 1; i++)
383                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
384         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
385 }
386
387 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
388 {
389         struct dma_cmd *ir_prg = d->ir_prg[n];
390         struct dma_prog_region *ir_reg = &d->prg_reg[n];
391         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
392         int i;
393
394         /* the first descriptor will read only 4 bytes */
395         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
396                 DMA_CTL_BRANCH | 4);
397
398         /* set the sync flag */
399         if (flags & VIDEO1394_SYNC_FRAMES)
400                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
401
402         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
403                                 (unsigned long)d->dma.kvirt));
404         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
405                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
406
407         /* If there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
408         if (d->nb_cmd > 2) {
409                 /* The second descriptor will read PAGE_SIZE-4 bytes */
410                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
411                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
412                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
413                                                 (unsigned long)d->dma.kvirt));
414                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
415                                                       2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
416
417                 for (i = 2; i < d->nb_cmd - 1; i++) {
418                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
419                                                         DMA_CTL_BRANCH | PAGE_SIZE);
420                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
421                                                         (buf+(i-1)*PAGE_SIZE) -
422                                                         (unsigned long)d->dma.kvirt));
423
424                         ir_prg[i].branchAddress =
425                                 cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
426                                             (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
427                 }
428
429                 /* The last descriptor will generate an interrupt */
430                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
431                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
432                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
433                                                 (buf+(i-1)*PAGE_SIZE) -
434                                                 (unsigned long)d->dma.kvirt));
435         } else {
436                 /* Only one DMA page is used. Read d->left_size immediately and */
437                 /* generate an interrupt as this is also the last page. */
438                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
439                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
440                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
441                                                 (buf + 4) - (unsigned long)d->dma.kvirt));
442         }
443 }
444
445 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
446 {
447         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
448         int i;
449
450         d->flags = flags;
451
452         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
453
454         for (i=0;i<d->num_desc;i++) {
455                 initialize_dma_ir_prg(d, i, flags);
456                 reset_ir_status(d, i);
457         }
458
459         /* reset the ctrl register */
460         reg_write(ohci, d->ctrlClear, 0xf0000000);
461
462         /* Set bufferFill */
463         reg_write(ohci, d->ctrlSet, 0x80000000);
464
465         /* Set isoch header */
466         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS)
467                 reg_write(ohci, d->ctrlSet, 0x40000000);
468
469         /* Set the context match register to match on all tags,
470            sync for sync tag, and listen to d->channel */
471         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
472
473         /* Set up isoRecvIntMask to generate interrupts */
474         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
475 }
476
477 /* find which context is listening to this channel */
478 static struct dma_iso_ctx *
479 find_ctx(struct list_head *list, int type, int channel)
480 {
481         struct dma_iso_ctx *ctx;
482
483         list_for_each_entry(ctx, list, link) {
484                 if (ctx->type == type && ctx->channel == channel)
485                         return ctx;
486         }
487
488         return NULL;
489 }
490
491 static void wakeup_dma_ir_ctx(unsigned long l)
492 {
493         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
494         int i;
495
496         spin_lock(&d->lock);
497
498         for (i = 0; i < d->num_desc; i++) {
499                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
500                         reset_ir_status(d, i);
501                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
502                         do_gettimeofday(&d->buffer_time[i]);
503                 }
504         }
505
506         spin_unlock(&d->lock);
507
508         if (waitqueue_active(&d->waitq))
509                 wake_up_interruptible(&d->waitq);
510 }
511
512 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
513                                  int n)
514 {
515         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
516         u32 cycleTimer;
517         u32 timeStamp;
518
519         if (n == -1) {
520           return;
521         }
522
523         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
524
525         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
526         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
527                 + (cycleTimer & 0xf000)) & 0xffff;
528
529         buf[6] = timeStamp >> 8;
530         buf[7] = timeStamp & 0xff;
531
532     /* if first packet is empty packet, then put timestamp into the next full one too */
533     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
534             buf += d->packet_size;
535         buf[6] = timeStamp >> 8;
536             buf[7] = timeStamp & 0xff;
537         }
538
539     /* do the next buffer frame too in case of irq latency */
540         n = d->next_buffer[n];
541         if (n == -1) {
542           return;
543         }
544         buf = d->dma.kvirt + n * d->buf_size;
545
546         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
547
548         buf[6] = timeStamp >> 8;
549         buf[7] = timeStamp & 0xff;
550
551     /* if first packet is empty packet, then put timestamp into the next full one too */
552     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
553             buf += d->packet_size;
554         buf[6] = timeStamp >> 8;
555             buf[7] = timeStamp & 0xff;
556         }
557
558 #if 0
559         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
560                curr, n, cycleTimer, timeStamp);
561 #endif
562 }
563
564 static void wakeup_dma_it_ctx(unsigned long l)
565 {
566         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
567         struct ti_ohci *ohci = d->ohci;
568         int i;
569
570         spin_lock(&d->lock);
571
572         for (i = 0; i < d->num_desc; i++) {
573                 if (d->it_prg[i][d->last_used_cmd[i]].end.status &
574                     cpu_to_le32(0xFFFF0000)) {
575                         int next = d->next_buffer[i];
576                         put_timestamp(ohci, d, next);
577                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
578                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
579                 }
580         }
581
582         spin_unlock(&d->lock);
583
584         if (waitqueue_active(&d->waitq))
585                 wake_up_interruptible(&d->waitq);
586 }
587
588 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
589 {
590         struct it_dma_prg *it_prg = d->it_prg[n];
591         struct dma_prog_region *it_reg = &d->prg_reg[n];
592         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
593         int i;
594         d->last_used_cmd[n] = d->nb_cmd - 1;
595         for (i=0;i<d->nb_cmd;i++) {
596
597                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
598                         DMA_CTL_IMMEDIATE | 8) ;
599                 it_prg[i].begin.address = 0;
600
601                 it_prg[i].begin.status = 0;
602
603                 it_prg[i].data[0] = cpu_to_le32(
604                         (IEEE1394_SPEED_100 << 16)
605                         | (/* tag */ 1 << 14)
606                         | (d->channel << 8)
607                         | (TCODE_ISO_DATA << 4));
608                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
609                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
610                 it_prg[i].data[2] = 0;
611                 it_prg[i].data[3] = 0;
612
613                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
614                                              DMA_CTL_BRANCH);
615                 it_prg[i].end.address =
616                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
617                                                 (unsigned long)d->dma.kvirt));
618
619                 if (i<d->nb_cmd-1) {
620                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
621                         it_prg[i].begin.branchAddress =
622                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
623                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
624                         it_prg[i].end.branchAddress =
625                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
626                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
627                 } else {
628                         /* the last prg generates an interrupt */
629                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
630                                 DMA_CTL_IRQ | d->left_size);
631                         /* the last prg doesn't branch */
632                         it_prg[i].begin.branchAddress = 0;
633                         it_prg[i].end.branchAddress = 0;
634                 }
635                 it_prg[i].end.status = 0;
636         }
637 }
638
639 static void initialize_dma_it_prg_var_packet_queue(
640         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
641         struct ti_ohci *ohci)
642 {
643         struct it_dma_prg *it_prg = d->it_prg[n];
644         struct dma_prog_region *it_reg = &d->prg_reg[n];
645         int i;
646
647 #if 0
648         if (n != -1) {
649                 put_timestamp(ohci, d, n);
650         }
651 #endif
652         d->last_used_cmd[n] = d->nb_cmd - 1;
653
654         for (i = 0; i < d->nb_cmd; i++) {
655                 unsigned int size;
656                 if (packet_sizes[i] > d->packet_size) {
657                         size = d->packet_size;
658                 } else {
659                         size = packet_sizes[i];
660                 }
661                 it_prg[i].data[1] = cpu_to_le32(size << 16);
662                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
663
664                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
665                         it_prg[i].end.control |= cpu_to_le32(size);
666                         it_prg[i].begin.branchAddress =
667                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
668                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
669                         it_prg[i].end.branchAddress =
670                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
671                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
672                 } else {
673                         /* the last prg generates an interrupt */
674                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE |
675                                 DMA_CTL_IRQ | size);
676                         /* the last prg doesn't branch */
677                         it_prg[i].begin.branchAddress = 0;
678                         it_prg[i].end.branchAddress = 0;
679                         d->last_used_cmd[n] = i;
680                         break;
681                 }
682         }
683 }
684
685 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
686                                   unsigned int syt_offset, int flags)
687 {
688         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
689         int i;
690
691         d->flags = flags;
692         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
693
694         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
695
696         for (i=0;i<d->num_desc;i++)
697                 initialize_dma_it_prg(d, i, sync_tag);
698
699         /* Set up isoRecvIntMask to generate interrupts */
700         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
701 }
702
703 static inline unsigned video1394_buffer_state(struct dma_iso_ctx *d,
704                                               unsigned int buffer)
705 {
706         unsigned long flags;
707         unsigned int ret;
708         spin_lock_irqsave(&d->lock, flags);
709         ret = d->buffer_status[buffer];
710         spin_unlock_irqrestore(&d->lock, flags);
711         return ret;
712 }
713
714 static int __video1394_ioctl(struct file *file,
715                              unsigned int cmd, unsigned long arg)
716 {
717         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
718         struct ti_ohci *ohci = ctx->ohci;
719         unsigned long flags;
720         void __user *argp = (void __user *)arg;
721
722         switch(cmd)
723         {
724         case VIDEO1394_IOC_LISTEN_CHANNEL:
725         case VIDEO1394_IOC_TALK_CHANNEL:
726         {
727                 struct video1394_mmap v;
728                 u64 mask;
729                 struct dma_iso_ctx *d;
730                 int i;
731
732                 if (copy_from_user(&v, argp, sizeof(v)))
733                         return -EFAULT;
734
735                 /* if channel < 0, find lowest available one */
736                 if (v.channel < 0) {
737                     mask = (u64)0x1;
738                     for (i=0; ; i++) {
739                         if (i == ISO_CHANNELS) {
740                             PRINT(KERN_ERR, ohci->host->id, 
741                                   "No free channel found");
742                             return EAGAIN;
743                         }
744                         if (!(ohci->ISO_channel_usage & mask)) {
745                             v.channel = i;
746                             PRINT(KERN_INFO, ohci->host->id, "Found free channel %d", i);
747                             break;
748                         }
749                         mask = mask << 1;
750                     }
751                 } else if (v.channel >= ISO_CHANNELS) {
752                         PRINT(KERN_ERR, ohci->host->id,
753                               "Iso channel %d out of bounds", v.channel);
754                         return -EINVAL;
755                 } else {
756                         mask = (u64)0x1<<v.channel;
757                 }
758                 PRINT(KERN_INFO, ohci->host->id, "mask: %08X%08X usage: %08X%08X\n",
759                         (u32)(mask>>32),(u32)(mask&0xffffffff),
760                         (u32)(ohci->ISO_channel_usage>>32),
761                         (u32)(ohci->ISO_channel_usage&0xffffffff));
762                 if (ohci->ISO_channel_usage & mask) {
763                         PRINT(KERN_ERR, ohci->host->id,
764                               "Channel %d is already taken", v.channel);
765                         return -EBUSY;
766                 }
767
768                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
769                         PRINT(KERN_ERR, ohci->host->id,
770                               "Invalid %d length buffer requested",v.buf_size);
771                         return -EINVAL;
772                 }
773
774                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
775                         PRINT(KERN_ERR, ohci->host->id,
776                               "Invalid %d buffers requested",v.nb_buffers);
777                         return -EINVAL;
778                 }
779
780                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
781                         PRINT(KERN_ERR, ohci->host->id,
782                               "%d buffers of size %d bytes is too big",
783                               v.nb_buffers, v.buf_size);
784                         return -EINVAL;
785                 }
786
787                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL) {
788                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
789                                               v.nb_buffers, v.buf_size,
790                                               v.channel, 0);
791
792                         if (d == NULL) {
793                                 PRINT(KERN_ERR, ohci->host->id,
794                                       "Couldn't allocate ir context");
795                                 return -EAGAIN;
796                         }
797                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
798
799                         ctx->current_ctx = d;
800
801                         v.buf_size = d->buf_size;
802                         list_add_tail(&d->link, &ctx->context_list);
803
804                         PRINT(KERN_INFO, ohci->host->id,
805                               "iso context %d listen on channel %d",
806                               d->ctx, v.channel);
807                 }
808                 else {
809                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
810                                               v.nb_buffers, v.buf_size,
811                                               v.channel, v.packet_size);
812
813                         if (d == NULL) {
814                                 PRINT(KERN_ERR, ohci->host->id,
815                                       "Couldn't allocate it context");
816                                 return -EAGAIN;
817                         }
818                         initialize_dma_it_ctx(d, v.sync_tag,
819                                               v.syt_offset, v.flags);
820
821                         ctx->current_ctx = d;
822
823                         v.buf_size = d->buf_size;
824
825                         list_add_tail(&d->link, &ctx->context_list);
826
827                         PRINT(KERN_INFO, ohci->host->id,
828                               "Iso context %d talk on channel %d", d->ctx,
829                               v.channel);
830                 }
831
832                 if (copy_to_user((void *)arg, &v, sizeof(v))) {
833                         /* FIXME : free allocated dma resources */
834                         return -EFAULT;
835                 }
836                 
837                 ohci->ISO_channel_usage |= mask;
838
839                 return 0;
840         }
841         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
842         case VIDEO1394_IOC_UNTALK_CHANNEL:
843         {
844                 int channel;
845                 u64 mask;
846                 struct dma_iso_ctx *d;
847
848                 if (copy_from_user(&channel, argp, sizeof(int)))
849                         return -EFAULT;
850
851                 if (channel < 0 || channel >= ISO_CHANNELS) {
852                         PRINT(KERN_ERR, ohci->host->id,
853                               "Iso channel %d out of bound", channel);
854                         return -EINVAL;
855                 }
856                 mask = (u64)0x1<<channel;
857                 if (!(ohci->ISO_channel_usage & mask)) {
858                         PRINT(KERN_ERR, ohci->host->id,
859                               "Channel %d is not being used", channel);
860                         return -ESRCH;
861                 }
862
863                 /* Mark this channel as unused */
864                 ohci->ISO_channel_usage &= ~mask;
865
866                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL)
867                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
868                 else
869                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
870
871                 if (d == NULL) return -ESRCH;
872                 PRINT(KERN_INFO, ohci->host->id, "Iso context %d "
873                       "stop talking on channel %d", d->ctx, channel);
874                 free_dma_iso_ctx(d);
875
876                 return 0;
877         }
878         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
879         {
880                 struct video1394_wait v;
881                 struct dma_iso_ctx *d;
882
883                 if (copy_from_user(&v, argp, sizeof(v)))
884                         return -EFAULT;
885
886                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
887                 if (d == NULL) return -EFAULT;
888
889                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
890                         PRINT(KERN_ERR, ohci->host->id,
891                               "Buffer %d out of range",v.buffer);
892                         return -EINVAL;
893                 }
894
895                 spin_lock_irqsave(&d->lock,flags);
896
897                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
898                         PRINT(KERN_ERR, ohci->host->id,
899                               "Buffer %d is already used",v.buffer);
900                         spin_unlock_irqrestore(&d->lock,flags);
901                         return -EBUSY;
902                 }
903
904                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
905
906                 if (d->last_buffer>=0)
907                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
908                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0)
909                                         & 0xfffffff0) | 0x1);
910
911                 d->last_buffer = v.buffer;
912
913                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
914
915                 spin_unlock_irqrestore(&d->lock,flags);
916
917                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
918                 {
919                         DBGMSG(ohci->host->id, "Starting iso DMA ctx=%d",d->ctx);
920
921                         /* Tell the controller where the first program is */
922                         reg_write(ohci, d->cmdPtr,
923                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x1);
924
925                         /* Run IR context */
926                         reg_write(ohci, d->ctrlSet, 0x8000);
927                 }
928                 else {
929                         /* Wake up dma context if necessary */
930                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
931                                 PRINT(KERN_INFO, ohci->host->id,
932                                       "Waking up iso dma ctx=%d", d->ctx);
933                                 reg_write(ohci, d->ctrlSet, 0x1000);
934                         }
935                 }
936                 return 0;
937
938         }
939         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
940         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
941         {
942                 struct video1394_wait v;
943                 struct dma_iso_ctx *d;
944                 int i;
945
946                 if (copy_from_user(&v, argp, sizeof(v)))
947                         return -EFAULT;
948
949                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
950                 if (d == NULL) return -EFAULT;
951
952                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
953                         PRINT(KERN_ERR, ohci->host->id,
954                               "Buffer %d out of range",v.buffer);
955                         return -EINVAL;
956                 }
957
958                 /*
959                  * I change the way it works so that it returns
960                  * the last received frame.
961                  */
962                 spin_lock_irqsave(&d->lock, flags);
963                 switch(d->buffer_status[v.buffer]) {
964                 case VIDEO1394_BUFFER_READY:
965                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
966                         break;
967                 case VIDEO1394_BUFFER_QUEUED:
968                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER) {
969                             /* for polling, return error code EINTR */
970                             spin_unlock_irqrestore(&d->lock, flags);
971                             return -EINTR;
972                         }
973
974                         spin_unlock_irqrestore(&d->lock, flags);
975                         wait_event_interruptible(d->waitq,
976                                         video1394_buffer_state(d, v.buffer) ==
977                                          VIDEO1394_BUFFER_READY);
978                         if (signal_pending(current))
979                                 return -EINTR;
980                         spin_lock_irqsave(&d->lock, flags);
981                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
982                         break;
983                 default:
984                         PRINT(KERN_ERR, ohci->host->id,
985                               "Buffer %d is not queued",v.buffer);
986                         spin_unlock_irqrestore(&d->lock, flags);
987                         return -ESRCH;
988                 }
989
990                 /* set time of buffer */
991                 v.filltime = d->buffer_time[v.buffer];
992 //              printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
993
994                 /*
995                  * Look ahead to see how many more buffers have been received
996                  */
997                 i=0;
998                 while (d->buffer_status[(v.buffer+1)%d->num_desc]==
999                        VIDEO1394_BUFFER_READY) {
1000                         v.buffer=(v.buffer+1)%d->num_desc;
1001                         i++;
1002                 }
1003                 spin_unlock_irqrestore(&d->lock, flags);
1004
1005                 v.buffer=i;
1006                 if (copy_to_user(argp, &v, sizeof(v)))
1007                         return -EFAULT;
1008
1009                 return 0;
1010         }
1011         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1012         {
1013                 struct video1394_wait v;
1014                 unsigned int *psizes = NULL;
1015                 struct dma_iso_ctx *d;
1016
1017                 if (copy_from_user(&v, argp, sizeof(v)))
1018                         return -EFAULT;
1019
1020                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1021                 if (d == NULL) return -EFAULT;
1022
1023                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1024                         PRINT(KERN_ERR, ohci->host->id,
1025                               "Buffer %d out of range",v.buffer);
1026                         return -EINVAL;
1027                 }
1028
1029                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1030                         int buf_size = d->nb_cmd * sizeof(unsigned int);
1031                         struct video1394_queue_variable __user *p = argp;
1032                         unsigned int __user *qv;
1033
1034                         if (get_user(qv, &p->packet_sizes))
1035                                 return -EFAULT;
1036
1037                         psizes = kmalloc(buf_size, GFP_KERNEL);
1038                         if (!psizes)
1039                                 return -ENOMEM;
1040
1041                         if (copy_from_user(psizes, qv, buf_size)) {
1042                                 kfree(psizes);
1043                                 return -EFAULT;
1044                         }
1045                 }
1046
1047                 spin_lock_irqsave(&d->lock,flags);
1048
1049                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1050                         PRINT(KERN_ERR, ohci->host->id,
1051                               "Buffer %d is already used",v.buffer);
1052                         spin_unlock_irqrestore(&d->lock,flags);
1053                         kfree(psizes);
1054                         return -EBUSY;
1055                 }
1056
1057                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1058                         initialize_dma_it_prg_var_packet_queue(
1059                                 d, v.buffer, psizes,
1060                                 ohci);
1061                 }
1062
1063                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1064
1065                 if (d->last_buffer >= 0) {
1066                         d->it_prg[d->last_buffer]
1067                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress =
1068                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1069                                                 0) & 0xfffffff0) | 0x3);
1070
1071                         d->it_prg[d->last_buffer]
1072                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1073                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1074                                                 0) & 0xfffffff0) | 0x3);
1075                         d->next_buffer[d->last_buffer] = v.buffer;
1076                 }
1077                 d->last_buffer = v.buffer;
1078                 d->next_buffer[d->last_buffer] = -1;
1079
1080                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1081
1082                 spin_unlock_irqrestore(&d->lock,flags);
1083
1084                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000))
1085                 {
1086                         DBGMSG(ohci->host->id, "Starting iso transmit DMA ctx=%d",
1087                                d->ctx);
1088                         put_timestamp(ohci, d, d->last_buffer);
1089
1090                         /* Tell the controller where the first program is */
1091                         reg_write(ohci, d->cmdPtr,
1092                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x3);
1093
1094                         /* Run IT context */
1095                         reg_write(ohci, d->ctrlSet, 0x8000);
1096                 }
1097                 else {
1098                         /* Wake up dma context if necessary */
1099                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1100                                 PRINT(KERN_INFO, ohci->host->id,
1101                                       "Waking up iso transmit dma ctx=%d",
1102                                       d->ctx);
1103                                 put_timestamp(ohci, d, d->last_buffer);
1104                                 reg_write(ohci, d->ctrlSet, 0x1000);
1105                         }
1106                 }
1107
1108                 kfree(psizes);
1109                 return 0;
1110
1111         }
1112         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1113         {
1114                 struct video1394_wait v;
1115                 struct dma_iso_ctx *d;
1116
1117                 if (copy_from_user(&v, argp, sizeof(v)))
1118                         return -EFAULT;
1119
1120                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1121                 if (d == NULL) return -EFAULT;
1122
1123                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1124                         PRINT(KERN_ERR, ohci->host->id,
1125                               "Buffer %d out of range",v.buffer);
1126                         return -EINVAL;
1127                 }
1128
1129                 switch(d->buffer_status[v.buffer]) {
1130                 case VIDEO1394_BUFFER_READY:
1131                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1132                         return 0;
1133                 case VIDEO1394_BUFFER_QUEUED:
1134                         wait_event_interruptible(d->waitq,
1135                                         (d->buffer_status[v.buffer] == VIDEO1394_BUFFER_READY));
1136                         if (signal_pending(current))
1137                                 return -EINTR;
1138                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1139                         return 0;
1140                 default:
1141                         PRINT(KERN_ERR, ohci->host->id,
1142                               "Buffer %d is not queued",v.buffer);
1143                         return -ESRCH;
1144                 }
1145         }
1146         default:
1147                 return -ENOTTY;
1148         }
1149 }
1150
1151 static long video1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1152 {
1153         int err;
1154         lock_kernel();
1155         err = __video1394_ioctl(file, cmd, arg);
1156         unlock_kernel();
1157         return err;
1158 }
1159
1160 /*
1161  *      This maps the vmalloced and reserved buffer to user space.
1162  *
1163  *  FIXME:
1164  *  - PAGE_READONLY should suffice!?
1165  *  - remap_pfn_range is kind of inefficient for page by page remapping.
1166  *    But e.g. pte_alloc() does not work in modules ... :-(
1167  */
1168
1169 static int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1170 {
1171         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1172         int res = -EINVAL;
1173
1174         lock_kernel();
1175         if (ctx->current_ctx == NULL) {
1176                 PRINT(KERN_ERR, ctx->ohci->host->id, "Current iso context not set");
1177         } else
1178                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1179         unlock_kernel();
1180
1181         return res;
1182 }
1183
1184 static int video1394_open(struct inode *inode, struct file *file)
1185 {
1186         int i = ieee1394_file_to_instance(file);
1187         struct ti_ohci *ohci;
1188         struct file_ctx *ctx;
1189
1190         ohci = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1191         if (ohci == NULL)
1192                 return -EIO;
1193
1194         ctx = kmalloc(sizeof(struct file_ctx), GFP_KERNEL);
1195         if (ctx == NULL)  {
1196                 PRINT(KERN_ERR, ohci->host->id, "Cannot malloc file_ctx");
1197                 return -ENOMEM;
1198         }
1199
1200         memset(ctx, 0, sizeof(struct file_ctx));
1201         ctx->ohci = ohci;
1202         INIT_LIST_HEAD(&ctx->context_list);
1203         ctx->current_ctx = NULL;
1204         file->private_data = ctx;
1205
1206         return 0;
1207 }
1208
1209 static int video1394_release(struct inode *inode, struct file *file)
1210 {
1211         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1212         struct ti_ohci *ohci = ctx->ohci;
1213         struct list_head *lh, *next;
1214         u64 mask;
1215
1216         lock_kernel();
1217         list_for_each_safe(lh, next, &ctx->context_list) {
1218                 struct dma_iso_ctx *d;
1219                 d = list_entry(lh, struct dma_iso_ctx, link);
1220                 mask = (u64) 1 << d->channel;
1221
1222                 if (!(ohci->ISO_channel_usage & mask))
1223                         PRINT(KERN_ERR, ohci->host->id, "On release: Channel %d "
1224                               "is not being used", d->channel);
1225                 else
1226                         ohci->ISO_channel_usage &= ~mask;
1227                 PRINT(KERN_INFO, ohci->host->id, "On release: Iso %s context "
1228                       "%d stop listening on channel %d",
1229                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1230                       d->ctx, d->channel);
1231                 free_dma_iso_ctx(d);
1232         }
1233
1234         kfree(ctx);
1235         file->private_data = NULL;
1236
1237         unlock_kernel();
1238         return 0;
1239 }
1240
1241 #ifdef CONFIG_COMPAT
1242 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg);
1243 #endif
1244
1245 static struct cdev video1394_cdev;
1246 static struct file_operations video1394_fops=
1247 {
1248         .owner =        THIS_MODULE,
1249         .unlocked_ioctl = video1394_ioctl,
1250 #ifdef CONFIG_COMPAT
1251         .compat_ioctl = video1394_compat_ioctl,
1252 #endif
1253         .mmap =         video1394_mmap,
1254         .open =         video1394_open,
1255         .release =      video1394_release
1256 };
1257
1258 /*** HOTPLUG STUFF **********************************************************/
1259 /*
1260  * Export information about protocols/devices supported by this driver.
1261  */
1262 static struct ieee1394_device_id video1394_id_table[] = {
1263         {
1264                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1265                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1266                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1267         },
1268         {
1269                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1270                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1271                 .version        = (CAMERA_SW_VERSION_ENTRY + 1) & 0xffffff
1272         },
1273         {
1274                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1275                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1276                 .version        = (CAMERA_SW_VERSION_ENTRY + 2) & 0xffffff
1277         },
1278         { }
1279 };
1280
1281 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1282
1283 static struct hpsb_protocol_driver video1394_driver = {
1284         .name           = "1394 Digital Camera Driver",
1285         .id_table       = video1394_id_table,
1286         .driver         = {
1287                 .name   = VIDEO1394_DRIVER_NAME,
1288                 .bus    = &ieee1394_bus_type,
1289         },
1290 };
1291
1292
1293 static void video1394_add_host (struct hpsb_host *host)
1294 {
1295         struct ti_ohci *ohci;
1296         int minor;
1297
1298         /* We only work with the OHCI-1394 driver */
1299         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1300                 return;
1301
1302         ohci = (struct ti_ohci *)host->hostdata;
1303
1304         if (!hpsb_create_hostinfo(&video1394_highlevel, host, 0)) {
1305                 PRINT(KERN_ERR, ohci->host->id, "Cannot allocate hostinfo");
1306                 return;
1307         }
1308
1309         hpsb_set_hostinfo(&video1394_highlevel, host, ohci);
1310         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->host->id);
1311
1312         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id;
1313         class_simple_device_add(hpsb_protocol_class, MKDEV(
1314                 IEEE1394_MAJOR, minor), 
1315                 NULL, "%s-%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1316         devfs_mk_cdev(MKDEV(IEEE1394_MAJOR, minor),
1317                        S_IFCHR | S_IRUSR | S_IWUSR,
1318                        "%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1319 }
1320
1321
1322 static void video1394_remove_host (struct hpsb_host *host)
1323 {
1324         struct ti_ohci *ohci = hpsb_get_hostinfo(&video1394_highlevel, host);
1325
1326         if (ohci) {
1327                 class_simple_device_remove(MKDEV(IEEE1394_MAJOR, 
1328                         IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->host->id));
1329                 devfs_remove("%s/%d", VIDEO1394_DRIVER_NAME, ohci->host->id);
1330         }
1331         
1332         return;
1333 }
1334
1335
1336 static struct hpsb_highlevel video1394_highlevel = {
1337         .name =         VIDEO1394_DRIVER_NAME,
1338         .add_host =     video1394_add_host,
1339         .remove_host =  video1394_remove_host,
1340 };
1341
1342 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1343 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1344 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1345 MODULE_LICENSE("GPL");
1346
1347 #ifdef CONFIG_COMPAT
1348
1349 #define VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER     \
1350         _IOW ('#', 0x12, struct video1394_wait32)
1351 #define VIDEO1394_IOC32_LISTEN_WAIT_BUFFER      \
1352         _IOWR('#', 0x13, struct video1394_wait32)
1353 #define VIDEO1394_IOC32_TALK_WAIT_BUFFER        \
1354         _IOW ('#', 0x17, struct video1394_wait32)
1355 #define VIDEO1394_IOC32_LISTEN_POLL_BUFFER      \
1356         _IOWR('#', 0x18, struct video1394_wait32)
1357
1358 struct video1394_wait32 {
1359         u32 channel;
1360         u32 buffer;
1361         struct compat_timeval filltime;
1362 };
1363
1364 static int video1394_wr_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1365 {
1366         struct video1394_wait32 __user *argp = (void __user *)arg;
1367         struct video1394_wait32 wait32;
1368         struct video1394_wait wait;
1369         mm_segment_t old_fs;
1370         int ret;
1371
1372         if (copy_from_user(&wait32, argp, sizeof(wait32)))
1373                 return -EFAULT;
1374
1375         wait.channel = wait32.channel;
1376         wait.buffer = wait32.buffer;
1377         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1378         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1379
1380         old_fs = get_fs();
1381         set_fs(KERNEL_DS);
1382         if (cmd == VIDEO1394_IOC32_LISTEN_WAIT_BUFFER)
1383                 ret = video1394_ioctl(file,
1384                                       VIDEO1394_IOC_LISTEN_WAIT_BUFFER,
1385                                       (unsigned long) &wait);
1386         else
1387                 ret = video1394_ioctl(file,
1388                                       VIDEO1394_IOC_LISTEN_POLL_BUFFER,
1389                                       (unsigned long) &wait);
1390         set_fs(old_fs);
1391
1392         if (!ret) {
1393                 wait32.channel = wait.channel;
1394                 wait32.buffer = wait.buffer;
1395                 wait32.filltime.tv_sec = (int)wait.filltime.tv_sec;
1396                 wait32.filltime.tv_usec = (int)wait.filltime.tv_usec;
1397
1398                 if (copy_to_user(argp, &wait32, sizeof(wait32)))
1399                         ret = -EFAULT;
1400         }
1401
1402         return ret;
1403 }
1404
1405 static int video1394_w_wait32(struct file *file, unsigned int cmd, unsigned long arg)
1406 {
1407         struct video1394_wait32 wait32;
1408         struct video1394_wait wait;
1409         mm_segment_t old_fs;
1410         int ret;
1411
1412         if (copy_from_user(&wait32, (void __user *)arg, sizeof(wait32)))
1413                 return -EFAULT;
1414
1415         wait.channel = wait32.channel;
1416         wait.buffer = wait32.buffer;
1417         wait.filltime.tv_sec = (time_t)wait32.filltime.tv_sec;
1418         wait.filltime.tv_usec = (suseconds_t)wait32.filltime.tv_usec;
1419
1420         old_fs = get_fs();
1421         set_fs(KERNEL_DS);
1422         if (cmd == VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER)
1423                 ret = video1394_ioctl(file,
1424                                       VIDEO1394_IOC_LISTEN_QUEUE_BUFFER,
1425                                       (unsigned long) &wait);
1426         else
1427                 ret = video1394_ioctl(file,
1428                                       VIDEO1394_IOC_TALK_WAIT_BUFFER,
1429                                       (unsigned long) &wait);
1430         set_fs(old_fs);
1431
1432         return ret;
1433 }
1434
1435 static int video1394_queue_buf32(struct file *file, unsigned int cmd, unsigned long arg)
1436 {
1437         return -EFAULT;   /* ??? was there before. */
1438
1439         return video1394_ioctl(file,
1440                                 VIDEO1394_IOC_TALK_QUEUE_BUFFER, arg);
1441 }
1442
1443 static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg)
1444 {
1445         switch (cmd) {
1446         case VIDEO1394_IOC_LISTEN_CHANNEL:
1447         case VIDEO1394_IOC_UNLISTEN_CHANNEL:
1448         case VIDEO1394_IOC_TALK_CHANNEL:
1449         case VIDEO1394_IOC_UNTALK_CHANNEL:
1450                 return video1394_ioctl(f, cmd, arg);
1451
1452         case VIDEO1394_IOC32_LISTEN_QUEUE_BUFFER:
1453                 return video1394_w_wait32(f, cmd, arg);
1454         case VIDEO1394_IOC32_LISTEN_WAIT_BUFFER:
1455                 return video1394_wr_wait32(f, cmd, arg);
1456         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1457                 return video1394_queue_buf32(f, cmd, arg);
1458         case VIDEO1394_IOC32_TALK_WAIT_BUFFER:
1459                 return video1394_w_wait32(f, cmd, arg);
1460         case VIDEO1394_IOC32_LISTEN_POLL_BUFFER:
1461                 return video1394_wr_wait32(f, cmd, arg);
1462         default:
1463                 return -ENOIOCTLCMD;
1464         }
1465 }
1466
1467 #endif /* CONFIG_COMPAT */
1468
1469 static void __exit video1394_exit_module (void)
1470 {
1471         hpsb_unregister_protocol(&video1394_driver);
1472
1473         hpsb_unregister_highlevel(&video1394_highlevel);
1474
1475         devfs_remove(VIDEO1394_DRIVER_NAME);
1476         cdev_del(&video1394_cdev);
1477
1478         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1479 }
1480
1481 static int __init video1394_init_module (void)
1482 {
1483         int ret;
1484
1485         cdev_init(&video1394_cdev, &video1394_fops);
1486         video1394_cdev.owner = THIS_MODULE;
1487         kobject_set_name(&video1394_cdev.kobj, VIDEO1394_DRIVER_NAME);
1488         ret = cdev_add(&video1394_cdev, IEEE1394_VIDEO1394_DEV, 16);
1489         if (ret) {
1490                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1491                 return ret;
1492         }
1493
1494         devfs_mk_dir(VIDEO1394_DRIVER_NAME);
1495
1496         hpsb_register_highlevel(&video1394_highlevel);
1497
1498         ret = hpsb_register_protocol(&video1394_driver);
1499         if (ret) {
1500                 PRINT_G(KERN_ERR, "video1394: failed to register protocol");
1501                 hpsb_unregister_highlevel(&video1394_highlevel);
1502                 devfs_remove(VIDEO1394_DRIVER_NAME);
1503                 cdev_del(&video1394_cdev);
1504                 return ret;
1505         }
1506
1507         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1508         return 0;
1509 }
1510
1511
1512 module_init(video1394_init_module);
1513 module_exit(video1394_exit_module);
1514 MODULE_ALIAS_CHARDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_VIDEO1394 * 16);