2 * IBM eServer eHCA Infiniband device driver for Linux on POWER
6 * Authors: Joachim Fenkes <fenkes@de.ibm.com>
7 * Stefan Roscher <stefan.roscher@de.ibm.com>
8 * Waleri Fomin <fomin@de.ibm.com>
9 * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
10 * Reinhard Ernst <rernst@de.ibm.com>
11 * Heiko J Schick <schickhj@de.ibm.com>
13 * Copyright (c) 2005 IBM Corporation
15 * All rights reserved.
17 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
22 * Redistribution and use in source and binary forms, with or without
23 * modification, are permitted provided that the following conditions are met:
25 * Redistributions of source code must retain the above copyright notice, this
26 * list of conditions and the following disclaimer.
28 * Redistributions in binary form must reproduce the above copyright notice,
29 * this list of conditions and the following disclaimer in the documentation
30 * and/or other materials
31 * provided with the distribution.
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
34 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
37 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
40 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
41 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 * POSSIBILITY OF SUCH DAMAGE.
47 #include <asm/current.h>
49 #include "ehca_classes.h"
50 #include "ehca_tools.h"
52 #include "ehca_iverbs.h"
56 static struct kmem_cache *qp_cache;
59 * attributes not supported by query qp
61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
62 IB_QP_MAX_QP_RD_ATOMIC | \
63 IB_QP_ACCESS_FLAGS | \
64 IB_QP_EN_SQD_ASYNC_NOTIFY)
67 * ehca (internal) qp state values
80 * qp state transitions as defined by IB Arch Rel 1.1 page 431
82 enum ib_qp_statetrans {
94 IB_QPST_MAX /* nr of transitions, this must be last!!! */
98 * ib2ehca_qp_state maps IB to ehca qp_state
99 * returns ehca qp state corresponding to given ib qp state
101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
103 switch (ib_qp_state) {
105 return EHCA_QPS_RESET;
107 return EHCA_QPS_INIT;
119 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
125 * ehca2ib_qp_state maps ehca to IB qp_state
126 * returns ib qp state corresponding to given ehca qp state
128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
131 switch (ehca_qp_state) {
147 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
153 * ehca_qp_type used as index for req_attr and opt_attr of
154 * struct ehca_modqp_statetrans
165 * ib2ehcaqptype maps Ib to ehca qp_type
166 * returns ehca qp type corresponding to ib qp type
168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
181 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
190 switch (ib_tostate) {
192 index = IB_QPST_ANY2RESET;
195 switch (ib_fromstate) {
197 index = IB_QPST_RESET2INIT;
200 index = IB_QPST_INIT2INIT;
205 if (ib_fromstate == IB_QPS_INIT)
206 index = IB_QPST_INIT2RTR;
209 switch (ib_fromstate) {
211 index = IB_QPST_RTR2RTS;
214 index = IB_QPST_RTS2RTS;
217 index = IB_QPST_SQD2RTS;
220 index = IB_QPST_SQE2RTS;
225 if (ib_fromstate == IB_QPS_RTS)
226 index = IB_QPST_RTS2SQD;
231 index = IB_QPST_ANY2ERR;
240 * ibqptype2servicetype returns hcp service type corresponding to given
241 * ib qp type used by create_qp()
243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
255 case IB_QPT_RAW_IPV6:
260 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
266 * init userspace queue info from ipz_queue data
268 static inline void queue2resp(struct ipzu_queue_resp *resp,
269 struct ipz_queue *queue)
271 resp->qe_size = queue->qe_size;
272 resp->act_nr_of_sg = queue->act_nr_of_sg;
273 resp->queue_length = queue->queue_length;
274 resp->pagesize = queue->pagesize;
275 resp->toggle_state = queue->toggle_state;
276 resp->offset = queue->offset;
280 * init_qp_queue initializes/constructs r/squeue and registers queue pages.
282 static inline int init_qp_queue(struct ehca_shca *shca,
284 struct ehca_qp *my_qp,
285 struct ipz_queue *queue,
288 struct ehca_alloc_queue_parms *parms,
291 int ret, cnt, ipz_rc, nr_q_pages;
294 struct ib_device *ib_dev = &shca->ib_device;
295 struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
297 if (!parms->queue_size)
300 if (parms->is_small) {
302 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
303 128 << parms->page_size,
304 wqe_size, parms->act_nr_sges, 1);
306 nr_q_pages = parms->queue_size;
307 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
308 EHCA_PAGESIZE, wqe_size,
309 parms->act_nr_sges, 0);
313 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%i",
318 /* register queue pages */
319 for (cnt = 0; cnt < nr_q_pages; cnt++) {
320 vpage = ipz_qpageit_get_inc(queue);
322 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
323 "failed p_vpage= %p", vpage);
327 rpage = virt_to_abs(vpage);
329 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
330 my_qp->ipz_qp_handle,
332 rpage, parms->is_small ? 0 : 1,
333 my_qp->galpas.kernel);
334 if (cnt == (nr_q_pages - 1)) { /* last page! */
335 if (h_ret != expected_hret) {
336 ehca_err(ib_dev, "hipz_qp_register_rpage() "
338 ret = ehca2ib_return_code(h_ret);
341 vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
343 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
344 "should not succeed vpage=%p", vpage);
349 if (h_ret != H_PAGE_REGISTERED) {
350 ehca_err(ib_dev, "hipz_qp_register_rpage() "
352 ret = ehca2ib_return_code(h_ret);
358 ipz_qeit_reset(queue);
363 ipz_queue_dtor(pd, queue);
367 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
370 return 128 << act_nr_sge;
372 return offsetof(struct ehca_wqe,
373 u.nud.sg_list[act_nr_sge]);
376 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
377 int req_nr_sge, int is_llqp)
379 u32 wqe_size, q_size;
380 int act_nr_sge = req_nr_sge;
383 /* round up #SGEs so WQE size is a power of 2 */
384 for (act_nr_sge = 4; act_nr_sge <= 252;
385 act_nr_sge = 4 + 2 * act_nr_sge)
386 if (act_nr_sge >= req_nr_sge)
389 wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
390 q_size = wqe_size * (queue->max_wr + 1);
393 queue->page_size = 2;
394 else if (q_size <= 1024)
395 queue->page_size = 3;
397 queue->page_size = 0;
399 queue->is_small = (queue->page_size != 0);
403 * Create an ib_qp struct that is either a QP or an SRQ, depending on
404 * the value of the is_srq parameter. If init_attr and srq_init_attr share
405 * fields, the field out of init_attr is used.
407 static struct ehca_qp *internal_create_qp(
409 struct ib_qp_init_attr *init_attr,
410 struct ib_srq_init_attr *srq_init_attr,
411 struct ib_udata *udata, int is_srq)
413 struct ehca_qp *my_qp;
414 struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
415 struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
417 struct ib_ucontext *context = NULL;
419 int is_llqp = 0, has_srq = 0;
420 int qp_type, max_send_sge, max_recv_sge, ret;
422 /* h_call's out parameters */
423 struct ehca_alloc_qp_parms parms;
424 u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
427 memset(&parms, 0, sizeof(parms));
428 qp_type = init_attr->qp_type;
430 if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
431 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
432 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
433 init_attr->sq_sig_type);
434 return ERR_PTR(-EINVAL);
438 if (qp_type & 0x80) {
440 parms.ext_type = EQPT_LLQP;
441 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
444 init_attr->qp_type &= 0x1F;
446 /* handle SRQ base QPs */
447 if (init_attr->srq) {
448 struct ehca_qp *my_srq =
449 container_of(init_attr->srq, struct ehca_qp, ib_srq);
452 parms.ext_type = EQPT_SRQBASE;
453 parms.srq_qpn = my_srq->real_qp_num;
456 if (is_llqp && has_srq) {
457 ehca_err(pd->device, "LLQPs can't have an SRQ");
458 return ERR_PTR(-EINVAL);
463 parms.ext_type = EQPT_SRQ;
464 parms.srq_limit = srq_init_attr->attr.srq_limit;
465 if (init_attr->cap.max_recv_sge > 3) {
466 ehca_err(pd->device, "no more than three SGEs "
467 "supported for SRQ pd=%p max_sge=%x",
468 pd, init_attr->cap.max_recv_sge);
469 return ERR_PTR(-EINVAL);
474 if (qp_type != IB_QPT_UD &&
475 qp_type != IB_QPT_UC &&
476 qp_type != IB_QPT_RC &&
477 qp_type != IB_QPT_SMI &&
478 qp_type != IB_QPT_GSI) {
479 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
480 return ERR_PTR(-EINVAL);
486 if ((init_attr->cap.max_send_wr > 255) ||
487 (init_attr->cap.max_recv_wr > 255)) {
489 "Invalid Number of max_sq_wr=%x "
490 "or max_rq_wr=%x for RC LLQP",
491 init_attr->cap.max_send_wr,
492 init_attr->cap.max_recv_wr);
493 return ERR_PTR(-EINVAL);
497 if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
498 ehca_err(pd->device, "UD LLQP not supported "
500 return ERR_PTR(-ENOSYS);
502 if (!(init_attr->cap.max_send_sge <= 5
503 && init_attr->cap.max_send_sge >= 1
504 && init_attr->cap.max_recv_sge <= 5
505 && init_attr->cap.max_recv_sge >= 1)) {
507 "Invalid Number of max_send_sge=%x "
508 "or max_recv_sge=%x for UD LLQP",
509 init_attr->cap.max_send_sge,
510 init_attr->cap.max_recv_sge);
511 return ERR_PTR(-EINVAL);
512 } else if (init_attr->cap.max_send_wr > 255) {
515 "max_send_wr=%x for UD QP_TYPE=%x",
516 init_attr->cap.max_send_wr, qp_type);
517 return ERR_PTR(-EINVAL);
521 ehca_err(pd->device, "unsupported LL QP Type=%x",
523 return ERR_PTR(-EINVAL);
527 int max_sge = (qp_type == IB_QPT_UD || qp_type == IB_QPT_SMI
528 || qp_type == IB_QPT_GSI) ? 250 : 252;
530 if (init_attr->cap.max_send_sge > max_sge
531 || init_attr->cap.max_recv_sge > max_sge) {
532 ehca_err(pd->device, "Invalid number of SGEs requested "
533 "send_sge=%x recv_sge=%x max_sge=%x",
534 init_attr->cap.max_send_sge,
535 init_attr->cap.max_recv_sge, max_sge);
536 return ERR_PTR(-EINVAL);
540 if (pd->uobject && udata)
541 context = pd->uobject->context;
543 my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
545 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
546 return ERR_PTR(-ENOMEM);
549 spin_lock_init(&my_qp->spinlock_s);
550 spin_lock_init(&my_qp->spinlock_r);
551 my_qp->qp_type = qp_type;
552 my_qp->ext_type = parms.ext_type;
554 if (init_attr->recv_cq)
556 container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
557 if (init_attr->send_cq)
559 container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
562 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
564 ehca_err(pd->device, "Can't reserve idr resources.");
565 goto create_qp_exit0;
568 write_lock_irqsave(&ehca_qp_idr_lock, flags);
569 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
570 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
571 } while (ret == -EAGAIN);
575 ehca_err(pd->device, "Can't allocate new idr entry.");
576 goto create_qp_exit0;
579 if (my_qp->token > 0x1FFFFFF) {
581 ehca_err(pd->device, "Invalid number of qp");
582 goto create_qp_exit1;
586 parms.srq_token = my_qp->token;
588 parms.servicetype = ibqptype2servicetype(qp_type);
589 if (parms.servicetype < 0) {
591 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
592 goto create_qp_exit1;
595 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
596 parms.sigtype = HCALL_SIGT_EVERY;
598 parms.sigtype = HCALL_SIGT_BY_WQE;
600 /* UD_AV CIRCUMVENTION */
601 max_send_sge = init_attr->cap.max_send_sge;
602 max_recv_sge = init_attr->cap.max_recv_sge;
603 if (parms.servicetype == ST_UD && !is_llqp) {
608 parms.token = my_qp->token;
609 parms.eq_handle = shca->eq.ipz_eq_handle;
610 parms.pd = my_pd->fw_pd;
612 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
614 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
616 parms.squeue.max_wr = init_attr->cap.max_send_wr;
617 parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
618 parms.squeue.max_sge = max_send_sge;
619 parms.rqueue.max_sge = max_recv_sge;
621 if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)) {
623 ehca_determine_small_queue(
624 &parms.squeue, max_send_sge, is_llqp);
626 ehca_determine_small_queue(
627 &parms.rqueue, max_recv_sge, is_llqp);
629 (parms.squeue.is_small || parms.rqueue.is_small);
632 h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
633 if (h_ret != H_SUCCESS) {
634 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%li",
636 ret = ehca2ib_return_code(h_ret);
637 goto create_qp_exit1;
640 ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
641 my_qp->ipz_qp_handle = parms.qp_handle;
642 my_qp->galpas = parms.galpas;
644 swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
645 rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
650 parms.squeue.act_nr_sges = 1;
651 parms.rqueue.act_nr_sges = 1;
657 /* UD circumvention */
659 parms.squeue.act_nr_sges = 1;
660 parms.rqueue.act_nr_sges = 1;
662 parms.squeue.act_nr_sges -= 2;
663 parms.rqueue.act_nr_sges -= 2;
666 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
667 parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
668 parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
669 parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
670 parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
671 ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
680 /* initialize r/squeue and register queue pages */
683 shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
684 HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
685 &parms.squeue, swqe_size);
687 ehca_err(pd->device, "Couldn't initialize squeue "
688 "and pages ret=%i", ret);
689 goto create_qp_exit2;
695 shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
696 H_SUCCESS, &parms.rqueue, rwqe_size);
698 ehca_err(pd->device, "Couldn't initialize rqueue "
699 "and pages ret=%i", ret);
700 goto create_qp_exit3;
705 my_qp->ib_srq.pd = &my_pd->ib_pd;
706 my_qp->ib_srq.device = my_pd->ib_pd.device;
708 my_qp->ib_srq.srq_context = init_attr->qp_context;
709 my_qp->ib_srq.event_handler = init_attr->event_handler;
711 my_qp->ib_qp.qp_num = ib_qp_num;
712 my_qp->ib_qp.pd = &my_pd->ib_pd;
713 my_qp->ib_qp.device = my_pd->ib_pd.device;
715 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
716 my_qp->ib_qp.send_cq = init_attr->send_cq;
718 my_qp->ib_qp.qp_type = qp_type;
719 my_qp->ib_qp.srq = init_attr->srq;
721 my_qp->ib_qp.qp_context = init_attr->qp_context;
722 my_qp->ib_qp.event_handler = init_attr->event_handler;
725 init_attr->cap.max_inline_data = 0; /* not supported yet */
726 init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
727 init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
728 init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
729 init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
730 my_qp->init_attr = *init_attr;
732 /* NOTE: define_apq0() not supported yet */
733 if (qp_type == IB_QPT_GSI) {
734 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
735 if (h_ret != H_SUCCESS) {
736 ret = ehca2ib_return_code(h_ret);
737 goto create_qp_exit4;
741 if (my_qp->send_cq) {
742 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
745 "Couldn't assign qp to send_cq ret=%i", ret);
746 goto create_qp_exit4;
750 /* copy queues, galpa data to user space */
751 if (context && udata) {
752 struct ehca_create_qp_resp resp;
753 memset(&resp, 0, sizeof(resp));
755 resp.qp_num = my_qp->real_qp_num;
756 resp.token = my_qp->token;
757 resp.qp_type = my_qp->qp_type;
758 resp.ext_type = my_qp->ext_type;
759 resp.qkey = my_qp->qkey;
760 resp.real_qp_num = my_qp->real_qp_num;
763 queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
765 queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
766 resp.fw_handle_ofs = (u32)
767 (my_qp->galpas.user.fw_handle & (PAGE_SIZE - 1));
769 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
770 ehca_err(pd->device, "Copy to udata failed");
772 goto create_qp_exit5;
779 ehca_cq_unassign_qp(my_qp->send_cq, my_qp->real_qp_num);
783 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
787 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
790 hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
793 write_lock_irqsave(&ehca_qp_idr_lock, flags);
794 idr_remove(&ehca_qp_idr, my_qp->token);
795 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
798 kmem_cache_free(qp_cache, my_qp);
802 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
803 struct ib_qp_init_attr *qp_init_attr,
804 struct ib_udata *udata)
808 ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
809 return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
812 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
813 struct ib_uobject *uobject);
815 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
816 struct ib_srq_init_attr *srq_init_attr,
817 struct ib_udata *udata)
819 struct ib_qp_init_attr qp_init_attr;
820 struct ehca_qp *my_qp;
822 struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
824 struct hcp_modify_qp_control_block *mqpcb;
825 u64 hret, update_mask;
827 /* For common attributes, internal_create_qp() takes its info
828 * out of qp_init_attr, so copy all common attrs there.
830 memset(&qp_init_attr, 0, sizeof(qp_init_attr));
831 qp_init_attr.event_handler = srq_init_attr->event_handler;
832 qp_init_attr.qp_context = srq_init_attr->srq_context;
833 qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
834 qp_init_attr.qp_type = IB_QPT_RC;
835 qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
836 qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
838 my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
840 return (struct ib_srq *)my_qp;
842 /* copy back return values */
843 srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
844 srq_init_attr->attr.max_sge = 3;
846 /* drive SRQ into RTR state */
847 mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
849 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
850 "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
851 ret = ERR_PTR(-ENOMEM);
855 mqpcb->qp_state = EHCA_QPS_INIT;
856 mqpcb->prim_phys_port = 1;
857 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
858 hret = hipz_h_modify_qp(shca->ipz_hca_handle,
859 my_qp->ipz_qp_handle,
862 mqpcb, my_qp->galpas.kernel);
863 if (hret != H_SUCCESS) {
864 ehca_err(pd->device, "Could not modify SRQ to INIT "
865 "ehca_qp=%p qp_num=%x h_ret=%li",
866 my_qp, my_qp->real_qp_num, hret);
870 mqpcb->qp_enable = 1;
871 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
872 hret = hipz_h_modify_qp(shca->ipz_hca_handle,
873 my_qp->ipz_qp_handle,
876 mqpcb, my_qp->galpas.kernel);
877 if (hret != H_SUCCESS) {
878 ehca_err(pd->device, "Could not enable SRQ "
879 "ehca_qp=%p qp_num=%x h_ret=%li",
880 my_qp, my_qp->real_qp_num, hret);
884 mqpcb->qp_state = EHCA_QPS_RTR;
885 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
886 hret = hipz_h_modify_qp(shca->ipz_hca_handle,
887 my_qp->ipz_qp_handle,
890 mqpcb, my_qp->galpas.kernel);
891 if (hret != H_SUCCESS) {
892 ehca_err(pd->device, "Could not modify SRQ to RTR "
893 "ehca_qp=%p qp_num=%x h_ret=%li",
894 my_qp, my_qp->real_qp_num, hret);
898 ehca_free_fw_ctrlblock(mqpcb);
900 return &my_qp->ib_srq;
903 ret = ERR_PTR(ehca2ib_return_code(hret));
904 ehca_free_fw_ctrlblock(mqpcb);
907 internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
913 * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
914 * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
915 * returns total number of bad wqes in bad_wqe_cnt
917 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
921 struct ipz_queue *squeue;
922 void *bad_send_wqe_p, *bad_send_wqe_v;
924 struct ehca_wqe *wqe;
925 int qp_num = my_qp->ib_qp.qp_num;
927 /* get send wqe pointer */
928 h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
929 my_qp->ipz_qp_handle, &my_qp->pf,
930 &bad_send_wqe_p, NULL, 2);
931 if (h_ret != H_SUCCESS) {
932 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
933 " ehca_qp=%p qp_num=%x h_ret=%li",
934 my_qp, qp_num, h_ret);
935 return ehca2ib_return_code(h_ret);
937 bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
938 ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
939 qp_num, bad_send_wqe_p);
940 /* convert wqe pointer to vadr */
941 bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
942 if (ehca_debug_level)
943 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
944 squeue = &my_qp->ipz_squeue;
945 if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
946 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
947 " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
951 /* loop sets wqe's purge bit */
952 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
954 while (wqe->optype != 0xff && wqe->wqef != 0xff) {
955 if (ehca_debug_level)
956 ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
957 wqe->nr_of_data_seg = 0; /* suppress data access */
958 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
959 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
960 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
961 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
964 * bad wqe will be reprocessed and ignored when pol_cq() is called,
965 * i.e. nr of wqes with flush error status is one less
967 ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
968 qp_num, (*bad_wqe_cnt)-1);
975 * internal_modify_qp with circumvention to handle aqp0 properly
976 * smi_reset2init indicates if this is an internal reset-to-init-call for
977 * smi. This flag must always be zero if called from ehca_modify_qp()!
978 * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
980 static int internal_modify_qp(struct ib_qp *ibqp,
981 struct ib_qp_attr *attr,
982 int attr_mask, int smi_reset2init)
984 enum ib_qp_state qp_cur_state, qp_new_state;
985 int cnt, qp_attr_idx, ret = 0;
986 enum ib_qp_statetrans statetrans;
987 struct hcp_modify_qp_control_block *mqpcb;
988 struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
989 struct ehca_shca *shca =
990 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
994 int squeue_locked = 0;
995 unsigned long flags = 0;
997 /* do query_qp to obtain current attr values */
998 mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1000 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
1001 "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
1005 h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
1006 my_qp->ipz_qp_handle,
1008 mqpcb, my_qp->galpas.kernel);
1009 if (h_ret != H_SUCCESS) {
1010 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
1011 "ehca_qp=%p qp_num=%x h_ret=%li",
1012 my_qp, ibqp->qp_num, h_ret);
1013 ret = ehca2ib_return_code(h_ret);
1014 goto modify_qp_exit1;
1017 qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
1019 if (qp_cur_state == -EINVAL) { /* invalid qp state */
1021 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
1022 "ehca_qp=%p qp_num=%x",
1023 mqpcb->qp_state, my_qp, ibqp->qp_num);
1024 goto modify_qp_exit1;
1027 * circumvention to set aqp0 initial state to init
1028 * as expected by IB spec
1030 if (smi_reset2init == 0 &&
1031 ibqp->qp_type == IB_QPT_SMI &&
1032 qp_cur_state == IB_QPS_RESET &&
1033 (attr_mask & IB_QP_STATE) &&
1034 attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1035 struct ib_qp_attr smiqp_attr = {
1036 .qp_state = IB_QPS_INIT,
1037 .port_num = my_qp->init_attr.port_num,
1041 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1042 IB_QP_PKEY_INDEX | IB_QP_QKEY;
1043 int smirc = internal_modify_qp(
1044 ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1046 ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1047 "ehca_modify_qp() rc=%i", smirc);
1049 goto modify_qp_exit1;
1051 qp_cur_state = IB_QPS_INIT;
1052 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1054 /* is transmitted current state equal to "real" current state */
1055 if ((attr_mask & IB_QP_CUR_STATE) &&
1056 qp_cur_state != attr->cur_qp_state) {
1058 ehca_err(ibqp->device,
1059 "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1060 " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1061 attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1062 goto modify_qp_exit1;
1065 ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1066 "new qp_state=%x attribute_mask=%x",
1067 my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1069 qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1070 if (!smi_reset2init &&
1071 !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1074 ehca_err(ibqp->device,
1075 "Invalid qp transition new_state=%x cur_state=%x "
1076 "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1077 qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1078 goto modify_qp_exit1;
1081 mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1082 if (mqpcb->qp_state)
1083 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1086 ehca_err(ibqp->device, "Invalid new qp state=%x "
1087 "ehca_qp=%p qp_num=%x",
1088 qp_new_state, my_qp, ibqp->qp_num);
1089 goto modify_qp_exit1;
1092 /* retrieve state transition struct to get req and opt attrs */
1093 statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1094 if (statetrans < 0) {
1096 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1097 "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1098 "qp_num=%x", qp_cur_state, qp_new_state,
1099 statetrans, my_qp, ibqp->qp_num);
1100 goto modify_qp_exit1;
1103 qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1105 if (qp_attr_idx < 0) {
1107 ehca_err(ibqp->device,
1108 "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1109 ibqp->qp_type, my_qp, ibqp->qp_num);
1110 goto modify_qp_exit1;
1113 ehca_dbg(ibqp->device,
1114 "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1115 my_qp, ibqp->qp_num, statetrans);
1117 /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1120 if ((my_qp->qp_type == IB_QPT_UD) &&
1121 (my_qp->ext_type != EQPT_LLQP) &&
1122 (statetrans == IB_QPST_INIT2RTR) &&
1123 (shca->hw_level >= 0x22)) {
1124 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1125 mqpcb->send_grh_flag = 1;
1128 /* sqe -> rts: set purge bit of bad wqe before actual trans */
1129 if ((my_qp->qp_type == IB_QPT_UD ||
1130 my_qp->qp_type == IB_QPT_GSI ||
1131 my_qp->qp_type == IB_QPT_SMI) &&
1132 statetrans == IB_QPST_SQE2RTS) {
1133 /* mark next free wqe if kernel */
1134 if (!ibqp->uobject) {
1135 struct ehca_wqe *wqe;
1136 /* lock send queue */
1137 spin_lock_irqsave(&my_qp->spinlock_s, flags);
1139 /* mark next free wqe */
1140 wqe = (struct ehca_wqe *)
1141 ipz_qeit_get(&my_qp->ipz_squeue);
1142 wqe->optype = wqe->wqef = 0xff;
1143 ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1146 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1148 ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1149 "ehca_qp=%p qp_num=%x ret=%i",
1150 my_qp, ibqp->qp_num, ret);
1151 goto modify_qp_exit2;
1156 * enable RDMA_Atomic_Control if reset->init und reliable con
1157 * this is necessary since gen2 does not provide that flag,
1158 * but pHyp requires it
1160 if (statetrans == IB_QPST_RESET2INIT &&
1161 (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1162 mqpcb->rdma_atomic_ctrl = 3;
1163 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1165 /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1166 if (statetrans == IB_QPST_INIT2RTR &&
1167 (ibqp->qp_type == IB_QPT_UC) &&
1168 !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1169 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1171 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1174 if (attr_mask & IB_QP_PKEY_INDEX) {
1175 if (attr->pkey_index >= 16) {
1177 ehca_err(ibqp->device, "Invalid pkey_index=%x. "
1178 "ehca_qp=%p qp_num=%x max_pkey_index=f",
1179 attr->pkey_index, my_qp, ibqp->qp_num);
1180 goto modify_qp_exit2;
1182 mqpcb->prim_p_key_idx = attr->pkey_index;
1183 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1185 if (attr_mask & IB_QP_PORT) {
1186 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1188 ehca_err(ibqp->device, "Invalid port=%x. "
1189 "ehca_qp=%p qp_num=%x num_ports=%x",
1190 attr->port_num, my_qp, ibqp->qp_num,
1192 goto modify_qp_exit2;
1194 mqpcb->prim_phys_port = attr->port_num;
1195 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1197 if (attr_mask & IB_QP_QKEY) {
1198 mqpcb->qkey = attr->qkey;
1199 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1201 if (attr_mask & IB_QP_AV) {
1202 mqpcb->dlid = attr->ah_attr.dlid;
1203 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1204 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1205 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1206 mqpcb->service_level = attr->ah_attr.sl;
1207 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1209 if (ehca_calc_ipd(shca, mqpcb->prim_phys_port,
1210 attr->ah_attr.static_rate,
1211 &mqpcb->max_static_rate)) {
1213 goto modify_qp_exit2;
1215 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1218 * Always supply the GRH flag, even if it's zero, to give the
1219 * hypervisor a clear "yes" or "no" instead of a "perhaps"
1221 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1224 * only if GRH is TRUE we might consider SOURCE_GID_IDX
1225 * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1227 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1228 mqpcb->send_grh_flag = 1;
1230 mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1232 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1234 for (cnt = 0; cnt < 16; cnt++)
1235 mqpcb->dest_gid.byte[cnt] =
1236 attr->ah_attr.grh.dgid.raw[cnt];
1238 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1239 mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1240 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1241 mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1242 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1243 mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1245 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1249 if (attr_mask & IB_QP_PATH_MTU) {
1250 mqpcb->path_mtu = attr->path_mtu;
1251 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1253 if (attr_mask & IB_QP_TIMEOUT) {
1254 mqpcb->timeout = attr->timeout;
1255 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1257 if (attr_mask & IB_QP_RETRY_CNT) {
1258 mqpcb->retry_count = attr->retry_cnt;
1259 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1261 if (attr_mask & IB_QP_RNR_RETRY) {
1262 mqpcb->rnr_retry_count = attr->rnr_retry;
1263 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1265 if (attr_mask & IB_QP_RQ_PSN) {
1266 mqpcb->receive_psn = attr->rq_psn;
1267 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1269 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1270 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1271 attr->max_dest_rd_atomic : 2;
1273 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1275 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1276 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1277 attr->max_rd_atomic : 2;
1280 (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1282 if (attr_mask & IB_QP_ALT_PATH) {
1283 if (attr->alt_port_num < 1
1284 || attr->alt_port_num > shca->num_ports) {
1286 ehca_err(ibqp->device, "Invalid alt_port=%x. "
1287 "ehca_qp=%p qp_num=%x num_ports=%x",
1288 attr->alt_port_num, my_qp, ibqp->qp_num,
1290 goto modify_qp_exit2;
1292 mqpcb->alt_phys_port = attr->alt_port_num;
1294 if (attr->alt_pkey_index >= 16) {
1296 ehca_err(ibqp->device, "Invalid alt_pkey_index=%x. "
1297 "ehca_qp=%p qp_num=%x max_pkey_index=f",
1298 attr->pkey_index, my_qp, ibqp->qp_num);
1299 goto modify_qp_exit2;
1301 mqpcb->alt_p_key_idx = attr->alt_pkey_index;
1303 mqpcb->timeout_al = attr->alt_timeout;
1304 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1305 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1306 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1308 if (ehca_calc_ipd(shca, mqpcb->alt_phys_port,
1309 attr->alt_ah_attr.static_rate,
1310 &mqpcb->max_static_rate_al)) {
1312 goto modify_qp_exit2;
1315 /* OpenIB doesn't support alternate retry counts - copy them */
1316 mqpcb->retry_count_al = mqpcb->retry_count;
1317 mqpcb->rnr_retry_count_al = mqpcb->rnr_retry_count;
1319 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_ALT_PHYS_PORT, 1)
1320 | EHCA_BMASK_SET(MQPCB_MASK_ALT_P_KEY_IDX, 1)
1321 | EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT_AL, 1)
1322 | EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1)
1323 | EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1)
1324 | EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1)
1325 | EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1)
1326 | EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT_AL, 1)
1327 | EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT_AL, 1);
1330 * Always supply the GRH flag, even if it's zero, to give the
1331 * hypervisor a clear "yes" or "no" instead of a "perhaps"
1333 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1336 * only if GRH is TRUE we might consider SOURCE_GID_IDX
1337 * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1339 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1340 mqpcb->send_grh_flag_al = 1;
1342 for (cnt = 0; cnt < 16; cnt++)
1343 mqpcb->dest_gid_al.byte[cnt] =
1344 attr->alt_ah_attr.grh.dgid.raw[cnt];
1345 mqpcb->source_gid_idx_al =
1346 attr->alt_ah_attr.grh.sgid_index;
1347 mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1348 mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1349 mqpcb->traffic_class_al =
1350 attr->alt_ah_attr.grh.traffic_class;
1353 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1)
1354 | EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1)
1355 | EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1)
1356 | EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1) |
1357 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1361 if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1362 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1364 EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1367 if (attr_mask & IB_QP_SQ_PSN) {
1368 mqpcb->send_psn = attr->sq_psn;
1369 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1372 if (attr_mask & IB_QP_DEST_QPN) {
1373 mqpcb->dest_qp_nr = attr->dest_qp_num;
1374 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1377 if (attr_mask & IB_QP_PATH_MIG_STATE) {
1378 if (attr->path_mig_state != IB_MIG_REARM
1379 && attr->path_mig_state != IB_MIG_MIGRATED) {
1381 ehca_err(ibqp->device, "Invalid mig_state=%x",
1382 attr->path_mig_state);
1383 goto modify_qp_exit2;
1385 mqpcb->path_migration_state = attr->path_mig_state + 1;
1387 EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1390 if (attr_mask & IB_QP_CAP) {
1391 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1393 EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1394 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1396 EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1397 /* no support for max_send/recv_sge yet */
1400 if (ehca_debug_level)
1401 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1403 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1404 my_qp->ipz_qp_handle,
1407 mqpcb, my_qp->galpas.kernel);
1409 if (h_ret != H_SUCCESS) {
1410 ret = ehca2ib_return_code(h_ret);
1411 ehca_err(ibqp->device, "hipz_h_modify_qp() failed h_ret=%li "
1412 "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1413 goto modify_qp_exit2;
1416 if ((my_qp->qp_type == IB_QPT_UD ||
1417 my_qp->qp_type == IB_QPT_GSI ||
1418 my_qp->qp_type == IB_QPT_SMI) &&
1419 statetrans == IB_QPST_SQE2RTS) {
1420 /* doorbell to reprocessing wqes */
1421 iosync(); /* serialize GAL register access */
1422 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1423 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1426 if (statetrans == IB_QPST_RESET2INIT ||
1427 statetrans == IB_QPST_INIT2INIT) {
1428 mqpcb->qp_enable = 1;
1429 mqpcb->qp_state = EHCA_QPS_INIT;
1431 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1433 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1434 my_qp->ipz_qp_handle,
1438 my_qp->galpas.kernel);
1440 if (h_ret != H_SUCCESS) {
1441 ret = ehca2ib_return_code(h_ret);
1442 ehca_err(ibqp->device, "ENABLE in context of "
1443 "RESET_2_INIT failed! Maybe you didn't get "
1444 "a LID h_ret=%li ehca_qp=%p qp_num=%x",
1445 h_ret, my_qp, ibqp->qp_num);
1446 goto modify_qp_exit2;
1450 if (statetrans == IB_QPST_ANY2RESET) {
1451 ipz_qeit_reset(&my_qp->ipz_rqueue);
1452 ipz_qeit_reset(&my_qp->ipz_squeue);
1455 if (attr_mask & IB_QP_QKEY)
1456 my_qp->qkey = attr->qkey;
1459 if (squeue_locked) { /* this means: sqe -> rts */
1460 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1461 my_qp->sqerr_purgeflag = 1;
1465 ehca_free_fw_ctrlblock(mqpcb);
1470 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1471 struct ib_udata *udata)
1473 struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1474 struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1476 u32 cur_pid = current->tgid;
1478 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1479 my_pd->ownpid != cur_pid) {
1480 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1481 cur_pid, my_pd->ownpid);
1485 return internal_modify_qp(ibqp, attr, attr_mask, 0);
1488 int ehca_query_qp(struct ib_qp *qp,
1489 struct ib_qp_attr *qp_attr,
1490 int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1492 struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1493 struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1495 struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1497 struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1498 struct hcp_modify_qp_control_block *qpcb;
1499 u32 cur_pid = current->tgid;
1503 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1504 my_pd->ownpid != cur_pid) {
1505 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1506 cur_pid, my_pd->ownpid);
1510 if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1511 ehca_err(qp->device, "Invalid attribute mask "
1512 "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1513 my_qp, qp->qp_num, qp_attr_mask);
1517 qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1519 ehca_err(qp->device, "Out of memory for qpcb "
1520 "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1524 h_ret = hipz_h_query_qp(adapter_handle,
1525 my_qp->ipz_qp_handle,
1527 qpcb, my_qp->galpas.kernel);
1529 if (h_ret != H_SUCCESS) {
1530 ret = ehca2ib_return_code(h_ret);
1531 ehca_err(qp->device, "hipz_h_query_qp() failed "
1532 "ehca_qp=%p qp_num=%x h_ret=%li",
1533 my_qp, qp->qp_num, h_ret);
1534 goto query_qp_exit1;
1537 qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1538 qp_attr->qp_state = qp_attr->cur_qp_state;
1540 if (qp_attr->cur_qp_state == -EINVAL) {
1542 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1543 "ehca_qp=%p qp_num=%x",
1544 qpcb->qp_state, my_qp, qp->qp_num);
1545 goto query_qp_exit1;
1548 if (qp_attr->qp_state == IB_QPS_SQD)
1549 qp_attr->sq_draining = 1;
1551 qp_attr->qkey = qpcb->qkey;
1552 qp_attr->path_mtu = qpcb->path_mtu;
1553 qp_attr->path_mig_state = qpcb->path_migration_state - 1;
1554 qp_attr->rq_psn = qpcb->receive_psn;
1555 qp_attr->sq_psn = qpcb->send_psn;
1556 qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1557 qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1558 qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1559 /* UD_AV CIRCUMVENTION */
1560 if (my_qp->qp_type == IB_QPT_UD) {
1561 qp_attr->cap.max_send_sge =
1562 qpcb->actual_nr_sges_in_sq_wqe - 2;
1563 qp_attr->cap.max_recv_sge =
1564 qpcb->actual_nr_sges_in_rq_wqe - 2;
1566 qp_attr->cap.max_send_sge =
1567 qpcb->actual_nr_sges_in_sq_wqe;
1568 qp_attr->cap.max_recv_sge =
1569 qpcb->actual_nr_sges_in_rq_wqe;
1572 qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1573 qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1575 qp_attr->pkey_index =
1576 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1579 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1581 qp_attr->timeout = qpcb->timeout;
1582 qp_attr->retry_cnt = qpcb->retry_count;
1583 qp_attr->rnr_retry = qpcb->rnr_retry_count;
1585 qp_attr->alt_pkey_index =
1586 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1588 qp_attr->alt_port_num = qpcb->alt_phys_port;
1589 qp_attr->alt_timeout = qpcb->timeout_al;
1591 qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1592 qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1595 qp_attr->ah_attr.sl = qpcb->service_level;
1597 if (qpcb->send_grh_flag) {
1598 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1601 qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1602 qp_attr->ah_attr.dlid = qpcb->dlid;
1603 qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1604 qp_attr->ah_attr.port_num = qp_attr->port_num;
1607 qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1608 qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1609 qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1610 qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1612 for (cnt = 0; cnt < 16; cnt++)
1613 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1614 qpcb->dest_gid.byte[cnt];
1617 qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1618 if (qpcb->send_grh_flag_al) {
1619 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1622 qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1623 qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1624 qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1627 qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1628 qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1629 qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1630 qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1632 for (cnt = 0; cnt < 16; cnt++)
1633 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1634 qpcb->dest_gid_al.byte[cnt];
1636 /* return init attributes given in ehca_create_qp */
1638 *qp_init_attr = my_qp->init_attr;
1640 if (ehca_debug_level)
1641 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1644 ehca_free_fw_ctrlblock(qpcb);
1649 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1650 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1652 struct ehca_qp *my_qp =
1653 container_of(ibsrq, struct ehca_qp, ib_srq);
1654 struct ehca_pd *my_pd =
1655 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1656 struct ehca_shca *shca =
1657 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1658 struct hcp_modify_qp_control_block *mqpcb;
1663 u32 cur_pid = current->tgid;
1664 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1665 my_pd->ownpid != cur_pid) {
1666 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1667 cur_pid, my_pd->ownpid);
1671 mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1673 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1674 "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1679 if (attr_mask & IB_SRQ_LIMIT) {
1680 attr_mask &= ~IB_SRQ_LIMIT;
1682 EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1683 | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1684 mqpcb->curr_srq_limit =
1685 EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1686 mqpcb->qp_aff_asyn_ev_log_reg =
1687 EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1690 /* by now, all bits in attr_mask should have been cleared */
1692 ehca_err(ibsrq->device, "invalid attribute mask bits set "
1693 "attr_mask=%x", attr_mask);
1695 goto modify_srq_exit0;
1698 if (ehca_debug_level)
1699 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1701 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1702 NULL, update_mask, mqpcb,
1703 my_qp->galpas.kernel);
1705 if (h_ret != H_SUCCESS) {
1706 ret = ehca2ib_return_code(h_ret);
1707 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed h_ret=%li "
1708 "ehca_qp=%p qp_num=%x",
1709 h_ret, my_qp, my_qp->real_qp_num);
1713 ehca_free_fw_ctrlblock(mqpcb);
1718 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1720 struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1721 struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1722 struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1724 struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1725 struct hcp_modify_qp_control_block *qpcb;
1726 u32 cur_pid = current->tgid;
1730 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1731 my_pd->ownpid != cur_pid) {
1732 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1733 cur_pid, my_pd->ownpid);
1737 qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1739 ehca_err(srq->device, "Out of memory for qpcb "
1740 "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1744 h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1745 NULL, qpcb, my_qp->galpas.kernel);
1747 if (h_ret != H_SUCCESS) {
1748 ret = ehca2ib_return_code(h_ret);
1749 ehca_err(srq->device, "hipz_h_query_qp() failed "
1750 "ehca_qp=%p qp_num=%x h_ret=%li",
1751 my_qp, my_qp->real_qp_num, h_ret);
1752 goto query_srq_exit1;
1755 srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1756 srq_attr->max_sge = 3;
1757 srq_attr->srq_limit = EHCA_BMASK_GET(
1758 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1760 if (ehca_debug_level)
1761 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1764 ehca_free_fw_ctrlblock(qpcb);
1769 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1770 struct ib_uobject *uobject)
1772 struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1773 struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1775 u32 cur_pid = current->tgid;
1776 u32 qp_num = my_qp->real_qp_num;
1780 enum ib_qp_type qp_type;
1781 unsigned long flags;
1784 if (my_qp->mm_count_galpa ||
1785 my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1786 ehca_err(dev, "Resources still referenced in "
1787 "user space qp_num=%x", qp_num);
1790 if (my_pd->ownpid != cur_pid) {
1791 ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1792 cur_pid, my_pd->ownpid);
1797 if (my_qp->send_cq) {
1798 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1800 ehca_err(dev, "Couldn't unassign qp from "
1801 "send_cq ret=%i qp_num=%x cq_num=%x", ret,
1802 qp_num, my_qp->send_cq->cq_number);
1807 write_lock_irqsave(&ehca_qp_idr_lock, flags);
1808 idr_remove(&ehca_qp_idr, my_qp->token);
1809 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1811 h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1812 if (h_ret != H_SUCCESS) {
1813 ehca_err(dev, "hipz_h_destroy_qp() failed h_ret=%li "
1814 "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1815 return ehca2ib_return_code(h_ret);
1818 port_num = my_qp->init_attr.port_num;
1819 qp_type = my_qp->init_attr.qp_type;
1821 /* no support for IB_QPT_SMI yet */
1822 if (qp_type == IB_QPT_GSI) {
1823 struct ib_event event;
1824 ehca_info(dev, "device %s: port %x is inactive.",
1825 shca->ib_device.name, port_num);
1826 event.device = &shca->ib_device;
1827 event.event = IB_EVENT_PORT_ERR;
1828 event.element.port_num = port_num;
1829 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1830 ib_dispatch_event(&event);
1834 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1836 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1837 kmem_cache_free(qp_cache, my_qp);
1841 int ehca_destroy_qp(struct ib_qp *qp)
1843 return internal_destroy_qp(qp->device,
1844 container_of(qp, struct ehca_qp, ib_qp),
1848 int ehca_destroy_srq(struct ib_srq *srq)
1850 return internal_destroy_qp(srq->device,
1851 container_of(srq, struct ehca_qp, ib_srq),
1855 int ehca_init_qp_cache(void)
1857 qp_cache = kmem_cache_create("ehca_cache_qp",
1858 sizeof(struct ehca_qp), 0,
1866 void ehca_cleanup_qp_cache(void)
1869 kmem_cache_destroy(qp_cache);