drivers/infiniband/hw/ipath/ipath_driver.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/spinlock.h>
  35 #include <linux/idr.h>
  36 #include <linux/pci.h>
  37 #include <linux/io.h>
  38 #include <linux/delay.h>
  39 #include <linux/netdevice.h>
  40 #include <linux/vmalloc.h>
  41
  42 #include "ipath_kernel.h"
  43 #include "ipath_verbs.h"
  44 #include "ipath_common.h"
  45
  46 static void ipath_update_pio_bufs(struct ipath_devdata *);
  47
  48 const char *ipath_get_unit_name(int unit)
  49 {
  50         static char iname[16];
  51         snprintf(iname, sizeof iname, "infinipath%u", unit);
  52         return iname;
  53 }
  54
  55 #define DRIVER_LOAD_MSG "QLogic " IPATH_DRV_NAME " loaded: "
  56 #define PFX IPATH_DRV_NAME ": "
  57
  58 /*
  59  * The size has to be longer than this string, so we can append
  60  * board/chip information to it in the init code.
  61  */
  62 const char ib_ipath_version[] = IPATH_IDSTR "\n";
  63
  64 static struct idr unit_table;
  65 DEFINE_SPINLOCK(ipath_devs_lock);
  66 LIST_HEAD(ipath_dev_list);
  67
  68 wait_queue_head_t ipath_state_wait;
  69
  70 unsigned ipath_debug = __IPATH_INFO;
  71
  72 module_param_named(debug, ipath_debug, uint, S_IWUSR | S_IRUGO);
  73 MODULE_PARM_DESC(debug, "mask for debug prints");
  74 EXPORT_SYMBOL_GPL(ipath_debug);
  75
  76 MODULE_LICENSE("GPL");
  77 MODULE_AUTHOR("QLogic <support@pathscale.com>");
  78 MODULE_DESCRIPTION("QLogic InfiniPath driver");
  79
  80 const char *ipath_ibcstatus_str[] = {
  81         "Disabled",
  82         "LinkUp",
  83         "PollActive",
  84         "PollQuiet",
  85         "SleepDelay",
  86         "SleepQuiet",
  87         "LState6",              /* unused */
  88         "LState7",              /* unused */
  89         "CfgDebounce",
  90         "CfgRcvfCfg",
  91         "CfgWaitRmt",
  92         "CfgIdle",
  93         "RecovRetrain",
  94         "LState0xD",            /* unused */
  95         "RecovWaitRmt",
  96         "RecovIdle",
  97 };
  98
  99 static void __devexit ipath_remove_one(struct pci_dev *);
 100 static int __devinit ipath_init_one(struct pci_dev *,
 101                                     const struct pci_device_id *);
 102
 103 /* Only needed for registration, nothing else needs this info */
 104 #define PCI_VENDOR_ID_PATHSCALE 0x1fc1
 105 #define PCI_DEVICE_ID_INFINIPATH_HT 0xd
 106 #define PCI_DEVICE_ID_INFINIPATH_PE800 0x10
 107
 108 /* Number of seconds before our card status check...  */
 109 #define STATUS_TIMEOUT 60
 110
 111 static const struct pci_device_id ipath_pci_tbl[] = {
 112         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_HT) },
 113         { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE, PCI_DEVICE_ID_INFINIPATH_PE800) },
 114         { 0, }
 115 };
 116
 117 MODULE_DEVICE_TABLE(pci, ipath_pci_tbl);
 118
 119 static struct pci_driver ipath_driver = {
 120         .name = IPATH_DRV_NAME,
 121         .probe = ipath_init_one,
 122         .remove = __devexit_p(ipath_remove_one),
 123         .id_table = ipath_pci_tbl,
 124         .driver = {
 125                 .groups = ipath_driver_attr_groups,
 126         },
 127 };
 128
 129 static void ipath_check_status(struct work_struct *work)
 130 {
 131         struct ipath_devdata *dd = container_of(work, struct ipath_devdata,
 132                                                 status_work.work);
 133
 134         /*
 135          * If we don't have any interrupts, let the user know and
 136          * don't bother checking again.
 137          */
 138         if (dd->ipath_int_counter == 0)
 139                 dev_err(&dd->pcidev->dev, "No interrupts detected.\n");
 140 }
 141
 142 static inline void read_bars(struct ipath_devdata *dd, struct pci_dev *dev,
 143                              u32 *bar0, u32 *bar1)
 144 {
 145         int ret;
 146
 147         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 148         if (ret)
 149                 ipath_dev_err(dd, "failed to read bar0 before enable: "
 150                               "error %d\n", -ret);
 151
 152         ret = pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, bar1);
 153         if (ret)
 154                 ipath_dev_err(dd, "failed to read bar1 before enable: "
 155                               "error %d\n", -ret);
 156
 157         ipath_dbg("Read bar0 %x bar1 %x\n", *bar0, *bar1);
 158 }
 159
 160 static void ipath_free_devdata(struct pci_dev *pdev,
 161                                struct ipath_devdata *dd)
 162 {
 163         unsigned long flags;
 164
 165         pci_set_drvdata(pdev, NULL);
 166
 167         if (dd->ipath_unit != -1) {
 168                 spin_lock_irqsave(&ipath_devs_lock, flags);
 169                 idr_remove(&unit_table, dd->ipath_unit);
 170                 list_del(&dd->ipath_list);
 171                 spin_unlock_irqrestore(&ipath_devs_lock, flags);
 172         }
 173         vfree(dd);
 174 }
 175
 176 static struct ipath_devdata *ipath_alloc_devdata(struct pci_dev *pdev)
 177 {
 178         unsigned long flags;
 179         struct ipath_devdata *dd;
 180         int ret;
 181
 182         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
 183                 dd = ERR_PTR(-ENOMEM);
 184                 goto bail;
 185         }
 186
 187         dd = vmalloc(sizeof(*dd));
 188         if (!dd) {
 189                 dd = ERR_PTR(-ENOMEM);
 190                 goto bail;
 191         }
 192         memset(dd, 0, sizeof(*dd));
 193         dd->ipath_unit = -1;
 194
 195         spin_lock_irqsave(&ipath_devs_lock, flags);
 196
 197         ret = idr_get_new(&unit_table, dd, &dd->ipath_unit);
 198         if (ret < 0) {
 199                 printk(KERN_ERR IPATH_DRV_NAME
 200                        ": Could not allocate unit ID: error %d\n", -ret);
 201                 ipath_free_devdata(pdev, dd);
 202                 dd = ERR_PTR(ret);
 203                 goto bail_unlock;
 204         }
 205
 206         dd->pcidev = pdev;
 207         pci_set_drvdata(pdev, dd);
 208
 209         INIT_DELAYED_WORK(&dd->status_work, ipath_check_status);
 210
 211         list_add(&dd->ipath_list, &ipath_dev_list);
 212
 213 bail_unlock:
 214         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 215
 216 bail:
 217         return dd;
 218 }
 219
 220 static inline struct ipath_devdata *__ipath_lookup(int unit)
 221 {
 222         return idr_find(&unit_table, unit);
 223 }
 224
 225 struct ipath_devdata *ipath_lookup(int unit)
 226 {
 227         struct ipath_devdata *dd;
 228         unsigned long flags;
 229
 230         spin_lock_irqsave(&ipath_devs_lock, flags);
 231         dd = __ipath_lookup(unit);
 232         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 233
 234         return dd;
 235 }
 236
 237 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp)
 238 {
 239         int nunits, npresent, nup;
 240         struct ipath_devdata *dd;
 241         unsigned long flags;
 242         u32 maxports;
 243
 244         nunits = npresent = nup = maxports = 0;
 245
 246         spin_lock_irqsave(&ipath_devs_lock, flags);
 247
 248         list_for_each_entry(dd, &ipath_dev_list, ipath_list) {
 249                 nunits++;
 250                 if ((dd->ipath_flags & IPATH_PRESENT) && dd->ipath_kregbase)
 251                         npresent++;
 252                 if (dd->ipath_lid &&
 253                     !(dd->ipath_flags & (IPATH_DISABLED | IPATH_LINKDOWN
 254                                          | IPATH_LINKUNK)))
 255                         nup++;
 256                 if (dd->ipath_cfgports > maxports)
 257                         maxports = dd->ipath_cfgports;
 258         }
 259
 260         spin_unlock_irqrestore(&ipath_devs_lock, flags);
 261
 262         if (npresentp)
 263                 *npresentp = npresent;
 264         if (nupp)
 265                 *nupp = nup;
 266         if (maxportsp)
 267                 *maxportsp = maxports;
 268
 269         return nunits;
 270 }
 271
 272 /*
 273  * These next two routines are placeholders in case we don't have per-arch
 274  * code for controlling write combining.  If explicit control of write
 275  * combining is not available, performance will probably be awful.
 276  */
 277
 278 int __attribute__((weak)) ipath_enable_wc(struct ipath_devdata *dd)
 279 {
 280         return -EOPNOTSUPP;
 281 }
 282
 283 void __attribute__((weak)) ipath_disable_wc(struct ipath_devdata *dd)
 284 {
 285 }
 286
 287 /*
 288  * Perform a PIO buffer bandwidth write test, to verify proper system
 289  * configuration.  Even when all the setup calls work, occasionally
 290  * BIOS or other issues can prevent write combining from working, or
 291  * can cause other bandwidth problems to the chip.
 292  *
 293  * This test simply writes the same buffer over and over again, and
 294  * measures close to the peak bandwidth to the chip (not testing
 295  * data bandwidth to the wire).   On chips that use an address-based
 296  * trigger to send packets to the wire, this is easy.  On chips that
 297  * use a count to trigger, we want to make sure that the packet doesn't
 298  * go out on the wire, or trigger flow control checks.
 299  */
 300 static void ipath_verify_pioperf(struct ipath_devdata *dd)
 301 {
 302         u32 pbnum, cnt, lcnt;
 303         u32 __iomem *piobuf;
 304         u32 *addr;
 305         u64 msecs, emsecs;
 306
 307         piobuf = ipath_getpiobuf(dd, &pbnum);
 308         if (!piobuf) {
 309                 dev_info(&dd->pcidev->dev,
 310                         "No PIObufs for checking perf, skipping\n");
 311                 return;
 312         }
 313
 314         /*
 315          * Enough to give us a reasonable test, less than piobuf size, and
 316          * likely multiple of store buffer length.
 317          */
 318         cnt = 1024;
 319
 320         addr = vmalloc(cnt);
 321         if (!addr) {
 322                 dev_info(&dd->pcidev->dev,
 323                         "Couldn't get memory for checking PIO perf,"
 324                         " skipping\n");
 325                 goto done;
 326         }
 327
 328         preempt_disable();  /* we want reasonably accurate elapsed time */
 329         msecs = 1 + jiffies_to_msecs(jiffies);
 330         for (lcnt = 0; lcnt < 10000U; lcnt++) {
 331                 /* wait until we cross msec boundary */
 332                 if (jiffies_to_msecs(jiffies) >= msecs)
 333                         break;
 334                 udelay(1);
 335         }
 336
 337         writeq(0, piobuf); /* length 0, no dwords actually sent */
 338         ipath_flush_wc();
 339
 340         /*
 341          * this is only roughly accurate, since even with preempt we
 342          * still take interrupts that could take a while.   Running for
 343          * >= 5 msec seems to get us "close enough" to accurate values
 344          */
 345         msecs = jiffies_to_msecs(jiffies);
 346         for (emsecs = lcnt = 0; emsecs <= 5UL; lcnt++) {
 347                 __iowrite32_copy(piobuf + 64, addr, cnt >> 2);
 348                 emsecs = jiffies_to_msecs(jiffies) - msecs;
 349         }
 350
 351         /* 1 GiB/sec, slightly over IB SDR line rate */
 352         if (lcnt < (emsecs * 1024U))
 353                 ipath_dev_err(dd,
 354                         "Performance problem: bandwidth to PIO buffers is "
 355                         "only %u MiB/sec\n",
 356                         lcnt / (u32) emsecs);
 357         else
 358                 ipath_dbg("PIO buffer bandwidth %u MiB/sec is OK\n",
 359                         lcnt / (u32) emsecs);
 360
 361         preempt_enable();
 362
 363         vfree(addr);
 364
 365 done:
 366         /* disarm piobuf, so it's available again */
 367         ipath_disarm_piobufs(dd, pbnum, 1);
 368 }
 369
 370 static int __devinit ipath_init_one(struct pci_dev *pdev,
 371                                     const struct pci_device_id *ent)
 372 {
 373         int ret, len, j;
 374         struct ipath_devdata *dd;
 375         unsigned long long addr;
 376         u32 bar0 = 0, bar1 = 0;
 377
 378         dd = ipath_alloc_devdata(pdev);
 379         if (IS_ERR(dd)) {
 380                 ret = PTR_ERR(dd);
 381                 printk(KERN_ERR IPATH_DRV_NAME
 382                        ": Could not allocate devdata: error %d\n", -ret);
 383                 goto bail;
 384         }
 385
 386         ipath_cdbg(VERBOSE, "initializing unit #%u\n", dd->ipath_unit);
 387
 388         ret = pci_enable_device(pdev);
 389         if (ret) {
 390                 /* This can happen iff:
 391                  *
 392                  * We did a chip reset, and then failed to reprogram the
 393                  * BAR, or the chip reset due to an internal error.  We then
 394                  * unloaded the driver and reloaded it.
 395                  *
 396                  * Both reset cases set the BAR back to initial state.  For
 397                  * the latter case, the AER sticky error bit at offset 0x718
 398                  * should be set, but the Linux kernel doesn't yet know
 399                  * about that, it appears.  If the original BAR was retained
 400                  * in the kernel data structures, this may be OK.
 401                  */
 402                 ipath_dev_err(dd, "enable unit %d failed: error %d\n",
 403                               dd->ipath_unit, -ret);
 404                 goto bail_devdata;
 405         }
 406         addr = pci_resource_start(pdev, 0);
 407         len = pci_resource_len(pdev, 0);
 408         ipath_cdbg(VERBOSE, "regbase (0) %llx len %d pdev->irq %d, vend %x/%x "
 409                    "driver_data %lx\n", addr, len, pdev->irq, ent->vendor,
 410                    ent->device, ent->driver_data);
 411
 412         read_bars(dd, pdev, &bar0, &bar1);
 413
 414         if (!bar1 && !(bar0 & ~0xf)) {
 415                 if (addr) {
 416                         dev_info(&pdev->dev, "BAR is 0 (probable RESET), "
 417                                  "rewriting as %llx\n", addr);
 418                         ret = pci_write_config_dword(
 419                                 pdev, PCI_BASE_ADDRESS_0, addr);
 420                         if (ret) {
 421                                 ipath_dev_err(dd, "rewrite of BAR0 "
 422                                               "failed: err %d\n", -ret);
 423                                 goto bail_disable;
 424                         }
 425                         ret = pci_write_config_dword(
 426                                 pdev, PCI_BASE_ADDRESS_1, addr >> 32);
 427                         if (ret) {
 428                                 ipath_dev_err(dd, "rewrite of BAR1 "
 429                                               "failed: err %d\n", -ret);
 430                                 goto bail_disable;
 431                         }
 432                 } else {
 433                         ipath_dev_err(dd, "BAR is 0 (probable RESET), "
 434                                       "not usable until reboot\n");
 435                         ret = -ENODEV;
 436                         goto bail_disable;
 437                 }
 438         }
 439
 440         ret = pci_request_regions(pdev, IPATH_DRV_NAME);
 441         if (ret) {
 442                 dev_info(&pdev->dev, "pci_request_regions unit %u fails: "
 443                          "err %d\n", dd->ipath_unit, -ret);
 444                 goto bail_disable;
 445         }
 446
 447         ret = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
 448         if (ret) {
 449                 /*
 450                  * if the 64 bit setup fails, try 32 bit.  Some systems
 451                  * do not setup 64 bit maps on systems with 2GB or less
 452                  * memory installed.
 453                  */
 454                 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
 455                 if (ret) {
 456                         dev_info(&pdev->dev,
 457                                 "Unable to set DMA mask for unit %u: %d\n",
 458                                 dd->ipath_unit, ret);
 459                         goto bail_regions;
 460                 }
 461                 else {
 462                         ipath_dbg("No 64bit DMA mask, used 32 bit mask\n");
 463                         ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
 464                         if (ret)
 465                                 dev_info(&pdev->dev,
 466                                         "Unable to set DMA consistent mask "
 467                                         "for unit %u: %d\n",
 468                                         dd->ipath_unit, ret);
 469
 470                 }
 471         }
 472         else {
 473                 ret = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
 474                 if (ret)
 475                         dev_info(&pdev->dev,
 476                                 "Unable to set DMA consistent mask "
 477                                 "for unit %u: %d\n",
 478                                 dd->ipath_unit, ret);
 479         }
 480
 481         pci_set_master(pdev);
 482
 483         /*
 484          * Save BARs to rewrite after device reset.  Save all 64 bits of
 485          * BAR, just in case.
 486          */
 487         dd->ipath_pcibar0 = addr;
 488         dd->ipath_pcibar1 = addr >> 32;
 489         dd->ipath_deviceid = ent->device;       /* save for later use */
 490         dd->ipath_vendorid = ent->vendor;
 491
 492         /* setup the chip-specific functions, as early as possible. */
 493         switch (ent->device) {
 494         case PCI_DEVICE_ID_INFINIPATH_HT:
 495 #ifdef CONFIG_HT_IRQ
 496                 ipath_init_iba6110_funcs(dd);
 497                 break;
 498 #else
 499                 ipath_dev_err(dd, "QLogic HT device 0x%x cannot work if "
 500                               "CONFIG_HT_IRQ is not enabled\n", ent->device);
 501                 return -ENODEV;
 502 #endif
 503         case PCI_DEVICE_ID_INFINIPATH_PE800:
 504 #ifdef CONFIG_PCI_MSI
 505                 ipath_init_iba6120_funcs(dd);
 506                 break;
 507 #else
 508                 ipath_dev_err(dd, "QLogic PCIE device 0x%x cannot work if "
 509                               "CONFIG_PCI_MSI is not enabled\n", ent->device);
 510                 return -ENODEV;
 511 #endif
 512         default:
 513                 ipath_dev_err(dd, "Found unknown QLogic deviceid 0x%x, "
 514                               "failing\n", ent->device);
 515                 return -ENODEV;
 516         }
 517
 518         for (j = 0; j < 6; j++) {
 519                 if (!pdev->resource[j].start)
 520                         continue;
 521                 ipath_cdbg(VERBOSE, "BAR %d start %llx, end %llx, len %llx\n",
 522                            j, (unsigned long long)pdev->resource[j].start,
 523                            (unsigned long long)pdev->resource[j].end,
 524                            (unsigned long long)pci_resource_len(pdev, j));
 525         }
 526
 527         if (!addr) {
 528                 ipath_dev_err(dd, "No valid address in BAR 0!\n");
 529                 ret = -ENODEV;
 530                 goto bail_regions;
 531         }
 532
 533         dd->ipath_pcirev = pdev->revision;
 534
 535 #if defined(__powerpc__)
 536         /* There isn't a generic way to specify writethrough mappings */
 537         dd->ipath_kregbase = __ioremap(addr, len,
 538                 (_PAGE_NO_CACHE|_PAGE_WRITETHRU));
 539 #else
 540         dd->ipath_kregbase = ioremap_nocache(addr, len);
 541 #endif
 542
 543         if (!dd->ipath_kregbase) {
 544                 ipath_dbg("Unable to map io addr %llx to kvirt, failing\n",
 545                           addr);
 546                 ret = -ENOMEM;
 547                 goto bail_iounmap;
 548         }
 549         dd->ipath_kregend = (u64 __iomem *)
 550                 ((void __iomem *)dd->ipath_kregbase + len);
 551         dd->ipath_physaddr = addr;      /* used for io_remap, etc. */
 552         /* for user mmap */
 553         ipath_cdbg(VERBOSE, "mapped io addr %llx to kregbase %p\n",
 554                    addr, dd->ipath_kregbase);
 555
 556         /*
 557          * clear ipath_flags here instead of in ipath_init_chip as it is set
 558          * by ipath_setup_htconfig.
 559          */
 560         dd->ipath_flags = 0;
 561         dd->ipath_lli_counter = 0;
 562         dd->ipath_lli_errors = 0;
 563
 564         if (dd->ipath_f_bus(dd, pdev))
 565                 ipath_dev_err(dd, "Failed to setup config space; "
 566                               "continuing anyway\n");
 567
 568         /*
 569          * set up our interrupt handler; IRQF_SHARED probably not needed,
 570          * since MSI interrupts shouldn't be shared but won't  hurt for now.
 571          * check 0 irq after we return from chip-specific bus setup, since
 572          * that can affect this due to setup
 573          */
 574         if (!dd->ipath_irq)
 575                 ipath_dev_err(dd, "irq is 0, BIOS error?  Interrupts won't "
 576                               "work\n");
 577         else {
 578                 ret = request_irq(dd->ipath_irq, ipath_intr, IRQF_SHARED,
 579                                   IPATH_DRV_NAME, dd);
 580                 if (ret) {
 581                         ipath_dev_err(dd, "Couldn't setup irq handler, "
 582                                       "irq=%d: %d\n", dd->ipath_irq, ret);
 583                         goto bail_iounmap;
 584                 }
 585         }
 586
 587         ret = ipath_init_chip(dd, 0);   /* do the chip-specific init */
 588         if (ret)
 589                 goto bail_irqsetup;
 590
 591         ret = ipath_enable_wc(dd);
 592
 593         if (ret) {
 594                 ipath_dev_err(dd, "Write combining not enabled "
 595                               "(err %d): performance may be poor\n",
 596                               -ret);
 597                 ret = 0;
 598         }
 599
 600         ipath_verify_pioperf(dd);
 601
 602         ipath_device_create_group(&pdev->dev, dd);
 603         ipathfs_add_device(dd);
 604         ipath_user_add(dd);
 605         ipath_diag_add(dd);
 606         ipath_register_ib_device(dd);
 607
 608         /* Check that card status in STATUS_TIMEOUT seconds. */
 609         schedule_delayed_work(&dd->status_work, HZ * STATUS_TIMEOUT);
 610
 611         goto bail;
 612
 613 bail_irqsetup:
 614         if (pdev->irq) free_irq(pdev->irq, dd);
 615
 616 bail_iounmap:
 617         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 618
 619 bail_regions:
 620         pci_release_regions(pdev);
 621
 622 bail_disable:
 623         pci_disable_device(pdev);
 624
 625 bail_devdata:
 626         ipath_free_devdata(pdev, dd);
 627
 628 bail:
 629         return ret;
 630 }
 631
 632 static void __devexit cleanup_device(struct ipath_devdata *dd)
 633 {
 634         int port;
 635
 636         if (*dd->ipath_statusp & IPATH_STATUS_CHIP_PRESENT) {
 637                 /* can't do anything more with chip; needs re-init */
 638                 *dd->ipath_statusp &= ~IPATH_STATUS_CHIP_PRESENT;
 639                 if (dd->ipath_kregbase) {
 640                         /*
 641                          * if we haven't already cleaned up before these are
 642                          * to ensure any register reads/writes "fail" until
 643                          * re-init
 644                          */
 645                         dd->ipath_kregbase = NULL;
 646                         dd->ipath_uregbase = 0;
 647                         dd->ipath_sregbase = 0;
 648                         dd->ipath_cregbase = 0;
 649                         dd->ipath_kregsize = 0;
 650                 }
 651                 ipath_disable_wc(dd);
 652         }
 653
 654         if (dd->ipath_pioavailregs_dma) {
 655                 dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
 656                                   (void *) dd->ipath_pioavailregs_dma,
 657                                   dd->ipath_pioavailregs_phys);
 658                 dd->ipath_pioavailregs_dma = NULL;
 659         }
 660         if (dd->ipath_dummy_hdrq) {
 661                 dma_free_coherent(&dd->pcidev->dev,
 662                         dd->ipath_pd[0]->port_rcvhdrq_size,
 663                         dd->ipath_dummy_hdrq, dd->ipath_dummy_hdrq_phys);
 664                 dd->ipath_dummy_hdrq = NULL;
 665         }
 666
 667         if (dd->ipath_pageshadow) {
 668                 struct page **tmpp = dd->ipath_pageshadow;
 669                 dma_addr_t *tmpd = dd->ipath_physshadow;
 670                 int i, cnt = 0;
 671
 672                 ipath_cdbg(VERBOSE, "Unlocking any expTID pages still "
 673                            "locked\n");
 674                 for (port = 0; port < dd->ipath_cfgports; port++) {
 675                         int port_tidbase = port * dd->ipath_rcvtidcnt;
 676                         int maxtid = port_tidbase + dd->ipath_rcvtidcnt;
 677                         for (i = port_tidbase; i < maxtid; i++) {
 678                                 if (!tmpp[i])
 679                                         continue;
 680                                 pci_unmap_page(dd->pcidev, tmpd[i],
 681                                         PAGE_SIZE, PCI_DMA_FROMDEVICE);
 682                                 ipath_release_user_pages(&tmpp[i], 1);
 683                                 tmpp[i] = NULL;
 684                                 cnt++;
 685                         }
 686                 }
 687                 if (cnt) {
 688                         ipath_stats.sps_pageunlocks += cnt;
 689                         ipath_cdbg(VERBOSE, "There were still %u expTID "
 690                                    "entries locked\n", cnt);
 691                 }
 692                 if (ipath_stats.sps_pagelocks ||
 693                     ipath_stats.sps_pageunlocks)
 694                         ipath_cdbg(VERBOSE, "%llu pages locked, %llu "
 695                                    "unlocked via ipath_m{un}lock\n",
 696                                    (unsigned long long)
 697                                    ipath_stats.sps_pagelocks,
 698                                    (unsigned long long)
 699                                    ipath_stats.sps_pageunlocks);
 700
 701                 ipath_cdbg(VERBOSE, "Free shadow page tid array at %p\n",
 702                            dd->ipath_pageshadow);
 703                 tmpp = dd->ipath_pageshadow;
 704                 dd->ipath_pageshadow = NULL;
 705                 vfree(tmpp);
 706         }
 707
 708         /*
 709          * free any resources still in use (usually just kernel ports)
 710          * at unload; we do for portcnt, not cfgports, because cfgports
 711          * could have changed while we were loaded.
 712          */
 713         for (port = 0; port < dd->ipath_portcnt; port++) {
 714                 struct ipath_portdata *pd = dd->ipath_pd[port];
 715                 dd->ipath_pd[port] = NULL;
 716                 ipath_free_pddata(dd, pd);
 717         }
 718         kfree(dd->ipath_pd);
 719         /*
 720          * debuggability, in case some cleanup path tries to use it
 721          * after this
 722          */
 723         dd->ipath_pd = NULL;
 724 }
 725
 726 static void __devexit ipath_remove_one(struct pci_dev *pdev)
 727 {
 728         struct ipath_devdata *dd = pci_get_drvdata(pdev);
 729
 730         ipath_cdbg(VERBOSE, "removing, pdev=%p, dd=%p\n", pdev, dd);
 731
 732         /*
 733          * disable the IB link early, to be sure no new packets arrive, which
 734          * complicates the shutdown process
 735          */
 736         ipath_shutdown_device(dd);
 737
 738         cancel_delayed_work(&dd->status_work);
 739         flush_scheduled_work();
 740
 741         if (dd->verbs_dev)
 742                 ipath_unregister_ib_device(dd->verbs_dev);
 743
 744         ipath_diag_remove(dd);
 745         ipath_user_remove(dd);
 746         ipathfs_remove_device(dd);
 747         ipath_device_remove_group(&pdev->dev, dd);
 748
 749         ipath_cdbg(VERBOSE, "Releasing pci memory regions, dd %p, "
 750                    "unit %u\n", dd, (u32) dd->ipath_unit);
 751
 752         cleanup_device(dd);
 753
 754         /*
 755          * turn off rcv, send, and interrupts for all ports, all drivers
 756          * should also hard reset the chip here?
 757          * free up port 0 (kernel) rcvhdr, egr bufs, and eventually tid bufs
 758          * for all versions of the driver, if they were allocated
 759          */
 760         if (dd->ipath_irq) {
 761                 ipath_cdbg(VERBOSE, "unit %u free irq %d\n",
 762                            dd->ipath_unit, dd->ipath_irq);
 763                 dd->ipath_f_free_irq(dd);
 764         } else
 765                 ipath_dbg("irq is 0, not doing free_irq "
 766                           "for unit %u\n", dd->ipath_unit);
 767         /*
 768          * we check for NULL here, because it's outside
 769          * the kregbase check, and we need to call it
 770          * after the free_irq.  Thus it's possible that
 771          * the function pointers were never initialized.
 772          */
 773         if (dd->ipath_f_cleanup)
 774                 /* clean up chip-specific stuff */
 775                 dd->ipath_f_cleanup(dd);
 776
 777         ipath_cdbg(VERBOSE, "Unmapping kregbase %p\n", dd->ipath_kregbase);
 778         iounmap((volatile void __iomem *) dd->ipath_kregbase);
 779         pci_release_regions(pdev);
 780         ipath_cdbg(VERBOSE, "calling pci_disable_device\n");
 781         pci_disable_device(pdev);
 782
 783         ipath_free_devdata(pdev, dd);
 784 }
 785
 786 /* general driver use */
 787 DEFINE_MUTEX(ipath_mutex);
 788
 789 static DEFINE_SPINLOCK(ipath_pioavail_lock);
 790
 791 /**
 792  * ipath_disarm_piobufs - cancel a range of PIO buffers
 793  * @dd: the infinipath device
 794  * @first: the first PIO buffer to cancel
 795  * @cnt: the number of PIO buffers to cancel
 796  *
 797  * cancel a range of PIO buffers, used when they might be armed, but
 798  * not triggered.  Used at init to ensure buffer state, and also user
 799  * process close, in case it died while writing to a PIO buffer
 800  * Also after errors.
 801  */
 802 void ipath_disarm_piobufs(struct ipath_devdata *dd, unsigned first,
 803                           unsigned cnt)
 804 {
 805         unsigned i, last = first + cnt;
 806         unsigned long flags;
 807
 808         ipath_cdbg(PKT, "disarm %u PIObufs first=%u\n", cnt, first);
 809         for (i = first; i < last; i++) {
 810                 spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 811                 /*
 812                  * The disarm-related bits are write-only, so it
 813                  * is ok to OR them in with our copy of sendctrl
 814                  * while we hold the lock.
 815                  */
 816                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 817                         dd->ipath_sendctrl | INFINIPATH_S_DISARM |
 818                         (i << INFINIPATH_S_DISARMPIOBUF_SHIFT));
 819                 /* can't disarm bufs back-to-back per iba7220 spec */
 820                 ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 821                 spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 822         }
 823
 824         /*
 825          * Disable PIOAVAILUPD, then re-enable, reading scratch in
 826          * between.  This seems to avoid a chip timing race that causes
 827          * pioavail updates to memory to stop.  We xor as we don't
 828          * know the state of the bit when we're called.
 829          */
 830         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
 831         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 832                 dd->ipath_sendctrl ^ INFINIPATH_S_PIOBUFAVAILUPD);
 833         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 834         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 835                          dd->ipath_sendctrl);
 836         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
 837 }
 838
 839 /**
 840  * ipath_wait_linkstate - wait for an IB link state change to occur
 841  * @dd: the infinipath device
 842  * @state: the state to wait for
 843  * @msecs: the number of milliseconds to wait
 844  *
 845  * wait up to msecs milliseconds for IB link state change to occur for
 846  * now, take the easy polling route.  Currently used only by
 847  * ipath_set_linkstate.  Returns 0 if state reached, otherwise
 848  * -ETIMEDOUT state can have multiple states set, for any of several
 849  * transitions.
 850  */
 851 static int ipath_wait_linkstate(struct ipath_devdata *dd, u32 state,
 852                                 int msecs)
 853 {
 854         dd->ipath_state_wanted = state;
 855         wait_event_interruptible_timeout(ipath_state_wait,
 856                                          (dd->ipath_flags & state),
 857                                          msecs_to_jiffies(msecs));
 858         dd->ipath_state_wanted = 0;
 859
 860         if (!(dd->ipath_flags & state)) {
 861                 u64 val;
 862                 ipath_cdbg(VERBOSE, "Didn't reach linkstate %s within %u"
 863                            " ms\n",
 864                            /* test INIT ahead of DOWN, both can be set */
 865                            (state & IPATH_LINKINIT) ? "INIT" :
 866                            ((state & IPATH_LINKDOWN) ? "DOWN" :
 867                             ((state & IPATH_LINKARMED) ? "ARM" : "ACTIVE")),
 868                            msecs);
 869                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 870                 ipath_cdbg(VERBOSE, "ibcc=%llx ibcstatus=%llx (%s)\n",
 871                            (unsigned long long) ipath_read_kreg64(
 872                                    dd, dd->ipath_kregs->kr_ibcctrl),
 873                            (unsigned long long) val,
 874                            ipath_ibcstatus_str[val & 0xf]);
 875         }
 876         return (dd->ipath_flags & state) ? 0 : -ETIMEDOUT;
 877 }
 878
 879 /*
 880  * Decode the error status into strings, deciding whether to always
 881  * print * it or not depending on "normal packet errors" vs everything
 882  * else.   Return 1 if "real" errors, otherwise 0 if only packet
 883  * errors, so caller can decide what to print with the string.
 884  */
 885 int ipath_decode_err(char *buf, size_t blen, ipath_err_t err)
 886 {
 887         int iserr = 1;
 888         *buf = '\0';
 889         if (err & INFINIPATH_E_PKTERRS) {
 890                 if (!(err & ~INFINIPATH_E_PKTERRS))
 891                         iserr = 0; // if only packet errors.
 892                 if (ipath_debug & __IPATH_ERRPKTDBG) {
 893                         if (err & INFINIPATH_E_REBP)
 894                                 strlcat(buf, "EBP ", blen);
 895                         if (err & INFINIPATH_E_RVCRC)
 896                                 strlcat(buf, "VCRC ", blen);
 897                         if (err & INFINIPATH_E_RICRC) {
 898                                 strlcat(buf, "CRC ", blen);
 899                                 // clear for check below, so only once
 900                                 err &= INFINIPATH_E_RICRC;
 901                         }
 902                         if (err & INFINIPATH_E_RSHORTPKTLEN)
 903                                 strlcat(buf, "rshortpktlen ", blen);
 904                         if (err & INFINIPATH_E_SDROPPEDDATAPKT)
 905                                 strlcat(buf, "sdroppeddatapkt ", blen);
 906                         if (err & INFINIPATH_E_SPKTLEN)
 907                                 strlcat(buf, "spktlen ", blen);
 908                 }
 909                 if ((err & INFINIPATH_E_RICRC) &&
 910                         !(err&(INFINIPATH_E_RVCRC|INFINIPATH_E_REBP)))
 911                         strlcat(buf, "CRC ", blen);
 912                 if (!iserr)
 913                         goto done;
 914         }
 915         if (err & INFINIPATH_E_RHDRLEN)
 916                 strlcat(buf, "rhdrlen ", blen);
 917         if (err & INFINIPATH_E_RBADTID)
 918                 strlcat(buf, "rbadtid ", blen);
 919         if (err & INFINIPATH_E_RBADVERSION)
 920                 strlcat(buf, "rbadversion ", blen);
 921         if (err & INFINIPATH_E_RHDR)
 922                 strlcat(buf, "rhdr ", blen);
 923         if (err & INFINIPATH_E_RLONGPKTLEN)
 924                 strlcat(buf, "rlongpktlen ", blen);
 925         if (err & INFINIPATH_E_RMAXPKTLEN)
 926                 strlcat(buf, "rmaxpktlen ", blen);
 927         if (err & INFINIPATH_E_RMINPKTLEN)
 928                 strlcat(buf, "rminpktlen ", blen);
 929         if (err & INFINIPATH_E_SMINPKTLEN)
 930                 strlcat(buf, "sminpktlen ", blen);
 931         if (err & INFINIPATH_E_RFORMATERR)
 932                 strlcat(buf, "rformaterr ", blen);
 933         if (err & INFINIPATH_E_RUNSUPVL)
 934                 strlcat(buf, "runsupvl ", blen);
 935         if (err & INFINIPATH_E_RUNEXPCHAR)
 936                 strlcat(buf, "runexpchar ", blen);
 937         if (err & INFINIPATH_E_RIBFLOW)
 938                 strlcat(buf, "ribflow ", blen);
 939         if (err & INFINIPATH_E_SUNDERRUN)
 940                 strlcat(buf, "sunderrun ", blen);
 941         if (err & INFINIPATH_E_SPIOARMLAUNCH)
 942                 strlcat(buf, "spioarmlaunch ", blen);
 943         if (err & INFINIPATH_E_SUNEXPERRPKTNUM)
 944                 strlcat(buf, "sunexperrpktnum ", blen);
 945         if (err & INFINIPATH_E_SDROPPEDSMPPKT)
 946                 strlcat(buf, "sdroppedsmppkt ", blen);
 947         if (err & INFINIPATH_E_SMAXPKTLEN)
 948                 strlcat(buf, "smaxpktlen ", blen);
 949         if (err & INFINIPATH_E_SUNSUPVL)
 950                 strlcat(buf, "sunsupVL ", blen);
 951         if (err & INFINIPATH_E_INVALIDADDR)
 952                 strlcat(buf, "invalidaddr ", blen);
 953         if (err & INFINIPATH_E_RRCVEGRFULL)
 954                 strlcat(buf, "rcvegrfull ", blen);
 955         if (err & INFINIPATH_E_RRCVHDRFULL)
 956                 strlcat(buf, "rcvhdrfull ", blen);
 957         if (err & INFINIPATH_E_IBSTATUSCHANGED)
 958                 strlcat(buf, "ibcstatuschg ", blen);
 959         if (err & INFINIPATH_E_RIBLOSTLINK)
 960                 strlcat(buf, "riblostlink ", blen);
 961         if (err & INFINIPATH_E_HARDWARE)
 962                 strlcat(buf, "hardware ", blen);
 963         if (err & INFINIPATH_E_RESET)
 964                 strlcat(buf, "reset ", blen);
 965 done:
 966         return iserr;
 967 }
 968
 969 /**
 970  * get_rhf_errstring - decode RHF errors
 971  * @err: the err number
 972  * @msg: the output buffer
 973  * @len: the length of the output buffer
 974  *
 975  * only used one place now, may want more later
 976  */
 977 static void get_rhf_errstring(u32 err, char *msg, size_t len)
 978 {
 979         /* if no errors, and so don't need to check what's first */
 980         *msg = '\0';
 981
 982         if (err & INFINIPATH_RHF_H_ICRCERR)
 983                 strlcat(msg, "icrcerr ", len);
 984         if (err & INFINIPATH_RHF_H_VCRCERR)
 985                 strlcat(msg, "vcrcerr ", len);
 986         if (err & INFINIPATH_RHF_H_PARITYERR)
 987                 strlcat(msg, "parityerr ", len);
 988         if (err & INFINIPATH_RHF_H_LENERR)
 989                 strlcat(msg, "lenerr ", len);
 990         if (err & INFINIPATH_RHF_H_MTUERR)
 991                 strlcat(msg, "mtuerr ", len);
 992         if (err & INFINIPATH_RHF_H_IHDRERR)
 993                 /* infinipath hdr checksum error */
 994                 strlcat(msg, "ipathhdrerr ", len);
 995         if (err & INFINIPATH_RHF_H_TIDERR)
 996                 strlcat(msg, "tiderr ", len);
 997         if (err & INFINIPATH_RHF_H_MKERR)
 998                 /* bad port, offset, etc. */
 999                 strlcat(msg, "invalid ipathhdr ", len);
1000         if (err & INFINIPATH_RHF_H_IBERR)
1001                 strlcat(msg, "iberr ", len);
1002         if (err & INFINIPATH_RHF_L_SWA)
1003                 strlcat(msg, "swA ", len);
1004         if (err & INFINIPATH_RHF_L_SWB)
1005                 strlcat(msg, "swB ", len);
1006 }
1007
1008 /**
1009  * ipath_get_egrbuf - get an eager buffer
1010  * @dd: the infinipath device
1011  * @bufnum: the eager buffer to get
1012  *
1013  * must only be called if ipath_pd[port] is known to be allocated
1014  */
1015 static inline void *ipath_get_egrbuf(struct ipath_devdata *dd, u32 bufnum)
1016 {
1017         return dd->ipath_port0_skbinfo ?
1018                 (void *) dd->ipath_port0_skbinfo[bufnum].skb->data : NULL;
1019 }
1020
1021 /**
1022  * ipath_alloc_skb - allocate an skb and buffer with possible constraints
1023  * @dd: the infinipath device
1024  * @gfp_mask: the sk_buff SFP mask
1025  */
1026 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd,
1027                                 gfp_t gfp_mask)
1028 {
1029         struct sk_buff *skb;
1030         u32 len;
1031
1032         /*
1033          * Only fully supported way to handle this is to allocate lots
1034          * extra, align as needed, and then do skb_reserve().  That wastes
1035          * a lot of memory...  I'll have to hack this into infinipath_copy
1036          * also.
1037          */
1038
1039         /*
1040          * We need 2 extra bytes for ipath_ether data sent in the
1041          * key header.  In order to keep everything dword aligned,
1042          * we'll reserve 4 bytes.
1043          */
1044         len = dd->ipath_ibmaxlen + 4;
1045
1046         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1047                 /* We need a 2KB multiple alignment, and there is no way
1048                  * to do it except to allocate extra and then skb_reserve
1049                  * enough to bring it up to the right alignment.
1050                  */
1051                 len += 2047;
1052         }
1053
1054         skb = __dev_alloc_skb(len, gfp_mask);
1055         if (!skb) {
1056                 ipath_dev_err(dd, "Failed to allocate skbuff, length %u\n",
1057                               len);
1058                 goto bail;
1059         }
1060
1061         skb_reserve(skb, 4);
1062
1063         if (dd->ipath_flags & IPATH_4BYTE_TID) {
1064                 u32 una = (unsigned long)skb->data & 2047;
1065                 if (una)
1066                         skb_reserve(skb, 2048 - una);
1067         }
1068
1069 bail:
1070         return skb;
1071 }
1072
1073 static void ipath_rcv_hdrerr(struct ipath_devdata *dd,
1074                              u32 eflags,
1075                              u32 l,
1076                              u32 etail,
1077                              u64 *rc)
1078 {
1079         char emsg[128];
1080         struct ipath_message_header *hdr;
1081
1082         get_rhf_errstring(eflags, emsg, sizeof emsg);
1083         hdr = (struct ipath_message_header *)&rc[1];
1084         ipath_cdbg(PKT, "RHFerrs %x hdrqtail=%x typ=%u "
1085                    "tlen=%x opcode=%x egridx=%x: %s\n",
1086                    eflags, l,
1087                    ipath_hdrget_rcv_type((__le32 *) rc),
1088                    ipath_hdrget_length_in_bytes((__le32 *) rc),
1089                    be32_to_cpu(hdr->bth[0]) >> 24,
1090                    etail, emsg);
1091
1092         /* Count local link integrity errors. */
1093         if (eflags & (INFINIPATH_RHF_H_ICRCERR | INFINIPATH_RHF_H_VCRCERR)) {
1094                 u8 n = (dd->ipath_ibcctrl >>
1095                         INFINIPATH_IBCC_PHYERRTHRESHOLD_SHIFT) &
1096                         INFINIPATH_IBCC_PHYERRTHRESHOLD_MASK;
1097
1098                 if (++dd->ipath_lli_counter > n) {
1099                         dd->ipath_lli_counter = 0;
1100                         dd->ipath_lli_errors++;
1101                 }
1102         }
1103 }
1104
1105 /*
1106  * ipath_kreceive - receive a packet
1107  * @pd: the infinipath port
1108  *
1109  * called from interrupt handler for errors or receive interrupt
1110  */
1111 void ipath_kreceive(struct ipath_portdata *pd)
1112 {
1113         u64 *rc;
1114         struct ipath_devdata *dd = pd->port_dd;
1115         void *ebuf;
1116         const u32 rsize = dd->ipath_rcvhdrentsize;      /* words */
1117         const u32 maxcnt = dd->ipath_rcvhdrcnt * rsize; /* words */
1118         u32 etail = -1, l, hdrqtail;
1119         struct ipath_message_header *hdr;
1120         u32 eflags, i, etype, tlen, pkttot = 0, updegr=0, reloop=0;
1121         static u64 totcalls;    /* stats, may eventually remove */
1122
1123         if (!dd->ipath_hdrqtailptr) {
1124                 ipath_dev_err(dd,
1125                               "hdrqtailptr not set, can't do receives\n");
1126                 goto bail;
1127         }
1128
1129         l = pd->port_head;
1130         hdrqtail = ipath_get_rcvhdrtail(pd);
1131         if (l == hdrqtail)
1132                 goto bail;
1133
1134 reloop:
1135         for (i = 0; l != hdrqtail; i++) {
1136                 u32 qp;
1137                 u8 *bthbytes;
1138
1139                 rc = (u64 *) (pd->port_rcvhdrq + (l << 2));
1140                 hdr = (struct ipath_message_header *)&rc[1];
1141                 /*
1142                  * could make a network order version of IPATH_KD_QP, and
1143                  * do the obvious shift before masking to speed this up.
1144                  */
1145                 qp = ntohl(hdr->bth[1]) & 0xffffff;
1146                 bthbytes = (u8 *) hdr->bth;
1147
1148                 eflags = ipath_hdrget_err_flags((__le32 *) rc);
1149                 etype = ipath_hdrget_rcv_type((__le32 *) rc);
1150                 /* total length */
1151                 tlen = ipath_hdrget_length_in_bytes((__le32 *) rc);
1152                 ebuf = NULL;
1153                 if (etype != RCVHQ_RCV_TYPE_EXPECTED) {
1154                         /*
1155                          * it turns out that the chips uses an eager buffer
1156                          * for all non-expected packets, whether it "needs"
1157                          * one or not.  So always get the index, but don't
1158                          * set ebuf (so we try to copy data) unless the
1159                          * length requires it.
1160                          */
1161                         etail = ipath_hdrget_index((__le32 *) rc);
1162                         if (tlen > sizeof(*hdr) ||
1163                             etype == RCVHQ_RCV_TYPE_NON_KD)
1164                                 ebuf = ipath_get_egrbuf(dd, etail);
1165                 }
1166
1167                 /*
1168                  * both tiderr and ipathhdrerr are set for all plain IB
1169                  * packets; only ipathhdrerr should be set.
1170                  */
1171
1172                 if (etype != RCVHQ_RCV_TYPE_NON_KD && etype !=
1173                     RCVHQ_RCV_TYPE_ERROR && ipath_hdrget_ipath_ver(
1174                             hdr->iph.ver_port_tid_offset) !=
1175                     IPS_PROTO_VERSION) {
1176                         ipath_cdbg(PKT, "Bad InfiniPath protocol version "
1177                                    "%x\n", etype);
1178                 }
1179
1180                 if (unlikely(eflags))
1181                         ipath_rcv_hdrerr(dd, eflags, l, etail, rc);
1182                 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
1183                         ipath_ib_rcv(dd->verbs_dev, rc + 1, ebuf, tlen);
1184                         if (dd->ipath_lli_counter)
1185                                 dd->ipath_lli_counter--;
1186                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1187                                    "qp=%x), len %x; ignored\n",
1188                                    etype, bthbytes[0], qp, tlen);
1189                 }
1190                 else if (etype == RCVHQ_RCV_TYPE_EAGER)
1191                         ipath_cdbg(PKT, "typ %x, opcode %x (eager, "
1192                                    "qp=%x), len %x; ignored\n",
1193                                    etype, bthbytes[0], qp, tlen);
1194                 else if (etype == RCVHQ_RCV_TYPE_EXPECTED)
1195                         ipath_dbg("Bug: Expected TID, opcode %x; ignored\n",
1196                                   be32_to_cpu(hdr->bth[0]) & 0xff);
1197                 else {
1198                         /*
1199                          * error packet, type of error  unknown.
1200                          * Probably type 3, but we don't know, so don't
1201                          * even try to print the opcode, etc.
1202                          */
1203                         ipath_dbg("Error Pkt, but no eflags! egrbuf %x, "
1204                                   "len %x\nhdrq@%lx;hdrq+%x rhf: %llx; "
1205                                   "hdr %llx %llx %llx %llx %llx\n",
1206                                   etail, tlen, (unsigned long) rc, l,
1207                                   (unsigned long long) rc[0],
1208                                   (unsigned long long) rc[1],
1209                                   (unsigned long long) rc[2],
1210                                   (unsigned long long) rc[3],
1211                                   (unsigned long long) rc[4],
1212                                   (unsigned long long) rc[5]);
1213                 }
1214                 l += rsize;
1215                 if (l >= maxcnt)
1216                         l = 0;
1217                 if (etype != RCVHQ_RCV_TYPE_EXPECTED)
1218                     updegr = 1;
1219                 /*
1220                  * update head regs on last packet, and every 16 packets.
1221                  * Reduce bus traffic, while still trying to prevent
1222                  * rcvhdrq overflows, for when the queue is nearly full
1223                  */
1224                 if (l == hdrqtail || (i && !(i&0xf))) {
1225                         u64 lval;
1226                         if (l == hdrqtail)
1227                                 /* request IBA6120 interrupt only on last */
1228                                 lval = dd->ipath_rhdrhead_intr_off | l;
1229                         else
1230                                 lval = l;
1231                         (void)ipath_write_ureg(dd, ur_rcvhdrhead, lval, 0);
1232                         if (updegr) {
1233                                 (void)ipath_write_ureg(dd, ur_rcvegrindexhead,
1234                                                        etail, 0);
1235                                 updegr = 0;
1236                         }
1237                 }
1238         }
1239
1240         if (!dd->ipath_rhdrhead_intr_off && !reloop) {
1241                 /* IBA6110 workaround; we can have a race clearing chip
1242                  * interrupt with another interrupt about to be delivered,
1243                  * and can clear it before it is delivered on the GPIO
1244                  * workaround.  By doing the extra check here for the
1245                  * in-memory tail register updating while we were doing
1246                  * earlier packets, we "almost" guarantee we have covered
1247                  * that case.
1248                  */
1249                 u32 hqtail = ipath_get_rcvhdrtail(pd);
1250                 if (hqtail != hdrqtail) {
1251                         hdrqtail = hqtail;
1252                         reloop = 1; /* loop 1 extra time at most */
1253                         goto reloop;
1254                 }
1255         }
1256
1257         pkttot += i;
1258
1259         pd->port_head = l;
1260
1261         if (pkttot > ipath_stats.sps_maxpkts_call)
1262                 ipath_stats.sps_maxpkts_call = pkttot;
1263         ipath_stats.sps_port0pkts += pkttot;
1264         ipath_stats.sps_avgpkts_call =
1265                 ipath_stats.sps_port0pkts / ++totcalls;
1266
1267 bail:;
1268 }
1269
1270 /**
1271  * ipath_update_pio_bufs - update shadow copy of the PIO availability map
1272  * @dd: the infinipath device
1273  *
1274  * called whenever our local copy indicates we have run out of send buffers
1275  * NOTE: This can be called from interrupt context by some code
1276  * and from non-interrupt context by ipath_getpiobuf().
1277  */
1278
1279 static void ipath_update_pio_bufs(struct ipath_devdata *dd)
1280 {
1281         unsigned long flags;
1282         int i;
1283         const unsigned piobregs = (unsigned)dd->ipath_pioavregs;
1284
1285         /* If the generation (check) bits have changed, then we update the
1286          * busy bit for the corresponding PIO buffer.  This algorithm will
1287          * modify positions to the value they already have in some cases
1288          * (i.e., no change), but it's faster than changing only the bits
1289          * that have changed.
1290          *
1291          * We would like to do this atomicly, to avoid spinlocks in the
1292          * critical send path, but that's not really possible, given the
1293          * type of changes, and that this routine could be called on
1294          * multiple cpu's simultaneously, so we lock in this routine only,
1295          * to avoid conflicting updates; all we change is the shadow, and
1296          * it's a single 64 bit memory location, so by definition the update
1297          * is atomic in terms of what other cpu's can see in testing the
1298          * bits.  The spin_lock overhead isn't too bad, since it only
1299          * happens when all buffers are in use, so only cpu overhead, not
1300          * latency or bandwidth is affected.
1301          */
1302 #define _IPATH_ALL_CHECKBITS 0x5555555555555555ULL
1303         if (!dd->ipath_pioavailregs_dma) {
1304                 ipath_dbg("Update shadow pioavail, but regs_dma NULL!\n");
1305                 return;
1306         }
1307         if (ipath_debug & __IPATH_VERBDBG) {
1308                 /* only if packet debug and verbose */
1309                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1310                 unsigned long *shadow = dd->ipath_pioavailshadow;
1311
1312                 ipath_cdbg(PKT, "Refill avail, dma0=%llx shad0=%lx, "
1313                            "d1=%llx s1=%lx, d2=%llx s2=%lx, d3=%llx "
1314                            "s3=%lx\n",
1315                            (unsigned long long) le64_to_cpu(dma[0]),
1316                            shadow[0],
1317                            (unsigned long long) le64_to_cpu(dma[1]),
1318                            shadow[1],
1319                            (unsigned long long) le64_to_cpu(dma[2]),
1320                            shadow[2],
1321                            (unsigned long long) le64_to_cpu(dma[3]),
1322                            shadow[3]);
1323                 if (piobregs > 4)
1324                         ipath_cdbg(
1325                                 PKT, "2nd group, dma4=%llx shad4=%lx, "
1326                                 "d5=%llx s5=%lx, d6=%llx s6=%lx, "
1327                                 "d7=%llx s7=%lx\n",
1328                                 (unsigned long long) le64_to_cpu(dma[4]),
1329                                 shadow[4],
1330                                 (unsigned long long) le64_to_cpu(dma[5]),
1331                                 shadow[5],
1332                                 (unsigned long long) le64_to_cpu(dma[6]),
1333                                 shadow[6],
1334                                 (unsigned long long) le64_to_cpu(dma[7]),
1335                                 shadow[7]);
1336         }
1337         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1338         for (i = 0; i < piobregs; i++) {
1339                 u64 pchbusy, pchg, piov, pnew;
1340                 /*
1341                  * Chip Errata: bug 6641; even and odd qwords>3 are swapped
1342                  */
1343                 if (i > 3) {
1344                         if (i & 1)
1345                                 piov = le64_to_cpu(
1346                                         dd->ipath_pioavailregs_dma[i - 1]);
1347                         else
1348                                 piov = le64_to_cpu(
1349                                         dd->ipath_pioavailregs_dma[i + 1]);
1350                 } else
1351                         piov = le64_to_cpu(dd->ipath_pioavailregs_dma[i]);
1352                 pchg = _IPATH_ALL_CHECKBITS &
1353                         ~(dd->ipath_pioavailshadow[i] ^ piov);
1354                 pchbusy = pchg << INFINIPATH_SENDPIOAVAIL_BUSY_SHIFT;
1355                 if (pchg && (pchbusy & dd->ipath_pioavailshadow[i])) {
1356                         pnew = dd->ipath_pioavailshadow[i] & ~pchbusy;
1357                         pnew |= piov & pchbusy;
1358                         dd->ipath_pioavailshadow[i] = pnew;
1359                 }
1360         }
1361         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1362 }
1363
1364 /**
1365  * ipath_setrcvhdrsize - set the receive header size
1366  * @dd: the infinipath device
1367  * @rhdrsize: the receive header size
1368  *
1369  * called from user init code, and also layered driver init
1370  */
1371 int ipath_setrcvhdrsize(struct ipath_devdata *dd, unsigned rhdrsize)
1372 {
1373         int ret = 0;
1374
1375         if (dd->ipath_flags & IPATH_RCVHDRSZ_SET) {
1376                 if (dd->ipath_rcvhdrsize != rhdrsize) {
1377                         dev_info(&dd->pcidev->dev,
1378                                  "Error: can't set protocol header "
1379                                  "size %u, already %u\n",
1380                                  rhdrsize, dd->ipath_rcvhdrsize);
1381                         ret = -EAGAIN;
1382                 } else
1383                         ipath_cdbg(VERBOSE, "Reuse same protocol header "
1384                                    "size %u\n", dd->ipath_rcvhdrsize);
1385         } else if (rhdrsize > (dd->ipath_rcvhdrentsize -
1386                                (sizeof(u64) / sizeof(u32)))) {
1387                 ipath_dbg("Error: can't set protocol header size %u "
1388                           "(> max %u)\n", rhdrsize,
1389                           dd->ipath_rcvhdrentsize -
1390                           (u32) (sizeof(u64) / sizeof(u32)));
1391                 ret = -EOVERFLOW;
1392         } else {
1393                 dd->ipath_flags |= IPATH_RCVHDRSZ_SET;
1394                 dd->ipath_rcvhdrsize = rhdrsize;
1395                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvhdrsize,
1396                                  dd->ipath_rcvhdrsize);
1397                 ipath_cdbg(VERBOSE, "Set protocol header size to %u\n",
1398                            dd->ipath_rcvhdrsize);
1399         }
1400         return ret;
1401 }
1402
1403 /**
1404  * ipath_getpiobuf - find an available pio buffer
1405  * @dd: the infinipath device
1406  * @pbufnum: the buffer number is placed here
1407  *
1408  * do appropriate marking as busy, etc.
1409  * returns buffer number if one found (>=0), negative number is error.
1410  * Used by ipath_layer_send
1411  */
1412 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *dd, u32 * pbufnum)
1413 {
1414         int i, j, starti, updated = 0;
1415         unsigned piobcnt, iter;
1416         unsigned long flags;
1417         unsigned long *shadow = dd->ipath_pioavailshadow;
1418         u32 __iomem *buf;
1419
1420         piobcnt = (unsigned)(dd->ipath_piobcnt2k
1421                              + dd->ipath_piobcnt4k);
1422         starti = dd->ipath_lastport_piobuf;
1423         iter = piobcnt - starti;
1424         if (dd->ipath_upd_pio_shadow) {
1425                 /*
1426                  * Minor optimization.  If we had no buffers on last call,
1427                  * start out by doing the update; continue and do scan even
1428                  * if no buffers were updated, to be paranoid
1429                  */
1430                 ipath_update_pio_bufs(dd);
1431                 /* we scanned here, don't do it at end of scan */
1432                 updated = 1;
1433                 i = starti;
1434         } else
1435                 i = dd->ipath_lastpioindex;
1436
1437 rescan:
1438         /*
1439          * while test_and_set_bit() is atomic, we do that and then the
1440          * change_bit(), and the pair is not.  See if this is the cause
1441          * of the remaining armlaunch errors.
1442          */
1443         spin_lock_irqsave(&ipath_pioavail_lock, flags);
1444         for (j = 0; j < iter; j++, i++) {
1445                 if (i >= piobcnt)
1446                         i = starti;
1447                 /*
1448                  * To avoid bus lock overhead, we first find a candidate
1449                  * buffer, then do the test and set, and continue if that
1450                  * fails.
1451                  */
1452                 if (test_bit((2 * i) + 1, shadow) ||
1453                     test_and_set_bit((2 * i) + 1, shadow))
1454                         continue;
1455                 /* flip generation bit */
1456                 change_bit(2 * i, shadow);
1457                 break;
1458         }
1459         spin_unlock_irqrestore(&ipath_pioavail_lock, flags);
1460
1461         if (j == iter) {
1462                 volatile __le64 *dma = dd->ipath_pioavailregs_dma;
1463
1464                 /*
1465                  * first time through; shadow exhausted, but may be real
1466                  * buffers available, so go see; if any updated, rescan
1467                  * (once)
1468                  */
1469                 if (!updated) {
1470                         ipath_update_pio_bufs(dd);
1471                         updated = 1;
1472                         i = starti;
1473                         goto rescan;
1474                 }
1475                 dd->ipath_upd_pio_shadow = 1;
1476                 /*
1477                  * not atomic, but if we lose one once in a while, that's OK
1478                  */
1479                 ipath_stats.sps_nopiobufs++;
1480                 if (!(++dd->ipath_consec_nopiobuf % 100000)) {
1481                         ipath_dbg(
1482                                 "%u pio sends with no bufavail; dmacopy: "
1483                                 "%llx %llx %llx %llx; shadow:  "
1484                                 "%lx %lx %lx %lx\n",
1485                                 dd->ipath_consec_nopiobuf,
1486                                 (unsigned long long) le64_to_cpu(dma[0]),
1487                                 (unsigned long long) le64_to_cpu(dma[1]),
1488                                 (unsigned long long) le64_to_cpu(dma[2]),
1489                                 (unsigned long long) le64_to_cpu(dma[3]),
1490                                 shadow[0], shadow[1], shadow[2],
1491                                 shadow[3]);
1492                         /*
1493                          * 4 buffers per byte, 4 registers above, cover rest
1494                          * below
1495                          */
1496                         if ((dd->ipath_piobcnt2k + dd->ipath_piobcnt4k) >
1497                             (sizeof(shadow[0]) * 4 * 4))
1498                                 ipath_dbg("2nd group: dmacopy: %llx %llx "
1499                                           "%llx %llx; shadow: %lx %lx "
1500                                           "%lx %lx\n",
1501                                           (unsigned long long)
1502                                           le64_to_cpu(dma[4]),
1503                                           (unsigned long long)
1504                                           le64_to_cpu(dma[5]),
1505                                           (unsigned long long)
1506                                           le64_to_cpu(dma[6]),
1507                                           (unsigned long long)
1508                                           le64_to_cpu(dma[7]),
1509                                           shadow[4], shadow[5],
1510                                           shadow[6], shadow[7]);
1511                 }
1512                 buf = NULL;
1513                 goto bail;
1514         }
1515
1516         /*
1517          * set next starting place.  Since it's just an optimization,
1518          * it doesn't matter who wins on this, so no locking
1519          */
1520         dd->ipath_lastpioindex = i + 1;
1521         if (dd->ipath_upd_pio_shadow)
1522                 dd->ipath_upd_pio_shadow = 0;
1523         if (dd->ipath_consec_nopiobuf)
1524                 dd->ipath_consec_nopiobuf = 0;
1525         if (i < dd->ipath_piobcnt2k)
1526                 buf = (u32 __iomem *) (dd->ipath_pio2kbase +
1527                                        i * dd->ipath_palign);
1528         else
1529                 buf = (u32 __iomem *)
1530                         (dd->ipath_pio4kbase +
1531                          (i - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
1532         ipath_cdbg(VERBOSE, "Return piobuf%u %uk @ %p\n",
1533                    i, (i < dd->ipath_piobcnt2k) ? 2 : 4, buf);
1534         if (pbufnum)
1535                 *pbufnum = i;
1536
1537 bail:
1538         return buf;
1539 }
1540
1541 /**
1542  * ipath_create_rcvhdrq - create a receive header queue
1543  * @dd: the infinipath device
1544  * @pd: the port data
1545  *
1546  * this must be contiguous memory (from an i/o perspective), and must be
1547  * DMA'able (which means for some systems, it will go through an IOMMU,
1548  * or be forced into a low address range).
1549  */
1550 int ipath_create_rcvhdrq(struct ipath_devdata *dd,
1551                          struct ipath_portdata *pd)
1552 {
1553         int ret = 0;
1554
1555         if (!pd->port_rcvhdrq) {
1556                 dma_addr_t phys_hdrqtail;
1557                 gfp_t gfp_flags = GFP_USER | __GFP_COMP;
1558                 int amt = ALIGN(dd->ipath_rcvhdrcnt * dd->ipath_rcvhdrentsize *
1559                                 sizeof(u32), PAGE_SIZE);
1560
1561                 pd->port_rcvhdrq = dma_alloc_coherent(
1562                         &dd->pcidev->dev, amt, &pd->port_rcvhdrq_phys,
1563                         gfp_flags);
1564
1565                 if (!pd->port_rcvhdrq) {
1566                         ipath_dev_err(dd, "attempt to allocate %d bytes "
1567                                       "for port %u rcvhdrq failed\n",
1568                                       amt, pd->port_port);
1569                         ret = -ENOMEM;
1570                         goto bail;
1571                 }
1572                 pd->port_rcvhdrtail_kvaddr = dma_alloc_coherent(
1573                         &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, GFP_KERNEL);
1574                 if (!pd->port_rcvhdrtail_kvaddr) {
1575                         ipath_dev_err(dd, "attempt to allocate 1 page "
1576                                       "for port %u rcvhdrqtailaddr failed\n",
1577                                       pd->port_port);
1578                         ret = -ENOMEM;
1579                         dma_free_coherent(&dd->pcidev->dev, amt,
1580                                           pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
1581                         pd->port_rcvhdrq = NULL;
1582                         goto bail;
1583                 }
1584                 pd->port_rcvhdrqtailaddr_phys = phys_hdrqtail;
1585
1586                 pd->port_rcvhdrq_size = amt;
1587
1588                 ipath_cdbg(VERBOSE, "%d pages at %p (phys %lx) size=%lu "
1589                            "for port %u rcvhdr Q\n",
1590                            amt >> PAGE_SHIFT, pd->port_rcvhdrq,
1591                            (unsigned long) pd->port_rcvhdrq_phys,
1592                            (unsigned long) pd->port_rcvhdrq_size,
1593                            pd->port_port);
1594
1595                 ipath_cdbg(VERBOSE, "port %d hdrtailaddr, %llx physical\n",
1596                            pd->port_port,
1597                            (unsigned long long) phys_hdrqtail);
1598         }
1599         else
1600                 ipath_cdbg(VERBOSE, "reuse port %d rcvhdrq @%p %llx phys; "
1601                            "hdrtailaddr@%p %llx physical\n",
1602                            pd->port_port, pd->port_rcvhdrq,
1603                            (unsigned long long) pd->port_rcvhdrq_phys,
1604                            pd->port_rcvhdrtail_kvaddr, (unsigned long long)
1605                            pd->port_rcvhdrqtailaddr_phys);
1606
1607         /* clear for security and sanity on each use */
1608         memset(pd->port_rcvhdrq, 0, pd->port_rcvhdrq_size);
1609         if (pd->port_rcvhdrtail_kvaddr)
1610                 memset(pd->port_rcvhdrtail_kvaddr, 0, PAGE_SIZE);
1611
1612         /*
1613          * tell chip each time we init it, even if we are re-using previous
1614          * memory (we zero the register at process close)
1615          */
1616         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdrtailaddr,
1617                               pd->port_port, pd->port_rcvhdrqtailaddr_phys);
1618         ipath_write_kreg_port(dd, dd->ipath_kregs->kr_rcvhdraddr,
1619                               pd->port_port, pd->port_rcvhdrq_phys);
1620
1621         ret = 0;
1622 bail:
1623         return ret;
1624 }
1625
1626 int ipath_waitfor_complete(struct ipath_devdata *dd, ipath_kreg reg_id,
1627                            u64 bits_to_wait_for, u64 * valp)
1628 {
1629         unsigned long timeout;
1630         u64 lastval, val;
1631         int ret;
1632
1633         lastval = ipath_read_kreg64(dd, reg_id);
1634         /* wait a ridiculously long time */
1635         timeout = jiffies + msecs_to_jiffies(5);
1636         do {
1637                 val = ipath_read_kreg64(dd, reg_id);
1638                 /* set so they have something, even on failures. */
1639                 *valp = val;
1640                 if ((val & bits_to_wait_for) == bits_to_wait_for) {
1641                         ret = 0;
1642                         break;
1643                 }
1644                 if (val != lastval)
1645                         ipath_cdbg(VERBOSE, "Changed from %llx to %llx, "
1646                                    "waiting for %llx bits\n",
1647                                    (unsigned long long) lastval,
1648                                    (unsigned long long) val,
1649                                    (unsigned long long) bits_to_wait_for);
1650                 cond_resched();
1651                 if (time_after(jiffies, timeout)) {
1652                         ipath_dbg("Didn't get bits %llx in register 0x%x, "
1653                                   "got %llx\n",
1654                                   (unsigned long long) bits_to_wait_for,
1655                                   reg_id, (unsigned long long) *valp);
1656                         ret = -ENODEV;
1657                         break;
1658                 }
1659         } while (1);
1660
1661         return ret;
1662 }
1663
1664 /**
1665  * ipath_waitfor_mdio_cmdready - wait for last command to complete
1666  * @dd: the infinipath device
1667  *
1668  * Like ipath_waitfor_complete(), but we wait for the CMDVALID bit to go
1669  * away indicating the last command has completed.  It doesn't return data
1670  */
1671 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *dd)
1672 {
1673         unsigned long timeout;
1674         u64 val;
1675         int ret;
1676
1677         /* wait a ridiculously long time */
1678         timeout = jiffies + msecs_to_jiffies(5);
1679         do {
1680                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_mdio);
1681                 if (!(val & IPATH_MDIO_CMDVALID)) {
1682                         ret = 0;
1683                         break;
1684                 }
1685                 cond_resched();
1686                 if (time_after(jiffies, timeout)) {
1687                         ipath_dbg("CMDVALID stuck in mdio reg? (%llx)\n",
1688                                   (unsigned long long) val);
1689                         ret = -ENODEV;
1690                         break;
1691                 }
1692         } while (1);
1693
1694         return ret;
1695 }
1696
1697
1698 /*
1699  * Flush all sends that might be in the ready to send state, as well as any
1700  * that are in the process of being sent.   Used whenever we need to be
1701  * sure the send side is idle.  Cleans up all buffer state by canceling
1702  * all pio buffers, and issuing an abort, which cleans up anything in the
1703  * launch fifo.  The cancel is superfluous on some chip versions, but
1704  * it's safer to always do it.
1705  * PIOAvail bits are updated by the chip as if normal send had happened.
1706  */
1707 void ipath_cancel_sends(struct ipath_devdata *dd, int restore_sendctrl)
1708 {
1709         ipath_dbg("Cancelling all in-progress send buffers\n");
1710         dd->ipath_lastcancel = jiffies+HZ/2; /* skip armlaunch errs a bit */
1711         /*
1712          * the abort bit is auto-clearing.  We read scratch to be sure
1713          * that cancels and the abort have taken effect in the chip.
1714          */
1715         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1716                 INFINIPATH_S_ABORT);
1717         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1718         ipath_disarm_piobufs(dd, 0,
1719                 (unsigned)(dd->ipath_piobcnt2k + dd->ipath_piobcnt4k));
1720         if (restore_sendctrl) /* else done by caller later */
1721                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1722                                  dd->ipath_sendctrl);
1723
1724         /* and again, be sure all have hit the chip */
1725         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
1726 }
1727
1728
1729 static void ipath_set_ib_lstate(struct ipath_devdata *dd, int which)
1730 {
1731         static const char *what[4] = {
1732                 [0] = "DOWN",
1733                 [INFINIPATH_IBCC_LINKCMD_INIT] = "INIT",
1734                 [INFINIPATH_IBCC_LINKCMD_ARMED] = "ARMED",
1735                 [INFINIPATH_IBCC_LINKCMD_ACTIVE] = "ACTIVE"
1736         };
1737         int linkcmd = (which >> INFINIPATH_IBCC_LINKCMD_SHIFT) &
1738                         INFINIPATH_IBCC_LINKCMD_MASK;
1739
1740         ipath_cdbg(VERBOSE, "Trying to move unit %u to %s, current ltstate "
1741                    "is %s\n", dd->ipath_unit,
1742                    what[linkcmd],
1743                    ipath_ibcstatus_str[
1744                            (ipath_read_kreg64
1745                             (dd, dd->ipath_kregs->kr_ibcstatus) >>
1746                             INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1747                            INFINIPATH_IBCS_LINKTRAININGSTATE_MASK]);
1748         /* flush all queued sends when going to DOWN or INIT, to be sure that
1749          * they don't block MAD packets */
1750         if (!linkcmd || linkcmd == INFINIPATH_IBCC_LINKCMD_INIT)
1751                 ipath_cancel_sends(dd, 1);
1752
1753         ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1754                          dd->ipath_ibcctrl | which);
1755 }
1756
1757 int ipath_set_linkstate(struct ipath_devdata *dd, u8 newstate)
1758 {
1759         u32 lstate;
1760         int ret;
1761
1762         switch (newstate) {
1763         case IPATH_IB_LINKDOWN:
1764                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_POLL <<
1765                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1766                 /* don't wait */
1767                 ret = 0;
1768                 goto bail;
1769
1770         case IPATH_IB_LINKDOWN_SLEEP:
1771                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_SLEEP <<
1772                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1773                 /* don't wait */
1774                 ret = 0;
1775                 goto bail;
1776
1777         case IPATH_IB_LINKDOWN_DISABLE:
1778                 ipath_set_ib_lstate(dd,
1779                                     INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
1780                                     INFINIPATH_IBCC_LINKINITCMD_SHIFT);
1781                 /* don't wait */
1782                 ret = 0;
1783                 goto bail;
1784
1785         case IPATH_IB_LINKINIT:
1786                 if (dd->ipath_flags & IPATH_LINKINIT) {
1787                         ret = 0;
1788                         goto bail;
1789                 }
1790                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_INIT <<
1791                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1792                 lstate = IPATH_LINKINIT;
1793                 break;
1794
1795         case IPATH_IB_LINKARM:
1796                 if (dd->ipath_flags & IPATH_LINKARMED) {
1797                         ret = 0;
1798                         goto bail;
1799                 }
1800                 if (!(dd->ipath_flags &
1801                       (IPATH_LINKINIT | IPATH_LINKACTIVE))) {
1802                         ret = -EINVAL;
1803                         goto bail;
1804                 }
1805                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ARMED <<
1806                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1807                 /*
1808                  * Since the port can transition to ACTIVE by receiving
1809                  * a non VL 15 packet, wait for either state.
1810                  */
1811                 lstate = IPATH_LINKARMED | IPATH_LINKACTIVE;
1812                 break;
1813
1814         case IPATH_IB_LINKACTIVE:
1815                 if (dd->ipath_flags & IPATH_LINKACTIVE) {
1816                         ret = 0;
1817                         goto bail;
1818                 }
1819                 if (!(dd->ipath_flags & IPATH_LINKARMED)) {
1820                         ret = -EINVAL;
1821                         goto bail;
1822                 }
1823                 ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKCMD_ACTIVE <<
1824                                     INFINIPATH_IBCC_LINKCMD_SHIFT);
1825                 lstate = IPATH_LINKACTIVE;
1826                 break;
1827
1828         case IPATH_IB_LINK_LOOPBACK:
1829                 dev_info(&dd->pcidev->dev, "Enabling IB local loopback\n");
1830                 dd->ipath_ibcctrl |= INFINIPATH_IBCC_LOOPBACK;
1831                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1832                                  dd->ipath_ibcctrl);
1833                 ret = 0;
1834                 goto bail; // no state change to wait for
1835
1836         case IPATH_IB_LINK_EXTERNAL:
1837                 dev_info(&dd->pcidev->dev, "Disabling IB local loopback (normal)\n");
1838                 dd->ipath_ibcctrl &= ~INFINIPATH_IBCC_LOOPBACK;
1839                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1840                                  dd->ipath_ibcctrl);
1841                 ret = 0;
1842                 goto bail; // no state change to wait for
1843
1844         default:
1845                 ipath_dbg("Invalid linkstate 0x%x requested\n", newstate);
1846                 ret = -EINVAL;
1847                 goto bail;
1848         }
1849         ret = ipath_wait_linkstate(dd, lstate, 2000);
1850
1851 bail:
1852         return ret;
1853 }
1854
1855 /**
1856  * ipath_set_mtu - set the MTU
1857  * @dd: the infinipath device
1858  * @arg: the new MTU
1859  *
1860  * we can handle "any" incoming size, the issue here is whether we
1861  * need to restrict our outgoing size.   For now, we don't do any
1862  * sanity checking on this, and we don't deal with what happens to
1863  * programs that are already running when the size changes.
1864  * NOTE: changing the MTU will usually cause the IBC to go back to
1865  * link initialize (IPATH_IBSTATE_INIT) state...
1866  */
1867 int ipath_set_mtu(struct ipath_devdata *dd, u16 arg)
1868 {
1869         u32 piosize;
1870         int changed = 0;
1871         int ret;
1872
1873         /*
1874          * mtu is IB data payload max.  It's the largest power of 2 less
1875          * than piosize (or even larger, since it only really controls the
1876          * largest we can receive; we can send the max of the mtu and
1877          * piosize).  We check that it's one of the valid IB sizes.
1878          */
1879         if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
1880             arg != 4096) {
1881                 ipath_dbg("Trying to set invalid mtu %u, failing\n", arg);
1882                 ret = -EINVAL;
1883                 goto bail;
1884         }
1885         if (dd->ipath_ibmtu == arg) {
1886                 ret = 0;        /* same as current */
1887                 goto bail;
1888         }
1889
1890         piosize = dd->ipath_ibmaxlen;
1891         dd->ipath_ibmtu = arg;
1892
1893         if (arg >= (piosize - IPATH_PIO_MAXIBHDR)) {
1894                 /* Only if it's not the initial value (or reset to it) */
1895                 if (piosize != dd->ipath_init_ibmaxlen) {
1896                         dd->ipath_ibmaxlen = piosize;
1897                         changed = 1;
1898                 }
1899         } else if ((arg + IPATH_PIO_MAXIBHDR) != dd->ipath_ibmaxlen) {
1900                 piosize = arg + IPATH_PIO_MAXIBHDR;
1901                 ipath_cdbg(VERBOSE, "ibmaxlen was 0x%x, setting to 0x%x "
1902                            "(mtu 0x%x)\n", dd->ipath_ibmaxlen, piosize,
1903                            arg);
1904                 dd->ipath_ibmaxlen = piosize;
1905                 changed = 1;
1906         }
1907
1908         if (changed) {
1909                 /*
1910                  * set the IBC maxpktlength to the size of our pio
1911                  * buffers in words
1912                  */
1913                 u64 ibc = dd->ipath_ibcctrl;
1914                 ibc &= ~(INFINIPATH_IBCC_MAXPKTLEN_MASK <<
1915                          INFINIPATH_IBCC_MAXPKTLEN_SHIFT);
1916
1917                 piosize = piosize - 2 * sizeof(u32);    /* ignore pbc */
1918                 dd->ipath_ibmaxlen = piosize;
1919                 piosize /= sizeof(u32); /* in words */
1920                 /*
1921                  * for ICRC, which we only send in diag test pkt mode, and
1922                  * we don't need to worry about that for mtu
1923                  */
1924                 piosize += 1;
1925
1926                 ibc |= piosize << INFINIPATH_IBCC_MAXPKTLEN_SHIFT;
1927                 dd->ipath_ibcctrl = ibc;
1928                 ipath_write_kreg(dd, dd->ipath_kregs->kr_ibcctrl,
1929                                  dd->ipath_ibcctrl);
1930                 dd->ipath_f_tidtemplate(dd);
1931         }
1932
1933         ret = 0;
1934
1935 bail:
1936         return ret;
1937 }
1938
1939 int ipath_set_lid(struct ipath_devdata *dd, u32 arg, u8 lmc)
1940 {
1941         dd->ipath_lid = arg;
1942         dd->ipath_lmc = lmc;
1943
1944         return 0;
1945 }
1946
1947
1948 /**
1949  * ipath_write_kreg_port - write a device's per-port 64-bit kernel register
1950  * @dd: the infinipath device
1951  * @regno: the register number to write
1952  * @port: the port containing the register
1953  * @value: the value to write
1954  *
1955  * Registers that vary with the chip implementation constants (port)
1956  * use this routine.
1957  */
1958 void ipath_write_kreg_port(const struct ipath_devdata *dd, ipath_kreg regno,
1959                           unsigned port, u64 value)
1960 {
1961         u16 where;
1962
1963         if (port < dd->ipath_portcnt &&
1964             (regno == dd->ipath_kregs->kr_rcvhdraddr ||
1965              regno == dd->ipath_kregs->kr_rcvhdrtailaddr))
1966                 where = regno + port;
1967         else
1968                 where = -1;
1969
1970         ipath_write_kreg(dd, where, value);
1971 }
1972
1973 /*
1974  * Following deal with the "obviously simple" task of overriding the state
1975  * of the LEDS, which normally indicate link physical and logical status.
1976  * The complications arise in dealing with different hardware mappings
1977  * and the board-dependent routine being called from interrupts.
1978  * and then there's the requirement to _flash_ them.
1979  */
1980 #define LED_OVER_FREQ_SHIFT 8
1981 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1982 /* Below is "non-zero" to force override, but both actual LEDs are off */
1983 #define LED_OVER_BOTH_OFF (8)
1984
1985 static void ipath_run_led_override(unsigned long opaque)
1986 {
1987         struct ipath_devdata *dd = (struct ipath_devdata *)opaque;
1988         int timeoff;
1989         int pidx;
1990         u64 lstate, ltstate, val;
1991
1992         if (!(dd->ipath_flags & IPATH_INITTED))
1993                 return;
1994
1995         pidx = dd->ipath_led_override_phase++ & 1;
1996         dd->ipath_led_override = dd->ipath_led_override_vals[pidx];
1997         timeoff = dd->ipath_led_override_timeoff;
1998
1999         /*
2000          * below potentially restores the LED values per current status,
2001          * should also possibly setup the traffic-blink register,
2002          * but leave that to per-chip functions.
2003          */
2004         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
2005         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
2006                   INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
2007         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
2008                  INFINIPATH_IBCS_LINKSTATE_MASK;
2009
2010         dd->ipath_f_setextled(dd, lstate, ltstate);
2011         mod_timer(&dd->ipath_led_override_timer, jiffies + timeoff);
2012 }
2013
2014 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val)
2015 {
2016         int timeoff, freq;
2017
2018         if (!(dd->ipath_flags & IPATH_INITTED))
2019                 return;
2020
2021         /* First check if we are blinking. If not, use 1HZ polling */
2022         timeoff = HZ;
2023         freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
2024
2025         if (freq) {
2026                 /* For blink, set each phase from one nybble of val */
2027                 dd->ipath_led_override_vals[0] = val & 0xF;
2028                 dd->ipath_led_override_vals[1] = (val >> 4) & 0xF;
2029                 timeoff = (HZ << 4)/freq;
2030         } else {
2031                 /* Non-blink set both phases the same. */
2032                 dd->ipath_led_override_vals[0] = val & 0xF;
2033                 dd->ipath_led_override_vals[1] = val & 0xF;
2034         }
2035         dd->ipath_led_override_timeoff = timeoff;
2036
2037         /*
2038          * If the timer has not already been started, do so. Use a "quick"
2039          * timeout so the function will be called soon, to look at our request.
2040          */
2041         if (atomic_inc_return(&dd->ipath_led_override_timer_active) == 1) {
2042                 /* Need to start timer */
2043                 init_timer(&dd->ipath_led_override_timer);
2044                 dd->ipath_led_override_timer.function =
2045                                                  ipath_run_led_override;
2046                 dd->ipath_led_override_timer.data = (unsigned long) dd;
2047                 dd->ipath_led_override_timer.expires = jiffies + 1;
2048                 add_timer(&dd->ipath_led_override_timer);
2049         } else {
2050                 atomic_dec(&dd->ipath_led_override_timer_active);
2051         }
2052 }
2053
2054 /**
2055  * ipath_shutdown_device - shut down a device
2056  * @dd: the infinipath device
2057  *
2058  * This is called to make the device quiet when we are about to
2059  * unload the driver, and also when the device is administratively
2060  * disabled.   It does not free any data structures.
2061  * Everything it does has to be setup again by ipath_init_chip(dd,1)
2062  */
2063 void ipath_shutdown_device(struct ipath_devdata *dd)
2064 {
2065         unsigned long flags;
2066
2067         ipath_dbg("Shutting down the device\n");
2068
2069         dd->ipath_flags |= IPATH_LINKUNK;
2070         dd->ipath_flags &= ~(IPATH_INITTED | IPATH_LINKDOWN |
2071                              IPATH_LINKINIT | IPATH_LINKARMED |
2072                              IPATH_LINKACTIVE);
2073         *dd->ipath_statusp &= ~(IPATH_STATUS_IB_CONF |
2074                                 IPATH_STATUS_IB_READY);
2075
2076         /* mask interrupts, but not errors */
2077         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
2078
2079         dd->ipath_rcvctrl = 0;
2080         ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
2081                          dd->ipath_rcvctrl);
2082
2083         /*
2084          * gracefully stop all sends allowing any in progress to trickle out
2085          * first.
2086          */
2087         spin_lock_irqsave(&dd->ipath_sendctrl_lock, flags);
2088         dd->ipath_sendctrl = 0;
2089         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl, dd->ipath_sendctrl);
2090         /* flush it */
2091         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
2092         spin_unlock_irqrestore(&dd->ipath_sendctrl_lock, flags);
2093
2094         /*
2095          * enough for anything that's going to trickle out to have actually
2096          * done so.
2097          */
2098         udelay(5);
2099
2100         ipath_set_ib_lstate(dd, INFINIPATH_IBCC_LINKINITCMD_DISABLE <<
2101                             INFINIPATH_IBCC_LINKINITCMD_SHIFT);
2102         ipath_cancel_sends(dd, 0);
2103
2104         signal_ib_event(dd, IB_EVENT_PORT_ERR);
2105
2106         /* disable IBC */
2107         dd->ipath_control &= ~INFINIPATH_C_LINKENABLE;
2108         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
2109                          dd->ipath_control | INFINIPATH_C_FREEZEMODE);
2110
2111         /*
2112          * clear SerdesEnable and turn the leds off; do this here because
2113          * we are unloading, so don't count on interrupts to move along
2114          * Turn the LEDs off explictly for the same reason.
2115          */
2116         dd->ipath_f_quiet_serdes(dd);
2117
2118         if (dd->ipath_stats_timer_active) {
2119                 del_timer_sync(&dd->ipath_stats_timer);
2120                 dd->ipath_stats_timer_active = 0;
2121         }
2122
2123         /*
2124          * clear all interrupts and errors, so that the next time the driver
2125          * is loaded or device is enabled, we know that whatever is set
2126          * happened while we were unloaded
2127          */
2128         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear,
2129                          ~0ULL & ~INFINIPATH_HWE_MEMBISTFAILED);
2130         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, -1LL);
2131         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, -1LL);
2132
2133         ipath_cdbg(VERBOSE, "Flush time and errors to EEPROM\n");
2134         ipath_update_eeprom_log(dd);
2135 }
2136
2137 /**
2138  * ipath_free_pddata - free a port's allocated data
2139  * @dd: the infinipath device
2140  * @pd: the portdata structure
2141  *
2142  * free up any allocated data for a port
2143  * This should not touch anything that would affect a simultaneous
2144  * re-allocation of port data, because it is called after ipath_mutex
2145  * is released (and can be called from reinit as well).
2146  * It should never change any chip state, or global driver state.
2147  * (The only exception to global state is freeing the port0 port0_skbs.)
2148  */
2149 void ipath_free_pddata(struct ipath_devdata *dd, struct ipath_portdata *pd)
2150 {
2151         if (!pd)
2152                 return;
2153
2154         if (pd->port_rcvhdrq) {
2155                 ipath_cdbg(VERBOSE, "free closed port %d rcvhdrq @ %p "
2156                            "(size=%lu)\n", pd->port_port, pd->port_rcvhdrq,
2157                            (unsigned long) pd->port_rcvhdrq_size);
2158                 dma_free_coherent(&dd->pcidev->dev, pd->port_rcvhdrq_size,
2159                                   pd->port_rcvhdrq, pd->port_rcvhdrq_phys);
2160                 pd->port_rcvhdrq = NULL;
2161                 if (pd->port_rcvhdrtail_kvaddr) {
2162                         dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE,
2163                                          pd->port_rcvhdrtail_kvaddr,
2164                                          pd->port_rcvhdrqtailaddr_phys);
2165                         pd->port_rcvhdrtail_kvaddr = NULL;
2166                 }
2167         }
2168         if (pd->port_port && pd->port_rcvegrbuf) {
2169                 unsigned e;
2170
2171                 for (e = 0; e < pd->port_rcvegrbuf_chunks; e++) {
2172                         void *base = pd->port_rcvegrbuf[e];
2173                         size_t size = pd->port_rcvegrbuf_size;
2174
2175                         ipath_cdbg(VERBOSE, "egrbuf free(%p, %lu), "
2176                                    "chunk %u/%u\n", base,
2177                                    (unsigned long) size,
2178                                    e, pd->port_rcvegrbuf_chunks);
2179                         dma_free_coherent(&dd->pcidev->dev, size,
2180                                 base, pd->port_rcvegrbuf_phys[e]);
2181                 }
2182                 kfree(pd->port_rcvegrbuf);
2183                 pd->port_rcvegrbuf = NULL;
2184                 kfree(pd->port_rcvegrbuf_phys);
2185                 pd->port_rcvegrbuf_phys = NULL;
2186                 pd->port_rcvegrbuf_chunks = 0;
2187         } else if (pd->port_port == 0 && dd->ipath_port0_skbinfo) {
2188                 unsigned e;
2189                 struct ipath_skbinfo *skbinfo = dd->ipath_port0_skbinfo;
2190
2191                 dd->ipath_port0_skbinfo = NULL;
2192                 ipath_cdbg(VERBOSE, "free closed port %d "
2193                            "ipath_port0_skbinfo @ %p\n", pd->port_port,
2194                            skbinfo);
2195                 for (e = 0; e < dd->ipath_rcvegrcnt; e++)
2196                 if (skbinfo[e].skb) {
2197                         pci_unmap_single(dd->pcidev, skbinfo[e].phys,
2198                                          dd->ipath_ibmaxlen,
2199                                          PCI_DMA_FROMDEVICE);
2200                         dev_kfree_skb(skbinfo[e].skb);
2201                 }
2202                 vfree(skbinfo);
2203         }
2204         kfree(pd->port_tid_pg_list);
2205         vfree(pd->subport_uregbase);
2206         vfree(pd->subport_rcvegrbuf);
2207         vfree(pd->subport_rcvhdr_base);
2208         kfree(pd);
2209 }
2210
2211 static int __init infinipath_init(void)
2212 {
2213         int ret;
2214
2215         if (ipath_debug & __IPATH_DBG)
2216                 printk(KERN_INFO DRIVER_LOAD_MSG "%s", ib_ipath_version);
2217
2218         /*
2219          * These must be called before the driver is registered with
2220          * the PCI subsystem.
2221          */
2222         idr_init(&unit_table);
2223         if (!idr_pre_get(&unit_table, GFP_KERNEL)) {
2224                 ret = -ENOMEM;
2225                 goto bail;
2226         }
2227
2228         ret = pci_register_driver(&ipath_driver);
2229         if (ret < 0) {
2230                 printk(KERN_ERR IPATH_DRV_NAME
2231                        ": Unable to register driver: error %d\n", -ret);
2232                 goto bail_unit;
2233         }
2234
2235         ret = ipath_init_ipathfs();
2236         if (ret < 0) {
2237                 printk(KERN_ERR IPATH_DRV_NAME ": Unable to create "
2238                        "ipathfs: error %d\n", -ret);
2239                 goto bail_pci;
2240         }
2241
2242         goto bail;
2243
2244 bail_pci:
2245         pci_unregister_driver(&ipath_driver);
2246
2247 bail_unit:
2248         idr_destroy(&unit_table);
2249
2250 bail:
2251         return ret;
2252 }
2253
2254 static void __exit infinipath_cleanup(void)
2255 {
2256         ipath_exit_ipathfs();
2257
2258         ipath_cdbg(VERBOSE, "Unregistering pci driver\n");
2259         pci_unregister_driver(&ipath_driver);
2260
2261         idr_destroy(&unit_table);
2262 }
2263
2264 /**
2265  * ipath_reset_device - reset the chip if possible
2266  * @unit: the device to reset
2267  *
2268  * Whether or not reset is successful, we attempt to re-initialize the chip
2269  * (that is, much like a driver unload/reload).  We clear the INITTED flag
2270  * so that the various entry points will fail until we reinitialize.  For
2271  * now, we only allow this if no user ports are open that use chip resources
2272  */
2273 int ipath_reset_device(int unit)
2274 {
2275         int ret, i;
2276         struct ipath_devdata *dd = ipath_lookup(unit);
2277
2278         if (!dd) {
2279                 ret = -ENODEV;
2280                 goto bail;
2281         }
2282
2283         if (atomic_read(&dd->ipath_led_override_timer_active)) {
2284                 /* Need to stop LED timer, _then_ shut off LEDs */
2285                 del_timer_sync(&dd->ipath_led_override_timer);
2286                 atomic_set(&dd->ipath_led_override_timer_active, 0);
2287         }
2288
2289         /* Shut off LEDs after we are sure timer is not running */
2290         dd->ipath_led_override = LED_OVER_BOTH_OFF;
2291         dd->ipath_f_setextled(dd, 0, 0);
2292
2293         dev_info(&dd->pcidev->dev, "Reset on unit %u requested\n", unit);
2294
2295         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT)) {
2296                 dev_info(&dd->pcidev->dev, "Invalid unit number %u or "
2297                          "not initialized or not present\n", unit);
2298                 ret = -ENXIO;
2299                 goto bail;
2300         }
2301
2302         if (dd->ipath_pd)
2303                 for (i = 1; i < dd->ipath_cfgports; i++) {
2304                         if (dd->ipath_pd[i] && dd->ipath_pd[i]->port_cnt) {
2305                                 ipath_dbg("unit %u port %d is in use "
2306                                           "(PID %u cmd %s), can't reset\n",
2307                                           unit, i,
2308                                           dd->ipath_pd[i]->port_pid,
2309                                           dd->ipath_pd[i]->port_comm);
2310                                 ret = -EBUSY;
2311                                 goto bail;
2312                         }
2313                 }
2314
2315         dd->ipath_flags &= ~IPATH_INITTED;
2316         ret = dd->ipath_f_reset(dd);
2317         if (ret != 1)
2318                 ipath_dbg("reset was not successful\n");
2319         ipath_dbg("Trying to reinitialize unit %u after reset attempt\n",
2320                   unit);
2321         ret = ipath_init_chip(dd, 1);
2322         if (ret)
2323                 ipath_dev_err(dd, "Reinitialize unit %u after "
2324                               "reset failed with %d\n", unit, ret);
2325         else
2326                 dev_info(&dd->pcidev->dev, "Reinitialized unit %u after "
2327                          "resetting\n", unit);
2328
2329 bail:
2330         return ret;
2331 }
2332
2333 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv)
2334 {
2335         u64 val;
2336         if ( new_pol_inv > INFINIPATH_XGXS_RX_POL_MASK ) {
2337                 return -1;
2338         }
2339         if ( dd->ipath_rx_pol_inv != new_pol_inv ) {
2340                 dd->ipath_rx_pol_inv = new_pol_inv;
2341                 val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_xgxsconfig);
2342                 val &= ~(INFINIPATH_XGXS_RX_POL_MASK <<
2343                          INFINIPATH_XGXS_RX_POL_SHIFT);
2344                 val |= ((u64)dd->ipath_rx_pol_inv) <<
2345                         INFINIPATH_XGXS_RX_POL_SHIFT;
2346                 ipath_write_kreg(dd, dd->ipath_kregs->kr_xgxsconfig, val);
2347         }
2348         return 0;
2349 }
2350 module_init(infinipath_init);
2351 module_exit(infinipath_cleanup);