drivers/infiniband/hw/ipath/ipath_intr.c

   1 /*
   2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
   3  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #include <linux/pci.h>
  35
  36 #include "ipath_kernel.h"
  37 #include "ipath_verbs.h"
  38 #include "ipath_common.h"
  39
  40 /*
  41  * clear (write) a pio buffer, to clear a parity error.   This routine
  42  * should only be called when in freeze mode, and the buffer should be
  43  * canceled afterwards.
  44  */
  45 static void ipath_clrpiobuf(struct ipath_devdata *dd, u32 pnum)
  46 {
  47         u32 __iomem *pbuf;
  48         u32 dwcnt; /* dword count to write */
  49         if (pnum < dd->ipath_piobcnt2k) {
  50                 pbuf = (u32 __iomem *) (dd->ipath_pio2kbase + pnum *
  51                         dd->ipath_palign);
  52                 dwcnt = dd->ipath_piosize2k >> 2;
  53         }
  54         else {
  55                 pbuf = (u32 __iomem *) (dd->ipath_pio4kbase +
  56                         (pnum - dd->ipath_piobcnt2k) * dd->ipath_4kalign);
  57                 dwcnt = dd->ipath_piosize4k >> 2;
  58         }
  59         dev_info(&dd->pcidev->dev,
  60                 "Rewrite PIO buffer %u, to recover from parity error\n",
  61                 pnum);
  62         *pbuf = dwcnt+1; /* no flush required, since already in freeze */
  63         while(--dwcnt)
  64                 *pbuf++ = 0;
  65 }
  66
  67 /*
  68  * Called when we might have an error that is specific to a particular
  69  * PIO buffer, and may need to cancel that buffer, so it can be re-used.
  70  * If rewrite is true, and bits are set in the sendbufferror registers,
  71  * we'll write to the buffer, for error recovery on parity errors.
  72  */
  73 static void ipath_disarm_senderrbufs(struct ipath_devdata *dd, int rewrite)
  74 {
  75         u32 piobcnt;
  76         unsigned long sbuf[4];
  77         /*
  78          * it's possible that sendbuffererror could have bits set; might
  79          * have already done this as a result of hardware error handling
  80          */
  81         piobcnt = dd->ipath_piobcnt2k + dd->ipath_piobcnt4k;
  82         /* read these before writing errorclear */
  83         sbuf[0] = ipath_read_kreg64(
  84                 dd, dd->ipath_kregs->kr_sendbuffererror);
  85         sbuf[1] = ipath_read_kreg64(
  86                 dd, dd->ipath_kregs->kr_sendbuffererror + 1);
  87         if (piobcnt > 128) {
  88                 sbuf[2] = ipath_read_kreg64(
  89                         dd, dd->ipath_kregs->kr_sendbuffererror + 2);
  90                 sbuf[3] = ipath_read_kreg64(
  91                         dd, dd->ipath_kregs->kr_sendbuffererror + 3);
  92         }
  93
  94         if (sbuf[0] || sbuf[1] || (piobcnt > 128 && (sbuf[2] || sbuf[3]))) {
  95                 int i;
  96                 if (ipath_debug & (__IPATH_PKTDBG|__IPATH_DBG) &&
  97                         dd->ipath_lastcancel > jiffies) {
  98                         __IPATH_DBG_WHICH(__IPATH_PKTDBG|__IPATH_DBG,
  99                                           "SendbufErrs %lx %lx", sbuf[0],
 100                                           sbuf[1]);
 101                         if (ipath_debug & __IPATH_PKTDBG && piobcnt > 128)
 102                                 printk(" %lx %lx ", sbuf[2], sbuf[3]);
 103                         printk("\n");
 104                 }
 105
 106                 for (i = 0; i < piobcnt; i++)
 107                         if (test_bit(i, sbuf)) {
 108                                 if (rewrite)
 109                                         ipath_clrpiobuf(dd, i);
 110                                 ipath_disarm_piobufs(dd, i, 1);
 111                         }
 112                 /* ignore armlaunch errs for a bit */
 113                 dd->ipath_lastcancel = jiffies+3;
 114         }
 115 }
 116
 117
 118 /* These are all rcv-related errors which we want to count for stats */
 119 #define E_SUM_PKTERRS \
 120         (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
 121          INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
 122          INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
 123          INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 124          INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
 125          INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
 126
 127 /* These are all send-related errors which we want to count for stats */
 128 #define E_SUM_ERRS \
 129         (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
 130          INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 131          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
 132          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 133          INFINIPATH_E_INVALIDADDR)
 134
 135 /*
 136  * this is similar to E_SUM_ERRS, but can't ignore armlaunch, don't ignore
 137  * errors not related to freeze and cancelling buffers.  Can't ignore
 138  * armlaunch because could get more while still cleaning up, and need
 139  * to cancel those as they happen.
 140  */
 141 #define E_SPKT_ERRS_IGNORE \
 142          (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 143          INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SMINPKTLEN | \
 144          INFINIPATH_E_SPKTLEN)
 145
 146 /*
 147  * these are errors that can occur when the link changes state while
 148  * a packet is being sent or received.  This doesn't cover things
 149  * like EBP or VCRC that can be the result of a sending having the
 150  * link change state, so we receive a "known bad" packet.
 151  */
 152 #define E_SUM_LINK_PKTERRS \
 153         (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
 154          INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
 155          INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
 156          INFINIPATH_E_RUNEXPCHAR)
 157
 158 static u64 handle_e_sum_errs(struct ipath_devdata *dd, ipath_err_t errs)
 159 {
 160         u64 ignore_this_time = 0;
 161
 162         ipath_disarm_senderrbufs(dd, 0);
 163         if ((errs & E_SUM_LINK_PKTERRS) &&
 164             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 165                 /*
 166                  * This can happen when SMA is trying to bring the link
 167                  * up, but the IB link changes state at the "wrong" time.
 168                  * The IB logic then complains that the packet isn't
 169                  * valid.  We don't want to confuse people, so we just
 170                  * don't print them, except at debug
 171                  */
 172                 ipath_dbg("Ignoring packet errors %llx, because link not "
 173                           "ACTIVE\n", (unsigned long long) errs);
 174                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 175         }
 176
 177         return ignore_this_time;
 178 }
 179
 180 /* generic hw error messages... */
 181 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
 182         { \
 183                 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a <<    \
 184                           INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ),   \
 185                 .msg = "TXE " #a " Memory Parity"            \
 186         }
 187 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
 188         { \
 189                 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a <<    \
 190                           INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ),   \
 191                 .msg = "RXE " #a " Memory Parity"            \
 192         }
 193
 194 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs[] = {
 195         INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR, "IPATH2IB Parity"),
 196         INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR, "IB2IPATH Parity"),
 197
 198         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF),
 199         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC),
 200         INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO),
 201
 202         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF),
 203         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ),
 204         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID),
 205         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID),
 206         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF),
 207         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO),
 208         INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO),
 209 };
 210
 211 /**
 212  * ipath_format_hwmsg - format a single hwerror message
 213  * @msg message buffer
 214  * @msgl length of message buffer
 215  * @hwmsg message to add to message buffer
 216  */
 217 static void ipath_format_hwmsg(char *msg, size_t msgl, const char *hwmsg)
 218 {
 219         strlcat(msg, "[", msgl);
 220         strlcat(msg, hwmsg, msgl);
 221         strlcat(msg, "]", msgl);
 222 }
 223
 224 /**
 225  * ipath_format_hwerrors - format hardware error messages for display
 226  * @hwerrs hardware errors bit vector
 227  * @hwerrmsgs hardware error descriptions
 228  * @nhwerrmsgs number of hwerrmsgs
 229  * @msg message buffer
 230  * @msgl message buffer length
 231  */
 232 void ipath_format_hwerrors(u64 hwerrs,
 233                            const struct ipath_hwerror_msgs *hwerrmsgs,
 234                            size_t nhwerrmsgs,
 235                            char *msg, size_t msgl)
 236 {
 237         int i;
 238         const int glen =
 239             sizeof(ipath_generic_hwerror_msgs) /
 240             sizeof(ipath_generic_hwerror_msgs[0]);
 241
 242         for (i=0; i<glen; i++) {
 243                 if (hwerrs & ipath_generic_hwerror_msgs[i].mask) {
 244                         ipath_format_hwmsg(msg, msgl,
 245                                            ipath_generic_hwerror_msgs[i].msg);
 246                 }
 247         }
 248
 249         for (i=0; i<nhwerrmsgs; i++) {
 250                 if (hwerrs & hwerrmsgs[i].mask) {
 251                         ipath_format_hwmsg(msg, msgl, hwerrmsgs[i].msg);
 252                 }
 253         }
 254 }
 255
 256 /* return the strings for the most common link states */
 257 static char *ib_linkstate(u32 linkstate)
 258 {
 259         char *ret;
 260
 261         switch (linkstate) {
 262         case IPATH_IBSTATE_INIT:
 263                 ret = "Init";
 264                 break;
 265         case IPATH_IBSTATE_ARM:
 266                 ret = "Arm";
 267                 break;
 268         case IPATH_IBSTATE_ACTIVE:
 269                 ret = "Active";
 270                 break;
 271         default:
 272                 ret = "Down";
 273         }
 274
 275         return ret;
 276 }
 277
 278 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev)
 279 {
 280         struct ib_event event;
 281
 282         event.device = &dd->verbs_dev->ibdev;
 283         event.element.port_num = 1;
 284         event.event = ev;
 285         ib_dispatch_event(&event);
 286 }
 287
 288 static void handle_e_ibstatuschanged(struct ipath_devdata *dd,
 289                                      ipath_err_t errs, int noprint)
 290 {
 291         u64 val;
 292         u32 ltstate, lstate;
 293
 294         /*
 295          * even if diags are enabled, we want to notice LINKINIT, etc.
 296          * We just don't want to change the LED state, or
 297          * dd->ipath_kregs->kr_ibcctrl
 298          */
 299         val = ipath_read_kreg64(dd, dd->ipath_kregs->kr_ibcstatus);
 300         lstate = val & IPATH_IBSTATE_MASK;
 301
 302         /*
 303          * this is confusing enough when it happens that I want to always put it
 304          * on the console and in the logs.  If it was a requested state change,
 305          * we'll have already cleared the flags, so we won't print this warning
 306          */
 307         if ((lstate != IPATH_IBSTATE_ARM && lstate != IPATH_IBSTATE_ACTIVE)
 308                 && (dd->ipath_flags & (IPATH_LINKARMED | IPATH_LINKACTIVE))) {
 309                 dev_info(&dd->pcidev->dev, "Link state changed from %s to %s\n",
 310                                  (dd->ipath_flags & IPATH_LINKARMED) ? "ARM" : "ACTIVE",
 311                                  ib_linkstate(lstate));
 312                 /*
 313                  * Flush all queued sends when link went to DOWN or INIT,
 314                  * to be sure that they don't block SMA and other MAD packets
 315                  */
 316                 ipath_cancel_sends(dd, 1);
 317         }
 318         else if (lstate == IPATH_IBSTATE_INIT || lstate == IPATH_IBSTATE_ARM ||
 319             lstate == IPATH_IBSTATE_ACTIVE) {
 320                 /*
 321                  * only print at SMA if there is a change, debug if not
 322                  * (sometimes we want to know that, usually not).
 323                  */
 324                 if (lstate == ((unsigned) dd->ipath_lastibcstat
 325                                & IPATH_IBSTATE_MASK)) {
 326                         ipath_dbg("Status change intr but no change (%s)\n",
 327                                   ib_linkstate(lstate));
 328                 }
 329                 else
 330                         ipath_cdbg(VERBOSE, "Unit %u link state %s, last "
 331                                    "was %s\n", dd->ipath_unit,
 332                                    ib_linkstate(lstate),
 333                                    ib_linkstate((unsigned)
 334                                                 dd->ipath_lastibcstat
 335                                                 & IPATH_IBSTATE_MASK));
 336         }
 337         else {
 338                 lstate = dd->ipath_lastibcstat & IPATH_IBSTATE_MASK;
 339                 if (lstate == IPATH_IBSTATE_INIT ||
 340                     lstate == IPATH_IBSTATE_ARM ||
 341                     lstate == IPATH_IBSTATE_ACTIVE)
 342                         ipath_cdbg(VERBOSE, "Unit %u link state down"
 343                                    " (state 0x%x), from %s\n",
 344                                    dd->ipath_unit,
 345                                    (u32)val & IPATH_IBSTATE_MASK,
 346                                    ib_linkstate(lstate));
 347                 else
 348                         ipath_cdbg(VERBOSE, "Unit %u link state changed "
 349                                    "to 0x%x from down (%x)\n",
 350                                    dd->ipath_unit, (u32) val, lstate);
 351         }
 352         ltstate = (val >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
 353                 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 354         lstate = (val >> INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 355                 INFINIPATH_IBCS_LINKSTATE_MASK;
 356
 357         if (ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE ||
 358             ltstate == INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 359                 u32 last_ltstate;
 360
 361                 /*
 362                  * Ignore cycling back and forth from Polling.Active
 363                  * to Polling.Quiet while waiting for the other end of
 364                  * the link to come up. We will cycle back and forth
 365                  * between them if no cable is plugged in,
 366                  * the other device is powered off or disabled, etc.
 367                  */
 368                 last_ltstate = (dd->ipath_lastibcstat >>
 369                                 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT)
 370                         & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK;
 371                 if (last_ltstate == INFINIPATH_IBCS_LT_STATE_POLLACTIVE
 372                     || last_ltstate ==
 373                     INFINIPATH_IBCS_LT_STATE_POLLQUIET) {
 374                         if (dd->ipath_ibpollcnt > 40) {
 375                                 dd->ipath_flags |= IPATH_NOCABLE;
 376                                 *dd->ipath_statusp |=
 377                                         IPATH_STATUS_IB_NOCABLE;
 378                         } else
 379                                 dd->ipath_ibpollcnt++;
 380                         goto skip_ibchange;
 381                 }
 382         }
 383         dd->ipath_ibpollcnt = 0;        /* some state other than 2 or 3 */
 384         ipath_stats.sps_iblink++;
 385         if (ltstate != INFINIPATH_IBCS_LT_STATE_LINKUP) {
 386                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 387                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 388                 dd->ipath_flags |= IPATH_LINKDOWN;
 389                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 390                                      | IPATH_LINKACTIVE |
 391                                      IPATH_LINKARMED);
 392                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 393                 dd->ipath_lli_counter = 0;
 394                 if (!noprint) {
 395                         if (((dd->ipath_lastibcstat >>
 396                               INFINIPATH_IBCS_LINKSTATE_SHIFT) &
 397                              INFINIPATH_IBCS_LINKSTATE_MASK)
 398                             == INFINIPATH_IBCS_L_STATE_ACTIVE)
 399                                 /* if from up to down be more vocal */
 400                                 ipath_cdbg(VERBOSE,
 401                                            "Unit %u link now down (%s)\n",
 402                                            dd->ipath_unit,
 403                                            ipath_ibcstatus_str[ltstate]);
 404                         else
 405                                 ipath_cdbg(VERBOSE, "Unit %u link is "
 406                                            "down (%s)\n", dd->ipath_unit,
 407                                            ipath_ibcstatus_str[ltstate]);
 408                 }
 409
 410                 dd->ipath_f_setextled(dd, lstate, ltstate);
 411         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ACTIVE) {
 412                 dd->ipath_flags |= IPATH_LINKACTIVE;
 413                 dd->ipath_flags &=
 414                         ~(IPATH_LINKUNK | IPATH_LINKINIT | IPATH_LINKDOWN |
 415                           IPATH_LINKARMED | IPATH_NOCABLE);
 416                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_NOCABLE;
 417                 *dd->ipath_statusp |=
 418                         IPATH_STATUS_IB_READY | IPATH_STATUS_IB_CONF;
 419                 dd->ipath_f_setextled(dd, lstate, ltstate);
 420                 signal_ib_event(dd, IB_EVENT_PORT_ACTIVE);
 421         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_INIT) {
 422                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 423                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 424                 /*
 425                  * set INIT and DOWN.  Down is checked by most of the other
 426                  * code, but INIT is useful to know in a few places.
 427                  */
 428                 dd->ipath_flags |= IPATH_LINKINIT | IPATH_LINKDOWN;
 429                 dd->ipath_flags &=
 430                         ~(IPATH_LINKUNK | IPATH_LINKACTIVE | IPATH_LINKARMED
 431                           | IPATH_NOCABLE);
 432                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 433                                         | IPATH_STATUS_IB_READY);
 434                 dd->ipath_f_setextled(dd, lstate, ltstate);
 435         } else if ((val & IPATH_IBSTATE_MASK) == IPATH_IBSTATE_ARM) {
 436                 if (dd->ipath_flags & IPATH_LINKACTIVE)
 437                         signal_ib_event(dd, IB_EVENT_PORT_ERR);
 438                 dd->ipath_flags |= IPATH_LINKARMED;
 439                 dd->ipath_flags &=
 440                         ~(IPATH_LINKUNK | IPATH_LINKDOWN | IPATH_LINKINIT |
 441                           IPATH_LINKACTIVE | IPATH_NOCABLE);
 442                 *dd->ipath_statusp &= ~(IPATH_STATUS_IB_NOCABLE
 443                                         | IPATH_STATUS_IB_READY);
 444                 dd->ipath_f_setextled(dd, lstate, ltstate);
 445         } else {
 446                 if (!noprint)
 447                         ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
 448                                   dd->ipath_unit,
 449                                   ipath_ibcstatus_str[ltstate], ltstate);
 450         }
 451 skip_ibchange:
 452         dd->ipath_lastibcstat = val;
 453 }
 454
 455 static void handle_supp_msgs(struct ipath_devdata *dd,
 456                              unsigned supp_msgs, char *msg, int msgsz)
 457 {
 458         /*
 459          * Print the message unless it's ibc status change only, which
 460          * happens so often we never want to count it.
 461          */
 462         if (dd->ipath_lasterror & ~INFINIPATH_E_IBSTATUSCHANGED) {
 463                 int iserr;
 464                 iserr = ipath_decode_err(msg, msgsz,
 465                                          dd->ipath_lasterror &
 466                                          ~INFINIPATH_E_IBSTATUSCHANGED);
 467                 if (dd->ipath_lasterror &
 468                         ~(INFINIPATH_E_RRCVEGRFULL |
 469                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 470                         ipath_dev_err(dd, "Suppressed %u messages for "
 471                                       "fast-repeating errors (%s) (%llx)\n",
 472                                       supp_msgs, msg,
 473                                       (unsigned long long)
 474                                       dd->ipath_lasterror);
 475                 else {
 476                         /*
 477                          * rcvegrfull and rcvhdrqfull are "normal", for some
 478                          * types of processes (mostly benchmarks) that send
 479                          * huge numbers of messages, while not processing
 480                          * them. So only complain about these at debug
 481                          * level.
 482                          */
 483                         if (iserr)
 484                                 ipath_dbg("Suppressed %u messages for %s\n",
 485                                           supp_msgs, msg);
 486                         else
 487                                 ipath_cdbg(ERRPKT,
 488                                         "Suppressed %u messages for %s\n",
 489                                           supp_msgs, msg);
 490                 }
 491         }
 492 }
 493
 494 static unsigned handle_frequent_errors(struct ipath_devdata *dd,
 495                                        ipath_err_t errs, char *msg,
 496                                        int msgsz, int *noprint)
 497 {
 498         unsigned long nc;
 499         static unsigned long nextmsg_time;
 500         static unsigned nmsgs, supp_msgs;
 501
 502         /*
 503          * Throttle back "fast" messages to no more than 10 per 5 seconds.
 504          * This isn't perfect, but it's a reasonable heuristic. If we get
 505          * more than 10, give a 6x longer delay.
 506          */
 507         nc = jiffies;
 508         if (nmsgs > 10) {
 509                 if (time_before(nc, nextmsg_time)) {
 510                         *noprint = 1;
 511                         if (!supp_msgs++)
 512                                 nextmsg_time = nc + HZ * 3;
 513                 }
 514                 else if (supp_msgs) {
 515                         handle_supp_msgs(dd, supp_msgs, msg, msgsz);
 516                         supp_msgs = 0;
 517                         nmsgs = 0;
 518                 }
 519         }
 520         else if (!nmsgs++ || time_after(nc, nextmsg_time))
 521                 nextmsg_time = nc + HZ / 2;
 522
 523         return supp_msgs;
 524 }
 525
 526 static int handle_errors(struct ipath_devdata *dd, ipath_err_t errs)
 527 {
 528         char msg[128];
 529         u64 ignore_this_time = 0;
 530         int i, iserr = 0;
 531         int chkerrpkts = 0, noprint = 0;
 532         unsigned supp_msgs;
 533         int log_idx;
 534
 535         supp_msgs = handle_frequent_errors(dd, errs, msg, sizeof msg, &noprint);
 536
 537         /* don't report errors that are masked */
 538         errs &= ~dd->ipath_maskederrs;
 539
 540         /* do these first, they are most important */
 541         if (errs & INFINIPATH_E_HARDWARE) {
 542                 /* reuse same msg buf */
 543                 dd->ipath_f_handle_hwerrors(dd, msg, sizeof msg);
 544         } else {
 545                 u64 mask;
 546                 for (log_idx = 0; log_idx < IPATH_EEP_LOG_CNT; ++log_idx) {
 547                         mask = dd->ipath_eep_st_masks[log_idx].errs_to_log;
 548                         if (errs & mask)
 549                                 ipath_inc_eeprom_err(dd, log_idx, 1);
 550                 }
 551         }
 552
 553         if (!noprint && (errs & ~dd->ipath_e_bitsextant))
 554                 ipath_dev_err(dd, "error interrupt with unknown errors "
 555                               "%llx set\n", (unsigned long long)
 556                               (errs & ~dd->ipath_e_bitsextant));
 557
 558         if (errs & E_SUM_ERRS)
 559                 ignore_this_time = handle_e_sum_errs(dd, errs);
 560         else if ((errs & E_SUM_LINK_PKTERRS) &&
 561             !(dd->ipath_flags & IPATH_LINKACTIVE)) {
 562                 /*
 563                  * This can happen when SMA is trying to bring the link
 564                  * up, but the IB link changes state at the "wrong" time.
 565                  * The IB logic then complains that the packet isn't
 566                  * valid.  We don't want to confuse people, so we just
 567                  * don't print them, except at debug
 568                  */
 569                 ipath_dbg("Ignoring packet errors %llx, because link not "
 570                           "ACTIVE\n", (unsigned long long) errs);
 571                 ignore_this_time = errs & E_SUM_LINK_PKTERRS;
 572         }
 573
 574         if (supp_msgs == 250000) {
 575                 int s_iserr;
 576                 /*
 577                  * It's not entirely reasonable assuming that the errors set
 578                  * in the last clear period are all responsible for the
 579                  * problem, but the alternative is to assume it's the only
 580                  * ones on this particular interrupt, which also isn't great
 581                  */
 582                 dd->ipath_maskederrs |= dd->ipath_lasterror | errs;
 583                 dd->ipath_errormask &= ~dd->ipath_maskederrs;
 584                 ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 585                         dd->ipath_errormask);
 586                 s_iserr = ipath_decode_err(msg, sizeof msg,
 587                         dd->ipath_maskederrs);
 588
 589                 if (dd->ipath_maskederrs &
 590                         ~(INFINIPATH_E_RRCVEGRFULL |
 591                         INFINIPATH_E_RRCVHDRFULL | INFINIPATH_E_PKTERRS))
 592                         ipath_dev_err(dd, "Temporarily disabling "
 593                             "error(s) %llx reporting; too frequent (%s)\n",
 594                                 (unsigned long long)dd->ipath_maskederrs,
 595                                 msg);
 596                 else {
 597                         /*
 598                          * rcvegrfull and rcvhdrqfull are "normal",
 599                          * for some types of processes (mostly benchmarks)
 600                          * that send huge numbers of messages, while not
 601                          * processing them.  So only complain about
 602                          * these at debug level.
 603                          */
 604                         if (s_iserr)
 605                                 ipath_dbg("Temporarily disabling reporting "
 606                                     "too frequent queue full errors (%s)\n",
 607                                     msg);
 608                         else
 609                                 ipath_cdbg(ERRPKT,
 610                                     "Temporarily disabling reporting too"
 611                                     " frequent packet errors (%s)\n",
 612                                     msg);
 613                 }
 614
 615                 /*
 616                  * Re-enable the masked errors after around 3 minutes.  in
 617                  * ipath_get_faststats().  If we have a series of fast
 618                  * repeating but different errors, the interval will keep
 619                  * stretching out, but that's OK, as that's pretty
 620                  * catastrophic.
 621                  */
 622                 dd->ipath_unmasktime = jiffies + HZ * 180;
 623         }
 624
 625         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear, errs);
 626         if (ignore_this_time)
 627                 errs &= ~ignore_this_time;
 628         if (errs & ~dd->ipath_lasterror) {
 629                 errs &= ~dd->ipath_lasterror;
 630                 /* never suppress duplicate hwerrors or ibstatuschange */
 631                 dd->ipath_lasterror |= errs &
 632                         ~(INFINIPATH_E_HARDWARE |
 633                           INFINIPATH_E_IBSTATUSCHANGED);
 634         }
 635
 636         /* likely due to cancel, so suppress */
 637         if ((errs & (INFINIPATH_E_SPKTLEN | INFINIPATH_E_SPIOARMLAUNCH)) &&
 638                 dd->ipath_lastcancel > jiffies) {
 639                 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
 640                 errs &= ~(INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SPKTLEN);
 641         }
 642
 643         if (!errs)
 644                 return 0;
 645
 646         if (!noprint)
 647                 /*
 648                  * the ones we mask off are handled specially below or above
 649                  */
 650                 ipath_decode_err(msg, sizeof msg,
 651                                  errs & ~(INFINIPATH_E_IBSTATUSCHANGED |
 652                                           INFINIPATH_E_RRCVEGRFULL |
 653                                           INFINIPATH_E_RRCVHDRFULL |
 654                                           INFINIPATH_E_HARDWARE));
 655         else
 656                 /* so we don't need if (!noprint) at strlcat's below */
 657                 *msg = 0;
 658
 659         if (errs & E_SUM_PKTERRS) {
 660                 ipath_stats.sps_pkterrs++;
 661                 chkerrpkts = 1;
 662         }
 663         if (errs & E_SUM_ERRS)
 664                 ipath_stats.sps_errs++;
 665
 666         if (errs & (INFINIPATH_E_RICRC | INFINIPATH_E_RVCRC)) {
 667                 ipath_stats.sps_crcerrs++;
 668                 chkerrpkts = 1;
 669         }
 670         iserr = errs & ~(E_SUM_PKTERRS | INFINIPATH_E_PKTERRS);
 671
 672
 673         /*
 674          * We don't want to print these two as they happen, or we can make
 675          * the situation even worse, because it takes so long to print
 676          * messages to serial consoles.  Kernel ports get printed from
 677          * fast_stats, no more than every 5 seconds, user ports get printed
 678          * on close
 679          */
 680         if (errs & INFINIPATH_E_RRCVHDRFULL) {
 681                 u32 hd, tl;
 682                 ipath_stats.sps_hdrqfull++;
 683                 for (i = 0; i < dd->ipath_cfgports; i++) {
 684                         struct ipath_portdata *pd = dd->ipath_pd[i];
 685                         if (i == 0) {
 686                                 hd = dd->ipath_port0head;
 687                                 tl = (u32) le64_to_cpu(
 688                                         *dd->ipath_hdrqtailptr);
 689                         } else if (pd && pd->port_cnt &&
 690                                    pd->port_rcvhdrtail_kvaddr) {
 691                                 /*
 692                                  * don't report same point multiple times,
 693                                  * except kernel
 694                                  */
 695                                 tl = *(u64 *) pd->port_rcvhdrtail_kvaddr;
 696                                 if (tl == dd->ipath_lastrcvhdrqtails[i])
 697                                         continue;
 698                                 hd = ipath_read_ureg32(dd, ur_rcvhdrhead,
 699                                                        i);
 700                         } else
 701                                 continue;
 702                         if (hd == (tl + 1) ||
 703                             (!hd && tl == dd->ipath_hdrqlast)) {
 704                                 if (i == 0)
 705                                         chkerrpkts = 1;
 706                                 dd->ipath_lastrcvhdrqtails[i] = tl;
 707                                 pd->port_hdrqfull++;
 708                                 /* flush hdrqfull so that poll() sees it */
 709                                 wmb();
 710                                 wake_up_interruptible(&pd->port_wait);
 711                         }
 712                 }
 713         }
 714         if (errs & INFINIPATH_E_RRCVEGRFULL) {
 715                 /*
 716                  * since this is of less importance and not likely to
 717                  * happen without also getting hdrfull, only count
 718                  * occurrences; don't check each port (or even the kernel
 719                  * vs user)
 720                  */
 721                 ipath_stats.sps_etidfull++;
 722                 if (dd->ipath_port0head !=
 723                     (u32) le64_to_cpu(*dd->ipath_hdrqtailptr))
 724                         chkerrpkts = 1;
 725         }
 726
 727         /*
 728          * do this before IBSTATUSCHANGED, in case both bits set in a single
 729          * interrupt; we want the STATUSCHANGE to "win", so we do our
 730          * internal copy of state machine correctly
 731          */
 732         if (errs & INFINIPATH_E_RIBLOSTLINK) {
 733                 /*
 734                  * force through block below
 735                  */
 736                 errs |= INFINIPATH_E_IBSTATUSCHANGED;
 737                 ipath_stats.sps_iblink++;
 738                 dd->ipath_flags |= IPATH_LINKDOWN;
 739                 dd->ipath_flags &= ~(IPATH_LINKUNK | IPATH_LINKINIT
 740                                      | IPATH_LINKARMED | IPATH_LINKACTIVE);
 741                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_READY;
 742                 if (!noprint) {
 743                         u64 st = ipath_read_kreg64(
 744                                 dd, dd->ipath_kregs->kr_ibcstatus);
 745
 746                         ipath_dbg("Lost link, link now down (%s)\n",
 747                                   ipath_ibcstatus_str[st & 0xf]);
 748                 }
 749         }
 750         if (errs & INFINIPATH_E_IBSTATUSCHANGED)
 751                 handle_e_ibstatuschanged(dd, errs, noprint);
 752
 753         if (errs & INFINIPATH_E_RESET) {
 754                 if (!noprint)
 755                         ipath_dev_err(dd, "Got reset, requires re-init "
 756                                       "(unload and reload driver)\n");
 757                 dd->ipath_flags &= ~IPATH_INITTED;      /* needs re-init */
 758                 /* mark as having had error */
 759                 *dd->ipath_statusp |= IPATH_STATUS_HWERROR;
 760                 *dd->ipath_statusp &= ~IPATH_STATUS_IB_CONF;
 761         }
 762
 763         if (!noprint && *msg) {
 764                 if (iserr)
 765                         ipath_dev_err(dd, "%s error\n", msg);
 766                 else
 767                         dev_info(&dd->pcidev->dev, "%s packet problems\n",
 768                                 msg);
 769         }
 770         if (dd->ipath_state_wanted & dd->ipath_flags) {
 771                 ipath_cdbg(VERBOSE, "driver wanted state %x, iflags now %x, "
 772                            "waking\n", dd->ipath_state_wanted,
 773                            dd->ipath_flags);
 774                 wake_up_interruptible(&ipath_state_wait);
 775         }
 776
 777         return chkerrpkts;
 778 }
 779
 780
 781 /*
 782  * try to cleanup as much as possible for anything that might have gone
 783  * wrong while in freeze mode, such as pio buffers being written by user
 784  * processes (causing armlaunch), send errors due to going into freeze mode,
 785  * etc., and try to avoid causing extra interrupts while doing so.
 786  * Forcibly update the in-memory pioavail register copies after cleanup
 787  * because the chip won't do it for anything changing while in freeze mode
 788  * (we don't want to wait for the next pio buffer state change).
 789  * Make sure that we don't lose any important interrupts by using the chip
 790  * feature that says that writing 0 to a bit in *clear that is set in
 791  * *status will cause an interrupt to be generated again (if allowed by
 792  * the *mask value).
 793  */
 794 void ipath_clear_freeze(struct ipath_devdata *dd)
 795 {
 796         int i, im;
 797         __le64 val;
 798
 799         /* disable error interrupts, to avoid confusion */
 800         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask, 0ULL);
 801
 802         /* also disable interrupts; errormask is sometimes overwriten */
 803         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 804
 805         /*
 806          * clear all sends, because they have may been
 807          * completed by usercode while in freeze mode, and
 808          * therefore would not be sent, and eventually
 809          * might cause the process to run out of bufs
 810          */
 811         ipath_cancel_sends(dd, 0);
 812         ipath_write_kreg(dd, dd->ipath_kregs->kr_control,
 813                          dd->ipath_control);
 814
 815         /* ensure pio avail updates continue */
 816         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 817                  dd->ipath_sendctrl & ~INFINIPATH_S_PIOBUFAVAILUPD);
 818         ipath_read_kreg64(dd, dd->ipath_kregs->kr_scratch);
 819         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 820                  dd->ipath_sendctrl);
 821
 822         /*
 823          * We just enabled pioavailupdate, so dma copy is almost certainly
 824          * not yet right, so read the registers directly.  Similar to init
 825          */
 826         for (i = 0; i < dd->ipath_pioavregs; i++) {
 827                 /* deal with 6110 chip bug */
 828                 im = i > 3 ? ((i&1) ? i-1 : i+1) : i;
 829                 val = ipath_read_kreg64(dd, (0x1000/sizeof(u64))+im);
 830                 dd->ipath_pioavailregs_dma[i] = dd->ipath_pioavailshadow[i]
 831                         = le64_to_cpu(val);
 832         }
 833
 834         /*
 835          * force new interrupt if any hwerr, error or interrupt bits are
 836          * still set, and clear "safe" send packet errors related to freeze
 837          * and cancelling sends.  Re-enable error interrupts before possible
 838          * force of re-interrupt on pending interrupts.
 839          */
 840         ipath_write_kreg(dd, dd->ipath_kregs->kr_hwerrclear, 0ULL);
 841         ipath_write_kreg(dd, dd->ipath_kregs->kr_errorclear,
 842                 E_SPKT_ERRS_IGNORE);
 843         ipath_write_kreg(dd, dd->ipath_kregs->kr_errormask,
 844                 dd->ipath_errormask);
 845         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, -1LL);
 846         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, 0ULL);
 847 }
 848
 849
 850 /* this is separate to allow for better optimization of ipath_intr() */
 851
 852 static noinline void ipath_bad_intr(struct ipath_devdata *dd, u32 *unexpectp)
 853 {
 854         /*
 855          * sometimes happen during driver init and unload, don't want
 856          * to process any interrupts at that point
 857          */
 858
 859         /* this is just a bandaid, not a fix, if something goes badly
 860          * wrong */
 861         if (++*unexpectp > 100) {
 862                 if (++*unexpectp > 105) {
 863                         /*
 864                          * ok, we must be taking somebody else's interrupts,
 865                          * due to a messed up mptable and/or PIRQ table, so
 866                          * unregister the interrupt.  We've seen this during
 867                          * linuxbios development work, and it may happen in
 868                          * the future again.
 869                          */
 870                         if (dd->pcidev && dd->ipath_irq) {
 871                                 ipath_dev_err(dd, "Now %u unexpected "
 872                                               "interrupts, unregistering "
 873                                               "interrupt handler\n",
 874                                               *unexpectp);
 875                                 ipath_dbg("free_irq of irq %d\n",
 876                                           dd->ipath_irq);
 877                                 dd->ipath_f_free_irq(dd);
 878                         }
 879                 }
 880                 if (ipath_read_kreg32(dd, dd->ipath_kregs->kr_intmask)) {
 881                         ipath_dev_err(dd, "%u unexpected interrupts, "
 882                                       "disabling interrupts completely\n",
 883                                       *unexpectp);
 884                         /*
 885                          * disable all interrupts, something is very wrong
 886                          */
 887                         ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask,
 888                                          0ULL);
 889                 }
 890         } else if (*unexpectp > 1)
 891                 ipath_dbg("Interrupt when not ready, should not happen, "
 892                           "ignoring\n");
 893 }
 894
 895 static noinline void ipath_bad_regread(struct ipath_devdata *dd)
 896 {
 897         static int allbits;
 898
 899         /* separate routine, for better optimization of ipath_intr() */
 900
 901         /*
 902          * We print the message and disable interrupts, in hope of
 903          * having a better chance of debugging the problem.
 904          */
 905         ipath_dev_err(dd,
 906                       "Read of interrupt status failed (all bits set)\n");
 907         if (allbits++) {
 908                 /* disable all interrupts, something is very wrong */
 909                 ipath_write_kreg(dd, dd->ipath_kregs->kr_intmask, 0ULL);
 910                 if (allbits == 2) {
 911                         ipath_dev_err(dd, "Still bad interrupt status, "
 912                                       "unregistering interrupt\n");
 913                         dd->ipath_f_free_irq(dd);
 914                 } else if (allbits > 2) {
 915                         if ((allbits % 10000) == 0)
 916                                 printk(".");
 917                 } else
 918                         ipath_dev_err(dd, "Disabling interrupts, "
 919                                       "multiple errors\n");
 920         }
 921 }
 922
 923 static void handle_port_pioavail(struct ipath_devdata *dd)
 924 {
 925         u32 i;
 926         /*
 927          * start from port 1, since for now port 0  is never using
 928          * wait_event for PIO
 929          */
 930         for (i = 1; dd->ipath_portpiowait && i < dd->ipath_cfgports; i++) {
 931                 struct ipath_portdata *pd = dd->ipath_pd[i];
 932
 933                 if (pd && pd->port_cnt &&
 934                     dd->ipath_portpiowait & (1U << i)) {
 935                         clear_bit(i, &dd->ipath_portpiowait);
 936                         if (test_bit(IPATH_PORT_WAITING_PIO,
 937                                      &pd->port_flag)) {
 938                                 clear_bit(IPATH_PORT_WAITING_PIO,
 939                                           &pd->port_flag);
 940                                 wake_up_interruptible(&pd->port_wait);
 941                         }
 942                 }
 943         }
 944 }
 945
 946 static void handle_layer_pioavail(struct ipath_devdata *dd)
 947 {
 948         int ret;
 949
 950         ret = ipath_ib_piobufavail(dd->verbs_dev);
 951         if (ret > 0)
 952                 goto set;
 953
 954         return;
 955 set:
 956         set_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
 957         ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
 958                          dd->ipath_sendctrl);
 959 }
 960
 961 /*
 962  * Handle receive interrupts for user ports; this means a user
 963  * process was waiting for a packet to arrive, and didn't want
 964  * to poll
 965  */
 966 static void handle_urcv(struct ipath_devdata *dd, u32 istat)
 967 {
 968         u64 portr;
 969         int i;
 970         int rcvdint = 0;
 971
 972         /* test_bit below needs this... */
 973         rmb();
 974         portr = ((istat >> INFINIPATH_I_RCVAVAIL_SHIFT) &
 975                  dd->ipath_i_rcvavail_mask)
 976                 | ((istat >> INFINIPATH_I_RCVURG_SHIFT) &
 977                    dd->ipath_i_rcvurg_mask);
 978         for (i = 1; i < dd->ipath_cfgports; i++) {
 979                 struct ipath_portdata *pd = dd->ipath_pd[i];
 980                 if (portr & (1 << i) && pd && pd->port_cnt) {
 981                         if (test_and_clear_bit(IPATH_PORT_WAITING_RCV,
 982                                                &pd->port_flag)) {
 983                                 clear_bit(i + INFINIPATH_R_INTRAVAIL_SHIFT,
 984                                           &dd->ipath_rcvctrl);
 985                                 wake_up_interruptible(&pd->port_wait);
 986                                 rcvdint = 1;
 987                         } else if (test_and_clear_bit(IPATH_PORT_WAITING_URG,
 988                                                       &pd->port_flag)) {
 989                                 pd->port_urgent++;
 990                                 wake_up_interruptible(&pd->port_wait);
 991                         }
 992                 }
 993         }
 994         if (rcvdint) {
 995                 /* only want to take one interrupt, so turn off the rcv
 996                  * interrupt for all the ports that we did the wakeup on
 997                  * (but never for kernel port)
 998                  */
 999                 ipath_write_kreg(dd, dd->ipath_kregs->kr_rcvctrl,
1000                                  dd->ipath_rcvctrl);
1001         }
1002 }
1003
1004 irqreturn_t ipath_intr(int irq, void *data)
1005 {
1006         struct ipath_devdata *dd = data;
1007         u32 istat, chk0rcv = 0;
1008         ipath_err_t estat = 0;
1009         irqreturn_t ret;
1010         static unsigned unexpected = 0;
1011         static const u32 port0rbits = (1U<<INFINIPATH_I_RCVAVAIL_SHIFT) |
1012                  (1U<<INFINIPATH_I_RCVURG_SHIFT);
1013
1014         ipath_stats.sps_ints++;
1015
1016         if (dd->ipath_int_counter != (u32) -1)
1017                 dd->ipath_int_counter++;
1018
1019         if (!(dd->ipath_flags & IPATH_PRESENT)) {
1020                 /*
1021                  * This return value is not great, but we do not want the
1022                  * interrupt core code to remove our interrupt handler
1023                  * because we don't appear to be handling an interrupt
1024                  * during a chip reset.
1025                  */
1026                 return IRQ_HANDLED;
1027         }
1028
1029         /*
1030          * this needs to be flags&initted, not statusp, so we keep
1031          * taking interrupts even after link goes down, etc.
1032          * Also, we *must* clear the interrupt at some point, or we won't
1033          * take it again, which can be real bad for errors, etc...
1034          */
1035
1036         if (!(dd->ipath_flags & IPATH_INITTED)) {
1037                 ipath_bad_intr(dd, &unexpected);
1038                 ret = IRQ_NONE;
1039                 goto bail;
1040         }
1041
1042         istat = ipath_read_kreg32(dd, dd->ipath_kregs->kr_intstatus);
1043
1044         if (unlikely(!istat)) {
1045                 ipath_stats.sps_nullintr++;
1046                 ret = IRQ_NONE; /* not our interrupt, or already handled */
1047                 goto bail;
1048         }
1049         if (unlikely(istat == -1)) {
1050                 ipath_bad_regread(dd);
1051                 /* don't know if it was our interrupt or not */
1052                 ret = IRQ_NONE;
1053                 goto bail;
1054         }
1055
1056         if (unexpected)
1057                 unexpected = 0;
1058
1059         if (unlikely(istat & ~dd->ipath_i_bitsextant))
1060                 ipath_dev_err(dd,
1061                               "interrupt with unknown interrupts %x set\n",
1062                               istat & (u32) ~ dd->ipath_i_bitsextant);
1063         else
1064                 ipath_cdbg(VERBOSE, "intr stat=0x%x\n", istat);
1065
1066         if (unlikely(istat & INFINIPATH_I_ERROR)) {
1067                 ipath_stats.sps_errints++;
1068                 estat = ipath_read_kreg64(dd,
1069                                           dd->ipath_kregs->kr_errorstatus);
1070                 if (!estat)
1071                         dev_info(&dd->pcidev->dev, "error interrupt (%x), "
1072                                  "but no error bits set!\n", istat);
1073                 else if (estat == -1LL)
1074                         /*
1075                          * should we try clearing all, or hope next read
1076                          * works?
1077                          */
1078                         ipath_dev_err(dd, "Read of error status failed "
1079                                       "(all bits set); ignoring\n");
1080                 else
1081                         if (handle_errors(dd, estat))
1082                                 /* force calling ipath_kreceive() */
1083                                 chk0rcv = 1;
1084         }
1085
1086         if (istat & INFINIPATH_I_GPIO) {
1087                 /*
1088                  * GPIO interrupts fall in two broad classes:
1089                  * GPIO_2 indicates (on some HT4xx boards) that a packet
1090                  *        has arrived for Port 0. Checking for this
1091                  *        is controlled by flag IPATH_GPIO_INTR.
1092                  * GPIO_3..5 on IBA6120 Rev2 and IBA6110 Rev4 chips indicate
1093                  *        errors that we need to count. Checking for this
1094                  *        is controlled by flag IPATH_GPIO_ERRINTRS.
1095                  */
1096                 u32 gpiostatus;
1097                 u32 to_clear = 0;
1098
1099                 gpiostatus = ipath_read_kreg32(
1100                         dd, dd->ipath_kregs->kr_gpio_status);
1101                 /* First the error-counter case.
1102                  */
1103                 if ((gpiostatus & IPATH_GPIO_ERRINTR_MASK) &&
1104                     (dd->ipath_flags & IPATH_GPIO_ERRINTRS)) {
1105                         /* want to clear the bits we see asserted. */
1106                         to_clear |= (gpiostatus & IPATH_GPIO_ERRINTR_MASK);
1107
1108                         /*
1109                          * Count appropriately, clear bits out of our copy,
1110                          * as they have been "handled".
1111                          */
1112                         if (gpiostatus & (1 << IPATH_GPIO_RXUVL_BIT)) {
1113                                 ipath_dbg("FlowCtl on UnsupVL\n");
1114                                 dd->ipath_rxfc_unsupvl_errs++;
1115                         }
1116                         if (gpiostatus & (1 << IPATH_GPIO_OVRUN_BIT)) {
1117                                 ipath_dbg("Overrun Threshold exceeded\n");
1118                                 dd->ipath_overrun_thresh_errs++;
1119                         }
1120                         if (gpiostatus & (1 << IPATH_GPIO_LLI_BIT)) {
1121                                 ipath_dbg("Local Link Integrity error\n");
1122                                 dd->ipath_lli_errs++;
1123                         }
1124                         gpiostatus &= ~IPATH_GPIO_ERRINTR_MASK;
1125                 }
1126                 /* Now the Port0 Receive case */
1127                 if ((gpiostatus & (1 << IPATH_GPIO_PORT0_BIT)) &&
1128                     (dd->ipath_flags & IPATH_GPIO_INTR)) {
1129                         /*
1130                          * GPIO status bit 2 is set, and we expected it.
1131                          * clear it and indicate in p0bits.
1132                          * This probably only happens if a Port0 pkt
1133                          * arrives at _just_ the wrong time, and we
1134                          * handle that by seting chk0rcv;
1135                          */
1136                         to_clear |= (1 << IPATH_GPIO_PORT0_BIT);
1137                         gpiostatus &= ~(1 << IPATH_GPIO_PORT0_BIT);
1138                         chk0rcv = 1;
1139                 }
1140                 if (gpiostatus) {
1141                         /*
1142                          * Some unexpected bits remain. If they could have
1143                          * caused the interrupt, complain and clear.
1144                          * To avoid repetition of this condition, also clear
1145                          * the mask. It is almost certainly due to error.
1146                          */
1147                         const u32 mask = (u32) dd->ipath_gpio_mask;
1148
1149                         if (mask & gpiostatus) {
1150                                 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1151                                   gpiostatus & mask);
1152                                 to_clear |= (gpiostatus & mask);
1153                                 dd->ipath_gpio_mask &= ~(gpiostatus & mask);
1154                                 ipath_write_kreg(dd,
1155                                         dd->ipath_kregs->kr_gpio_mask,
1156                                         dd->ipath_gpio_mask);
1157                         }
1158                 }
1159                 if (to_clear) {
1160                         ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_clear,
1161                                         (u64) to_clear);
1162                 }
1163         }
1164         chk0rcv |= istat & port0rbits;
1165
1166         /*
1167          * Clear the interrupt bits we found set, unless they are receive
1168          * related, in which case we already cleared them above, and don't
1169          * want to clear them again, because we might lose an interrupt.
1170          * Clear it early, so we "know" know the chip will have seen this by
1171          * the time we process the queue, and will re-interrupt if necessary.
1172          * The processor itself won't take the interrupt again until we return.
1173          */
1174         ipath_write_kreg(dd, dd->ipath_kregs->kr_intclear, istat);
1175
1176         /*
1177          * handle port0 receive  before checking for pio buffers available,
1178          * since receives can overflow; piobuf waiters can afford a few
1179          * extra cycles, since they were waiting anyway, and user's waiting
1180          * for receive are at the bottom.
1181          */
1182         if (chk0rcv) {
1183                 ipath_kreceive(dd);
1184                 istat &= ~port0rbits;
1185         }
1186
1187         if (istat & ((dd->ipath_i_rcvavail_mask <<
1188                       INFINIPATH_I_RCVAVAIL_SHIFT)
1189                      | (dd->ipath_i_rcvurg_mask <<
1190                         INFINIPATH_I_RCVURG_SHIFT)))
1191                 handle_urcv(dd, istat);
1192
1193         if (istat & INFINIPATH_I_SPIOBUFAVAIL) {
1194                 clear_bit(IPATH_S_PIOINTBUFAVAIL, &dd->ipath_sendctrl);
1195                 ipath_write_kreg(dd, dd->ipath_kregs->kr_sendctrl,
1196                                  dd->ipath_sendctrl);
1197
1198                 if (dd->ipath_portpiowait)
1199                         handle_port_pioavail(dd);
1200
1201                 handle_layer_pioavail(dd);
1202         }
1203
1204         ret = IRQ_HANDLED;
1205
1206 bail:
1207         return ret;
1208 }