2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22 * so the code in this file is compiled twice, once per pte size.
26 #define pt_element_t u64
27 #define guest_walker guest_walker64
28 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
36 #define PT_MAX_FULL_LEVELS 4
38 #define PT_MAX_FULL_LEVELS 2
41 #define pt_element_t u32
42 #define guest_walker guest_walker32
43 #define FNAME(name) paging##32_##name
44 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
45 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
46 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
47 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
48 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
49 #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
50 #define PT_MAX_FULL_LEVELS 2
52 #error Invalid PTTYPE value
56 * The guest_walker structure emulates the behavior of the hardware page
61 gfn_t table_gfn[PT_MAX_FULL_LEVELS];
64 pt_element_t inherited_ar;
70 * Fetch a guest pte for a guest virtual address
72 static int FNAME(walk_addr)(struct guest_walker *walker,
73 struct kvm_vcpu *vcpu, gva_t addr,
74 int write_fault, int user_fault, int fetch_fault)
77 struct kvm_memory_slot *slot;
82 pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
83 walker->level = vcpu->mmu.root_level;
87 if (!is_long_mode(vcpu)) {
88 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
90 if (!(root & PT_PRESENT_MASK))
95 table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
96 walker->table_gfn[walker->level - 1] = table_gfn;
97 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
98 walker->level - 1, table_gfn);
99 slot = gfn_to_memslot(vcpu->kvm, table_gfn);
100 hpa = safe_gpa_to_hpa(vcpu, root & PT64_BASE_ADDR_MASK);
101 walker->table = kmap_atomic(pfn_to_page(hpa >> PAGE_SHIFT), KM_USER0);
103 ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
104 (vcpu->cr3 & ~(PAGE_MASK | CR3_FLAGS_MASK)) == 0);
106 walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
109 int index = PT_INDEX(addr, walker->level);
112 ptep = &walker->table[index];
113 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
114 ((unsigned long)ptep & PAGE_MASK));
116 if (!is_present_pte(*ptep))
119 if (write_fault && !is_writeble_pte(*ptep))
120 if (user_fault || is_write_protection(vcpu))
123 if (user_fault && !(*ptep & PT_USER_MASK))
127 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
131 if (!(*ptep & PT_ACCESSED_MASK)) {
132 mark_page_dirty(vcpu->kvm, table_gfn);
133 *ptep |= PT_ACCESSED_MASK;
136 if (walker->level == PT_PAGE_TABLE_LEVEL) {
137 walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
142 if (walker->level == PT_DIRECTORY_LEVEL
143 && (*ptep & PT_PAGE_SIZE_MASK)
144 && (PTTYPE == 64 || is_pse(vcpu))) {
145 walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
147 walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
151 walker->inherited_ar &= walker->table[index];
152 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
153 paddr = safe_gpa_to_hpa(vcpu, *ptep & PT_BASE_ADDR_MASK);
154 kunmap_atomic(walker->table, KM_USER0);
155 walker->table = kmap_atomic(pfn_to_page(paddr >> PAGE_SHIFT),
158 walker->table_gfn[walker->level - 1 ] = table_gfn;
159 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
160 walker->level - 1, table_gfn);
163 pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
167 walker->error_code = 0;
171 walker->error_code = PFERR_PRESENT_MASK;
175 walker->error_code |= PFERR_WRITE_MASK;
177 walker->error_code |= PFERR_USER_MASK;
179 walker->error_code |= PFERR_FETCH_MASK;
183 static void FNAME(release_walker)(struct guest_walker *walker)
186 kunmap_atomic(walker->table, KM_USER0);
189 static void FNAME(mark_pagetable_dirty)(struct kvm *kvm,
190 struct guest_walker *walker)
192 mark_page_dirty(kvm, walker->table_gfn[walker->level - 1]);
195 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
203 int dirty = *gpte & PT_DIRTY_MASK;
205 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
207 access_bits &= ~PT_WRITABLE_MASK;
209 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
211 *shadow_pte |= access_bits;
213 if (is_error_hpa(paddr)) {
214 *shadow_pte |= gaddr;
215 *shadow_pte |= PT_SHADOW_IO_MARK;
216 *shadow_pte &= ~PT_PRESENT_MASK;
220 *shadow_pte |= paddr;
222 if (access_bits & PT_WRITABLE_MASK) {
223 struct kvm_mmu_page *shadow;
225 shadow = kvm_mmu_lookup_page(vcpu, gfn);
227 pgprintk("%s: found shadow page for %lx, marking ro\n",
229 access_bits &= ~PT_WRITABLE_MASK;
230 if (is_writeble_pte(*shadow_pte)) {
231 *shadow_pte &= ~PT_WRITABLE_MASK;
232 kvm_arch_ops->tlb_flush(vcpu);
237 if (access_bits & PT_WRITABLE_MASK)
238 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
240 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
241 rmap_add(vcpu, shadow_pte);
244 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t *gpte,
245 u64 *shadow_pte, u64 access_bits, gfn_t gfn)
247 ASSERT(*shadow_pte == 0);
248 access_bits &= *gpte;
249 *shadow_pte = (*gpte & PT_PTE_COPY_MASK);
250 FNAME(set_pte_common)(vcpu, shadow_pte, *gpte & PT_BASE_ADDR_MASK,
251 gpte, access_bits, gfn);
254 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
255 u64 *spte, const void *pte, int bytes)
259 if (bytes < sizeof(pt_element_t))
261 gpte = *(const pt_element_t *)pte;
262 if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK))
264 pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
265 FNAME(set_pte)(vcpu, &gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK,
266 (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
269 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t *gpde,
270 u64 *shadow_pte, u64 access_bits, gfn_t gfn)
274 ASSERT(*shadow_pte == 0);
275 access_bits &= *gpde;
276 gaddr = (gpa_t)gfn << PAGE_SHIFT;
277 if (PTTYPE == 32 && is_cpuid_PSE36())
278 gaddr |= (*gpde & PT32_DIR_PSE36_MASK) <<
279 (32 - PT32_DIR_PSE36_SHIFT);
280 *shadow_pte = *gpde & PT_PTE_COPY_MASK;
281 FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
282 gpde, access_bits, gfn);
286 * Fetch a shadow pte for a specific level in the paging hierarchy.
288 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
289 struct guest_walker *walker)
294 u64 *prev_shadow_ent = NULL;
295 pt_element_t *guest_ent = walker->ptep;
297 if (!is_present_pte(*guest_ent))
300 shadow_addr = vcpu->mmu.root_hpa;
301 level = vcpu->mmu.shadow_root_level;
302 if (level == PT32E_ROOT_LEVEL) {
303 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
304 shadow_addr &= PT64_BASE_ADDR_MASK;
309 u32 index = SHADOW_PT_INDEX(addr, level);
310 struct kvm_mmu_page *shadow_page;
314 unsigned hugepage_access = 0;
316 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
317 if (is_present_pte(*shadow_ent) || is_io_pte(*shadow_ent)) {
318 if (level == PT_PAGE_TABLE_LEVEL)
320 shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
321 prev_shadow_ent = shadow_ent;
325 if (level == PT_PAGE_TABLE_LEVEL)
328 if (level - 1 == PT_PAGE_TABLE_LEVEL
329 && walker->level == PT_DIRECTORY_LEVEL) {
331 hugepage_access = *guest_ent;
332 hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
333 hugepage_access >>= PT_WRITABLE_SHIFT;
334 table_gfn = (*guest_ent & PT_BASE_ADDR_MASK)
338 table_gfn = walker->table_gfn[level - 2];
340 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
341 metaphysical, hugepage_access,
343 shadow_addr = __pa(shadow_page->spt);
344 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
345 | PT_WRITABLE_MASK | PT_USER_MASK;
346 *shadow_ent = shadow_pte;
347 prev_shadow_ent = shadow_ent;
350 if (walker->level == PT_DIRECTORY_LEVEL) {
352 *prev_shadow_ent |= PT_SHADOW_PS_MARK;
353 FNAME(set_pde)(vcpu, guest_ent, shadow_ent,
354 walker->inherited_ar, walker->gfn);
356 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
357 FNAME(set_pte)(vcpu, guest_ent, shadow_ent,
358 walker->inherited_ar,
365 * The guest faulted for write. We need to
367 * - check write permissions
368 * - update the guest pte dirty bit
369 * - update our own dirty page tracking structures
371 static int FNAME(fix_write_pf)(struct kvm_vcpu *vcpu,
373 struct guest_walker *walker,
378 pt_element_t *guest_ent;
381 struct kvm_mmu_page *page;
383 if (is_writeble_pte(*shadow_ent))
384 return !user || (*shadow_ent & PT_USER_MASK);
386 writable_shadow = *shadow_ent & PT_SHADOW_WRITABLE_MASK;
389 * User mode access. Fail if it's a kernel page or a read-only
392 if (!(*shadow_ent & PT_SHADOW_USER_MASK) || !writable_shadow)
394 ASSERT(*shadow_ent & PT_USER_MASK);
397 * Kernel mode access. Fail if it's a read-only page and
398 * supervisor write protection is enabled.
400 if (!writable_shadow) {
401 if (is_write_protection(vcpu))
403 *shadow_ent &= ~PT_USER_MASK;
406 guest_ent = walker->ptep;
408 if (!is_present_pte(*guest_ent)) {
417 * Usermode page faults won't be for page table updates.
419 while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
420 pgprintk("%s: zap %lx %x\n",
421 __FUNCTION__, gfn, page->role.word);
422 kvm_mmu_zap_page(vcpu, page);
424 } else if (kvm_mmu_lookup_page(vcpu, gfn)) {
425 pgprintk("%s: found shadow page for %lx, marking ro\n",
427 mark_page_dirty(vcpu->kvm, gfn);
428 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
429 *guest_ent |= PT_DIRTY_MASK;
433 mark_page_dirty(vcpu->kvm, gfn);
434 *shadow_ent |= PT_WRITABLE_MASK;
435 FNAME(mark_pagetable_dirty)(vcpu->kvm, walker);
436 *guest_ent |= PT_DIRTY_MASK;
437 rmap_add(vcpu, shadow_ent);
443 * Page fault handler. There are several causes for a page fault:
444 * - there is no shadow pte for the guest pte
445 * - write access through a shadow pte marked read only so that we can set
447 * - write access to a shadow pte marked read only so we can update the page
448 * dirty bitmap, when userspace requests it
449 * - mmio access; in this case we will never install a present shadow pte
450 * - normal guest page fault due to the guest pte marked not present, not
451 * writable, or not executable
453 * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
454 * a negative value on error.
456 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
459 int write_fault = error_code & PFERR_WRITE_MASK;
460 int user_fault = error_code & PFERR_USER_MASK;
461 int fetch_fault = error_code & PFERR_FETCH_MASK;
462 struct guest_walker walker;
468 pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
469 kvm_mmu_audit(vcpu, "pre page fault");
471 r = mmu_topup_memory_caches(vcpu);
476 * Look up the shadow pte for the faulting address.
478 r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
482 * The page is not mapped by the guest. Let the guest handle it.
485 pgprintk("%s: guest page fault\n", __FUNCTION__);
486 inject_page_fault(vcpu, addr, walker.error_code);
487 FNAME(release_walker)(&walker);
488 vcpu->last_pt_write_count = 0; /* reset fork detector */
492 shadow_pte = FNAME(fetch)(vcpu, addr, &walker);
493 pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__,
494 shadow_pte, *shadow_pte);
497 * Update the shadow pte.
500 fixed = FNAME(fix_write_pf)(vcpu, shadow_pte, &walker, addr,
501 user_fault, &write_pt);
503 fixed = fix_read_pf(shadow_pte);
505 pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__,
506 shadow_pte, *shadow_pte);
508 FNAME(release_walker)(&walker);
511 vcpu->last_pt_write_count = 0; /* reset fork detector */
514 * mmio: emulate if accessible, otherwise its a guest fault.
516 if (is_io_pte(*shadow_pte))
519 ++vcpu->stat.pf_fixed;
520 kvm_mmu_audit(vcpu, "post page fault (fixed)");
525 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
527 struct guest_walker walker;
528 gpa_t gpa = UNMAPPED_GVA;
531 r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
534 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
535 gpa |= vaddr & ~PAGE_MASK;
538 FNAME(release_walker)(&walker);
545 #undef PT_BASE_ADDR_MASK
547 #undef SHADOW_PT_INDEX
549 #undef PT_PTE_COPY_MASK
550 #undef PT_NON_PTE_COPY_MASK
551 #undef PT_DIR_BASE_ADDR_MASK
552 #undef PT_MAX_FULL_LEVELS