drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/vmalloc.h>
  20 #include <linux/highmem.h>
  21 #include <linux/profile.h>
  22 #include <asm/desc.h>
  23
  24 #include "kvm_svm.h"
  25 #include "x86_emulate.h"
  26
  27 MODULE_AUTHOR("Qumranet");
  28 MODULE_LICENSE("GPL");
  29
  30 #define IOPM_ALLOC_ORDER 2
  31 #define MSRPM_ALLOC_ORDER 1
  32
  33 #define DB_VECTOR 1
  34 #define UD_VECTOR 6
  35 #define GP_VECTOR 13
  36
  37 #define DR7_GD_MASK (1 << 13)
  38 #define DR6_BD_MASK (1 << 13)
  39 #define CR4_DE_MASK (1UL << 3)
  40
  41 #define SEG_TYPE_LDT 2
  42 #define SEG_TYPE_BUSY_TSS16 3
  43
  44 #define KVM_EFER_LMA (1 << 10)
  45 #define KVM_EFER_LME (1 << 8)
  46
  47 unsigned long iopm_base;
  48 unsigned long msrpm_base;
  49
  50 struct kvm_ldttss_desc {
  51         u16 limit0;
  52         u16 base0;
  53         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  54         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  55         u32 base3;
  56         u32 zero1;
  57 } __attribute__((packed));
  58
  59 struct svm_cpu_data {
  60         int cpu;
  61
  62         uint64_t asid_generation;
  63         uint32_t max_asid;
  64         uint32_t next_asid;
  65         struct kvm_ldttss_desc *tss_desc;
  66
  67         struct page *save_area;
  68 };
  69
  70 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  71
  72 struct svm_init_data {
  73         int cpu;
  74         int r;
  75 };
  76
  77 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  78
  79 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
  80 #define MSRS_RANGE_SIZE 2048
  81 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  82
  83 #define MAX_INST_SIZE 15
  84
  85 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
  86 {
  87         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
  88         u16 cs_attrib;
  89
  90         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
  91                 return 2;
  92
  93         cs_attrib = sa->cs.attrib;
  94
  95         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
  96                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
  97 }
  98
  99 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
 100 {
 101         int word_index = __ffs(vcpu->irq_summary);
 102         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 103         int irq = word_index * BITS_PER_LONG + bit_index;
 104
 105         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 106         if (!vcpu->irq_pending[word_index])
 107                 clear_bit(word_index, &vcpu->irq_summary);
 108         return irq;
 109 }
 110
 111 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 112 {
 113         set_bit(irq, vcpu->irq_pending);
 114         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 115 }
 116
 117 static inline void clgi(void)
 118 {
 119         asm volatile (SVM_CLGI);
 120 }
 121
 122 static inline void stgi(void)
 123 {
 124         asm volatile (SVM_STGI);
 125 }
 126
 127 static inline void invlpga(unsigned long addr, u32 asid)
 128 {
 129         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 130 }
 131
 132 static inline unsigned long kvm_read_cr2(void)
 133 {
 134         unsigned long cr2;
 135
 136         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 137         return cr2;
 138 }
 139
 140 static inline void kvm_write_cr2(unsigned long val)
 141 {
 142         asm volatile ("mov %0, %%cr2" :: "r" (val));
 143 }
 144
 145 static inline unsigned long read_dr6(void)
 146 {
 147         unsigned long dr6;
 148
 149         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 150         return dr6;
 151 }
 152
 153 static inline void write_dr6(unsigned long val)
 154 {
 155         asm volatile ("mov %0, %%dr6" :: "r" (val));
 156 }
 157
 158 static inline unsigned long read_dr7(void)
 159 {
 160         unsigned long dr7;
 161
 162         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 163         return dr7;
 164 }
 165
 166 static inline void write_dr7(unsigned long val)
 167 {
 168         asm volatile ("mov %0, %%dr7" :: "r" (val));
 169 }
 170
 171 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 172 {
 173         vcpu->svm->asid_generation--;
 174 }
 175
 176 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 177 {
 178         force_new_asid(vcpu);
 179 }
 180
 181 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 182 {
 183         if (!(efer & KVM_EFER_LMA))
 184                 efer &= ~KVM_EFER_LME;
 185
 186         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 187         vcpu->shadow_efer = efer;
 188 }
 189
 190 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 191 {
 192         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 193                                                 SVM_EVTINJ_VALID_ERR |
 194                                                 SVM_EVTINJ_TYPE_EXEPT |
 195                                                 GP_VECTOR;
 196         vcpu->svm->vmcb->control.event_inj_err = error_code;
 197 }
 198
 199 static void inject_ud(struct kvm_vcpu *vcpu)
 200 {
 201         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 202                                                 SVM_EVTINJ_TYPE_EXEPT |
 203                                                 UD_VECTOR;
 204 }
 205
 206 static void inject_db(struct kvm_vcpu *vcpu)
 207 {
 208         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 209                                                 SVM_EVTINJ_TYPE_EXEPT |
 210                                                 DB_VECTOR;
 211 }
 212
 213 static int is_page_fault(uint32_t info)
 214 {
 215         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 216         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 217 }
 218
 219 static int is_external_interrupt(u32 info)
 220 {
 221         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 222         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 223 }
 224
 225 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 226 {
 227         if (!vcpu->svm->next_rip) {
 228                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 229                 return;
 230         }
 231         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
 232                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 233                        __FUNCTION__,
 234                        vcpu->svm->vmcb->save.rip,
 235                        vcpu->svm->next_rip);
 236         }
 237
 238         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
 239         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 240
 241         vcpu->interrupt_window_open = 1;
 242 }
 243
 244 static int has_svm(void)
 245 {
 246         uint32_t eax, ebx, ecx, edx;
 247
 248         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 249                 printk(KERN_INFO "has_svm: not amd\n");
 250                 return 0;
 251         }
 252
 253         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 254         if (eax < SVM_CPUID_FUNC) {
 255                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 256                 return 0;
 257         }
 258
 259         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 260         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 261                 printk(KERN_DEBUG "has_svm: svm not available\n");
 262                 return 0;
 263         }
 264         return 1;
 265 }
 266
 267 static void svm_hardware_disable(void *garbage)
 268 {
 269         struct svm_cpu_data *svm_data
 270                 = per_cpu(svm_data, raw_smp_processor_id());
 271
 272         if (svm_data) {
 273                 uint64_t efer;
 274
 275                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 276                 rdmsrl(MSR_EFER, efer);
 277                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 278                 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
 279                 __free_page(svm_data->save_area);
 280                 kfree(svm_data);
 281         }
 282 }
 283
 284 static void svm_hardware_enable(void *garbage)
 285 {
 286
 287         struct svm_cpu_data *svm_data;
 288         uint64_t efer;
 289 #ifdef CONFIG_X86_64
 290         struct desc_ptr gdt_descr;
 291 #else
 292         struct Xgt_desc_struct gdt_descr;
 293 #endif
 294         struct desc_struct *gdt;
 295         int me = raw_smp_processor_id();
 296
 297         if (!has_svm()) {
 298                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 299                 return;
 300         }
 301         svm_data = per_cpu(svm_data, me);
 302
 303         if (!svm_data) {
 304                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 305                        me);
 306                 return;
 307         }
 308
 309         svm_data->asid_generation = 1;
 310         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 311         svm_data->next_asid = svm_data->max_asid + 1;
 312
 313         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
 314         gdt = (struct desc_struct *)gdt_descr.address;
 315         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 316
 317         rdmsrl(MSR_EFER, efer);
 318         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 319
 320         wrmsrl(MSR_VM_HSAVE_PA,
 321                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 322 }
 323
 324 static int svm_cpu_init(int cpu)
 325 {
 326         struct svm_cpu_data *svm_data;
 327         int r;
 328
 329         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 330         if (!svm_data)
 331                 return -ENOMEM;
 332         svm_data->cpu = cpu;
 333         svm_data->save_area = alloc_page(GFP_KERNEL);
 334         r = -ENOMEM;
 335         if (!svm_data->save_area)
 336                 goto err_1;
 337
 338         per_cpu(svm_data, cpu) = svm_data;
 339
 340         return 0;
 341
 342 err_1:
 343         kfree(svm_data);
 344         return r;
 345
 346 }
 347
 348 static int set_msr_interception(u32 *msrpm, unsigned msr,
 349                                 int read, int write)
 350 {
 351         int i;
 352
 353         for (i = 0; i < NUM_MSR_MAPS; i++) {
 354                 if (msr >= msrpm_ranges[i] &&
 355                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 356                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 357                                           msrpm_ranges[i]) * 2;
 358
 359                         u32 *base = msrpm + (msr_offset / 32);
 360                         u32 msr_shift = msr_offset % 32;
 361                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 362                         *base = (*base & ~(0x3 << msr_shift)) |
 363                                 (mask << msr_shift);
 364                         return 1;
 365                 }
 366         }
 367         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
 368         return 0;
 369 }
 370
 371 static __init int svm_hardware_setup(void)
 372 {
 373         int cpu;
 374         struct page *iopm_pages;
 375         struct page *msrpm_pages;
 376         void *msrpm_va;
 377         int r;
 378
 379         kvm_emulator_want_group7_invlpg();
 380
 381         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 382
 383         if (!iopm_pages)
 384                 return -ENOMEM;
 385         memset(page_address(iopm_pages), 0xff,
 386                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 387         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 388
 389
 390         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 391
 392         r = -ENOMEM;
 393         if (!msrpm_pages)
 394                 goto err_1;
 395
 396         msrpm_va = page_address(msrpm_pages);
 397         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 398         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 399
 400 #ifdef CONFIG_X86_64
 401         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 402         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 403         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 404         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 405         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 406         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 407 #endif
 408         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 409         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 410         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 411         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 412
 413         for_each_online_cpu(cpu) {
 414                 r = svm_cpu_init(cpu);
 415                 if (r)
 416                         goto err_2;
 417         }
 418         return 0;
 419
 420 err_2:
 421         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 422         msrpm_base = 0;
 423 err_1:
 424         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 425         iopm_base = 0;
 426         return r;
 427 }
 428
 429 static __exit void svm_hardware_unsetup(void)
 430 {
 431         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 432         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 433         iopm_base = msrpm_base = 0;
 434 }
 435
 436 static void init_seg(struct vmcb_seg *seg)
 437 {
 438         seg->selector = 0;
 439         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 440                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 441         seg->limit = 0xffff;
 442         seg->base = 0;
 443 }
 444
 445 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 446 {
 447         seg->selector = 0;
 448         seg->attrib = SVM_SELECTOR_P_MASK | type;
 449         seg->limit = 0xffff;
 450         seg->base = 0;
 451 }
 452
 453 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
 454 {
 455         return 0;
 456 }
 457
 458 static void init_vmcb(struct vmcb *vmcb)
 459 {
 460         struct vmcb_control_area *control = &vmcb->control;
 461         struct vmcb_save_area *save = &vmcb->save;
 462
 463         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 464                                         INTERCEPT_CR3_MASK |
 465                                         INTERCEPT_CR4_MASK;
 466
 467         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 468                                         INTERCEPT_CR3_MASK |
 469                                         INTERCEPT_CR4_MASK;
 470
 471         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 472                                         INTERCEPT_DR1_MASK |
 473                                         INTERCEPT_DR2_MASK |
 474                                         INTERCEPT_DR3_MASK;
 475
 476         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 477                                         INTERCEPT_DR1_MASK |
 478                                         INTERCEPT_DR2_MASK |
 479                                         INTERCEPT_DR3_MASK |
 480                                         INTERCEPT_DR5_MASK |
 481                                         INTERCEPT_DR7_MASK;
 482
 483         control->intercept_exceptions = 1 << PF_VECTOR;
 484
 485
 486         control->intercept =    (1ULL << INTERCEPT_INTR) |
 487                                 (1ULL << INTERCEPT_NMI) |
 488                                 (1ULL << INTERCEPT_SMI) |
 489                 /*
 490                  * selective cr0 intercept bug?
 491                  *      0:   0f 22 d8                mov    %eax,%cr3
 492                  *      3:   0f 20 c0                mov    %cr0,%eax
 493                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 494                  *      b:   0f 22 c0                mov    %eax,%cr0
 495                  * set cr3 ->interception
 496                  * get cr0 ->interception
 497                  * set cr0 -> no interception
 498                  */
 499                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 500                                 (1ULL << INTERCEPT_CPUID) |
 501                                 (1ULL << INTERCEPT_HLT) |
 502                                 (1ULL << INTERCEPT_INVLPGA) |
 503                                 (1ULL << INTERCEPT_IOIO_PROT) |
 504                                 (1ULL << INTERCEPT_MSR_PROT) |
 505                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 506                                 (1ULL << INTERCEPT_SHUTDOWN) |
 507                                 (1ULL << INTERCEPT_VMRUN) |
 508                                 (1ULL << INTERCEPT_VMMCALL) |
 509                                 (1ULL << INTERCEPT_VMLOAD) |
 510                                 (1ULL << INTERCEPT_VMSAVE) |
 511                                 (1ULL << INTERCEPT_STGI) |
 512                                 (1ULL << INTERCEPT_CLGI) |
 513                                 (1ULL << INTERCEPT_SKINIT) |
 514                                 (1ULL << INTERCEPT_MONITOR) |
 515                                 (1ULL << INTERCEPT_MWAIT);
 516
 517         control->iopm_base_pa = iopm_base;
 518         control->msrpm_base_pa = msrpm_base;
 519         control->tsc_offset = 0;
 520         control->int_ctl = V_INTR_MASKING_MASK;
 521
 522         init_seg(&save->es);
 523         init_seg(&save->ss);
 524         init_seg(&save->ds);
 525         init_seg(&save->fs);
 526         init_seg(&save->gs);
 527
 528         save->cs.selector = 0xf000;
 529         /* Executable/Readable Code Segment */
 530         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 531                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 532         save->cs.limit = 0xffff;
 533         /*
 534          * cs.base should really be 0xffff0000, but vmx can't handle that, so
 535          * be consistent with it.
 536          *
 537          * Replace when we have real mode working for vmx.
 538          */
 539         save->cs.base = 0xf0000;
 540
 541         save->gdtr.limit = 0xffff;
 542         save->idtr.limit = 0xffff;
 543
 544         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 545         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 546
 547         save->efer = MSR_EFER_SVME_MASK;
 548
 549         save->dr6 = 0xffff0ff0;
 550         save->dr7 = 0x400;
 551         save->rflags = 2;
 552         save->rip = 0x0000fff0;
 553
 554         /*
 555          * cr0 val on cpu init should be 0x60000010, we enable cpu
 556          * cache by default. the orderly way is to enable cache in bios.
 557          */
 558         save->cr0 = 0x00000010 | CR0_PG_MASK | CR0_WP_MASK;
 559         save->cr4 = CR4_PAE_MASK;
 560         /* rdx = ?? */
 561 }
 562
 563 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
 564 {
 565         struct page *page;
 566         int r;
 567
 568         r = -ENOMEM;
 569         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
 570         if (!vcpu->svm)
 571                 goto out1;
 572         page = alloc_page(GFP_KERNEL);
 573         if (!page)
 574                 goto out2;
 575
 576         vcpu->svm->vmcb = page_address(page);
 577         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 578         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 579         vcpu->svm->asid_generation = 0;
 580         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
 581         init_vmcb(vcpu->svm->vmcb);
 582
 583         fx_init(vcpu);
 584         vcpu->apic_base = 0xfee00000 |
 585                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
 586                         MSR_IA32_APICBASE_ENABLE;
 587
 588         return 0;
 589
 590 out2:
 591         kfree(vcpu->svm);
 592 out1:
 593         return r;
 594 }
 595
 596 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 597 {
 598         if (!vcpu->svm)
 599                 return;
 600         if (vcpu->svm->vmcb)
 601                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
 602         kfree(vcpu->svm);
 603 }
 604
 605 static void svm_vcpu_load(struct kvm_vcpu *vcpu)
 606 {
 607         int cpu;
 608
 609         cpu = get_cpu();
 610         if (unlikely(cpu != vcpu->cpu)) {
 611                 u64 tsc_this, delta;
 612
 613                 /*
 614                  * Make sure that the guest sees a monotonically
 615                  * increasing TSC.
 616                  */
 617                 rdtscll(tsc_this);
 618                 delta = vcpu->host_tsc - tsc_this;
 619                 vcpu->svm->vmcb->control.tsc_offset += delta;
 620                 vcpu->cpu = cpu;
 621         }
 622 }
 623
 624 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 625 {
 626         rdtscll(vcpu->host_tsc);
 627         put_cpu();
 628 }
 629
 630 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
 631 {
 632 }
 633
 634 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 635 {
 636         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
 637         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
 638         vcpu->rip = vcpu->svm->vmcb->save.rip;
 639 }
 640
 641 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 642 {
 643         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 644         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 645         vcpu->svm->vmcb->save.rip = vcpu->rip;
 646 }
 647
 648 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 649 {
 650         return vcpu->svm->vmcb->save.rflags;
 651 }
 652
 653 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 654 {
 655         vcpu->svm->vmcb->save.rflags = rflags;
 656 }
 657
 658 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 659 {
 660         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
 661
 662         switch (seg) {
 663         case VCPU_SREG_CS: return &save->cs;
 664         case VCPU_SREG_DS: return &save->ds;
 665         case VCPU_SREG_ES: return &save->es;
 666         case VCPU_SREG_FS: return &save->fs;
 667         case VCPU_SREG_GS: return &save->gs;
 668         case VCPU_SREG_SS: return &save->ss;
 669         case VCPU_SREG_TR: return &save->tr;
 670         case VCPU_SREG_LDTR: return &save->ldtr;
 671         }
 672         BUG();
 673         return NULL;
 674 }
 675
 676 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 677 {
 678         struct vmcb_seg *s = svm_seg(vcpu, seg);
 679
 680         return s->base;
 681 }
 682
 683 static void svm_get_segment(struct kvm_vcpu *vcpu,
 684                             struct kvm_segment *var, int seg)
 685 {
 686         struct vmcb_seg *s = svm_seg(vcpu, seg);
 687
 688         var->base = s->base;
 689         var->limit = s->limit;
 690         var->selector = s->selector;
 691         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 692         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 693         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 694         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 695         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 696         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 697         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 698         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 699         var->unusable = !var->present;
 700 }
 701
 702 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 703 {
 704         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
 705
 706         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 707         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 708 }
 709
 710 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 711 {
 712         dt->limit = vcpu->svm->vmcb->save.idtr.limit;
 713         dt->base = vcpu->svm->vmcb->save.idtr.base;
 714 }
 715
 716 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 717 {
 718         vcpu->svm->vmcb->save.idtr.limit = dt->limit;
 719         vcpu->svm->vmcb->save.idtr.base = dt->base ;
 720 }
 721
 722 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 723 {
 724         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
 725         dt->base = vcpu->svm->vmcb->save.gdtr.base;
 726 }
 727
 728 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 729 {
 730         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
 731         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
 732 }
 733
 734 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 735 {
 736 }
 737
 738 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 739 {
 740 #ifdef CONFIG_X86_64
 741         if (vcpu->shadow_efer & KVM_EFER_LME) {
 742                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
 743                         vcpu->shadow_efer |= KVM_EFER_LMA;
 744                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 745                 }
 746
 747                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
 748                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 749                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 750                 }
 751         }
 752 #endif
 753         vcpu->cr0 = cr0;
 754         cr0 |= CR0_PG_MASK | CR0_WP_MASK;
 755         cr0 &= ~(CR0_CD_MASK | CR0_NW_MASK);
 756         vcpu->svm->vmcb->save.cr0 = cr0;
 757 }
 758
 759 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 760 {
 761        vcpu->cr4 = cr4;
 762        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
 763 }
 764
 765 static void svm_set_segment(struct kvm_vcpu *vcpu,
 766                             struct kvm_segment *var, int seg)
 767 {
 768         struct vmcb_seg *s = svm_seg(vcpu, seg);
 769
 770         s->base = var->base;
 771         s->limit = var->limit;
 772         s->selector = var->selector;
 773         if (var->unusable)
 774                 s->attrib = 0;
 775         else {
 776                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 777                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 778                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 779                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 780                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 781                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 782                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 783                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 784         }
 785         if (seg == VCPU_SREG_CS)
 786                 vcpu->svm->vmcb->save.cpl
 787                         = (vcpu->svm->vmcb->save.cs.attrib
 788                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 789
 790 }
 791
 792 /* FIXME:
 793
 794         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
 795         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 796
 797 */
 798
 799 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 800 {
 801         return -EOPNOTSUPP;
 802 }
 803
 804 static void load_host_msrs(struct kvm_vcpu *vcpu)
 805 {
 806         int i;
 807
 808         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 809                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 810 }
 811
 812 static void save_host_msrs(struct kvm_vcpu *vcpu)
 813 {
 814         int i;
 815
 816         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 817                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 818 }
 819
 820 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
 821 {
 822         if (svm_data->next_asid > svm_data->max_asid) {
 823                 ++svm_data->asid_generation;
 824                 svm_data->next_asid = 1;
 825                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 826         }
 827
 828         vcpu->cpu = svm_data->cpu;
 829         vcpu->svm->asid_generation = svm_data->asid_generation;
 830         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
 831 }
 832
 833 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
 834 {
 835         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
 836 }
 837
 838 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 839 {
 840         return vcpu->svm->db_regs[dr];
 841 }
 842
 843 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 844                        int *exception)
 845 {
 846         *exception = 0;
 847
 848         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
 849                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 850                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
 851                 *exception = DB_VECTOR;
 852                 return;
 853         }
 854
 855         switch (dr) {
 856         case 0 ... 3:
 857                 vcpu->svm->db_regs[dr] = value;
 858                 return;
 859         case 4 ... 5:
 860                 if (vcpu->cr4 & CR4_DE_MASK) {
 861                         *exception = UD_VECTOR;
 862                         return;
 863                 }
 864         case 7: {
 865                 if (value & ~((1ULL << 32) - 1)) {
 866                         *exception = GP_VECTOR;
 867                         return;
 868                 }
 869                 vcpu->svm->vmcb->save.dr7 = value;
 870                 return;
 871         }
 872         default:
 873                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 874                        __FUNCTION__, dr);
 875                 *exception = UD_VECTOR;
 876                 return;
 877         }
 878 }
 879
 880 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 881 {
 882         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
 883         u64 fault_address;
 884         u32 error_code;
 885         enum emulation_result er;
 886         int r;
 887
 888         if (is_external_interrupt(exit_int_info))
 889                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 890
 891         spin_lock(&vcpu->kvm->lock);
 892
 893         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
 894         error_code = vcpu->svm->vmcb->control.exit_info_1;
 895         r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
 896         if (r < 0) {
 897                 spin_unlock(&vcpu->kvm->lock);
 898                 return r;
 899         }
 900         if (!r) {
 901                 spin_unlock(&vcpu->kvm->lock);
 902                 return 1;
 903         }
 904         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
 905         spin_unlock(&vcpu->kvm->lock);
 906
 907         switch (er) {
 908         case EMULATE_DONE:
 909                 return 1;
 910         case EMULATE_DO_MMIO:
 911                 ++kvm_stat.mmio_exits;
 912                 kvm_run->exit_reason = KVM_EXIT_MMIO;
 913                 return 0;
 914         case EMULATE_FAIL:
 915                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
 916                 break;
 917         default:
 918                 BUG();
 919         }
 920
 921         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
 922         return 0;
 923 }
 924
 925 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 926 {
 927         /*
 928          * VMCB is undefined after a SHUTDOWN intercept
 929          * so reinitialize it.
 930          */
 931         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 932         init_vmcb(vcpu->svm->vmcb);
 933
 934         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
 935         return 0;
 936 }
 937
 938 static int io_get_override(struct kvm_vcpu *vcpu,
 939                           struct vmcb_seg **seg,
 940                           int *addr_override)
 941 {
 942         u8 inst[MAX_INST_SIZE];
 943         unsigned ins_length;
 944         gva_t rip;
 945         int i;
 946
 947         rip =  vcpu->svm->vmcb->save.rip;
 948         ins_length = vcpu->svm->next_rip - rip;
 949         rip += vcpu->svm->vmcb->save.cs.base;
 950
 951         if (ins_length > MAX_INST_SIZE)
 952                 printk(KERN_DEBUG
 953                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
 954                        "next rip 0x%llx ins_length %u\n",
 955                        __FUNCTION__,
 956                        vcpu->svm->vmcb->save.cs.base,
 957                        vcpu->svm->vmcb->save.rip,
 958                        vcpu->svm->vmcb->control.exit_info_2,
 959                        ins_length);
 960
 961         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
 962                 /* #PF */
 963                 return 0;
 964
 965         *addr_override = 0;
 966         *seg = NULL;
 967         for (i = 0; i < ins_length; i++)
 968                 switch (inst[i]) {
 969                 case 0xf0:
 970                 case 0xf2:
 971                 case 0xf3:
 972                 case 0x66:
 973                         continue;
 974                 case 0x67:
 975                         *addr_override = 1;
 976                         continue;
 977                 case 0x2e:
 978                         *seg = &vcpu->svm->vmcb->save.cs;
 979                         continue;
 980                 case 0x36:
 981                         *seg = &vcpu->svm->vmcb->save.ss;
 982                         continue;
 983                 case 0x3e:
 984                         *seg = &vcpu->svm->vmcb->save.ds;
 985                         continue;
 986                 case 0x26:
 987                         *seg = &vcpu->svm->vmcb->save.es;
 988                         continue;
 989                 case 0x64:
 990                         *seg = &vcpu->svm->vmcb->save.fs;
 991                         continue;
 992                 case 0x65:
 993                         *seg = &vcpu->svm->vmcb->save.gs;
 994                         continue;
 995                 default:
 996                         return 1;
 997                 }
 998         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
 999         return 0;
1000 }
1001
1002 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, gva_t *address)
1003 {
1004         unsigned long addr_mask;
1005         unsigned long *reg;
1006         struct vmcb_seg *seg;
1007         int addr_override;
1008         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
1009         u16 cs_attrib = save_area->cs.attrib;
1010         unsigned addr_size = get_addr_size(vcpu);
1011
1012         if (!io_get_override(vcpu, &seg, &addr_override))
1013                 return 0;
1014
1015         if (addr_override)
1016                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1017
1018         if (ins) {
1019                 reg = &vcpu->regs[VCPU_REGS_RDI];
1020                 seg = &vcpu->svm->vmcb->save.es;
1021         } else {
1022                 reg = &vcpu->regs[VCPU_REGS_RSI];
1023                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1024         }
1025
1026         addr_mask = ~0ULL >> (64 - (addr_size * 8));
1027
1028         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1029             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1030                 *address = (*reg & addr_mask);
1031                 return addr_mask;
1032         }
1033
1034         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1035                 svm_inject_gp(vcpu, 0);
1036                 return 0;
1037         }
1038
1039         *address = (*reg & addr_mask) + seg->base;
1040         return addr_mask;
1041 }
1042
1043 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1044 {
1045         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1046         int size, down, in, string, rep;
1047         unsigned port;
1048         unsigned long count;
1049         gva_t address = 0;
1050
1051         ++kvm_stat.io_exits;
1052
1053         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1054
1055         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1056         port = io_info >> 16;
1057         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1058         string = (io_info & SVM_IOIO_STR_MASK) != 0;
1059         rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1060         count = 1;
1061         down = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1062
1063         if (string) {
1064                 unsigned addr_mask;
1065
1066                 addr_mask = io_adress(vcpu, in, &address);
1067                 if (!addr_mask) {
1068                         printk(KERN_DEBUG "%s: get io address failed\n",
1069                                __FUNCTION__);
1070                         return 1;
1071                 }
1072
1073                 if (rep)
1074                         count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1075         }
1076         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1077                              address, rep, port);
1078 }
1079
1080 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1081 {
1082         return 1;
1083 }
1084
1085 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1086 {
1087         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1088         skip_emulated_instruction(vcpu);
1089         if (vcpu->irq_summary)
1090                 return 1;
1091
1092         kvm_run->exit_reason = KVM_EXIT_HLT;
1093         ++kvm_stat.halt_exits;
1094         return 0;
1095 }
1096
1097 static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1098 {
1099         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 3;
1100         skip_emulated_instruction(vcpu);
1101         return kvm_hypercall(vcpu, kvm_run);
1102 }
1103
1104 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1105 {
1106         inject_ud(vcpu);
1107         return 1;
1108 }
1109
1110 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1111 {
1112         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1113         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1114         return 0;
1115 }
1116
1117 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1118 {
1119         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1120         kvm_emulate_cpuid(vcpu);
1121         return 1;
1122 }
1123
1124 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1125 {
1126         if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1127                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1128         return 1;
1129 }
1130
1131 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1132 {
1133         switch (ecx) {
1134         case MSR_IA32_TIME_STAMP_COUNTER: {
1135                 u64 tsc;
1136
1137                 rdtscll(tsc);
1138                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1139                 break;
1140         }
1141         case MSR_K6_STAR:
1142                 *data = vcpu->svm->vmcb->save.star;
1143                 break;
1144 #ifdef CONFIG_X86_64
1145         case MSR_LSTAR:
1146                 *data = vcpu->svm->vmcb->save.lstar;
1147                 break;
1148         case MSR_CSTAR:
1149                 *data = vcpu->svm->vmcb->save.cstar;
1150                 break;
1151         case MSR_KERNEL_GS_BASE:
1152                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1153                 break;
1154         case MSR_SYSCALL_MASK:
1155                 *data = vcpu->svm->vmcb->save.sfmask;
1156                 break;
1157 #endif
1158         case MSR_IA32_SYSENTER_CS:
1159                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1160                 break;
1161         case MSR_IA32_SYSENTER_EIP:
1162                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1163                 break;
1164         case MSR_IA32_SYSENTER_ESP:
1165                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1166                 break;
1167         default:
1168                 return kvm_get_msr_common(vcpu, ecx, data);
1169         }
1170         return 0;
1171 }
1172
1173 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1174 {
1175         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1176         u64 data;
1177
1178         if (svm_get_msr(vcpu, ecx, &data))
1179                 svm_inject_gp(vcpu, 0);
1180         else {
1181                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1182                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1183                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1184                 skip_emulated_instruction(vcpu);
1185         }
1186         return 1;
1187 }
1188
1189 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1190 {
1191         switch (ecx) {
1192         case MSR_IA32_TIME_STAMP_COUNTER: {
1193                 u64 tsc;
1194
1195                 rdtscll(tsc);
1196                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1197                 break;
1198         }
1199         case MSR_K6_STAR:
1200                 vcpu->svm->vmcb->save.star = data;
1201                 break;
1202 #ifdef CONFIG_X86_64
1203         case MSR_LSTAR:
1204                 vcpu->svm->vmcb->save.lstar = data;
1205                 break;
1206         case MSR_CSTAR:
1207                 vcpu->svm->vmcb->save.cstar = data;
1208                 break;
1209         case MSR_KERNEL_GS_BASE:
1210                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1211                 break;
1212         case MSR_SYSCALL_MASK:
1213                 vcpu->svm->vmcb->save.sfmask = data;
1214                 break;
1215 #endif
1216         case MSR_IA32_SYSENTER_CS:
1217                 vcpu->svm->vmcb->save.sysenter_cs = data;
1218                 break;
1219         case MSR_IA32_SYSENTER_EIP:
1220                 vcpu->svm->vmcb->save.sysenter_eip = data;
1221                 break;
1222         case MSR_IA32_SYSENTER_ESP:
1223                 vcpu->svm->vmcb->save.sysenter_esp = data;
1224                 break;
1225         default:
1226                 return kvm_set_msr_common(vcpu, ecx, data);
1227         }
1228         return 0;
1229 }
1230
1231 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1232 {
1233         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1234         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1235                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1236         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1237         if (svm_set_msr(vcpu, ecx, data))
1238                 svm_inject_gp(vcpu, 0);
1239         else
1240                 skip_emulated_instruction(vcpu);
1241         return 1;
1242 }
1243
1244 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1245 {
1246         if (vcpu->svm->vmcb->control.exit_info_1)
1247                 return wrmsr_interception(vcpu, kvm_run);
1248         else
1249                 return rdmsr_interception(vcpu, kvm_run);
1250 }
1251
1252 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1253                                    struct kvm_run *kvm_run)
1254 {
1255         /*
1256          * If the user space waits to inject interrupts, exit as soon as
1257          * possible
1258          */
1259         if (kvm_run->request_interrupt_window &&
1260             !vcpu->irq_summary) {
1261                 ++kvm_stat.irq_window_exits;
1262                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1263                 return 0;
1264         }
1265
1266         return 1;
1267 }
1268
1269 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1270                                       struct kvm_run *kvm_run) = {
1271         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1272         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1273         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1274         /* for now: */
1275         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1276         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1277         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1278         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1279         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1280         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1281         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1282         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1283         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1284         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1285         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1286         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1287         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1288         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1289         [SVM_EXIT_INTR]                         = nop_on_interception,
1290         [SVM_EXIT_NMI]                          = nop_on_interception,
1291         [SVM_EXIT_SMI]                          = nop_on_interception,
1292         [SVM_EXIT_INIT]                         = nop_on_interception,
1293         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1294         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1295         [SVM_EXIT_CPUID]                        = cpuid_interception,
1296         [SVM_EXIT_HLT]                          = halt_interception,
1297         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1298         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1299         [SVM_EXIT_IOIO]                         = io_interception,
1300         [SVM_EXIT_MSR]                          = msr_interception,
1301         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1302         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
1303         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1304         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
1305         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1306         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1307         [SVM_EXIT_STGI]                         = invalid_op_interception,
1308         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1309         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1310         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
1311         [SVM_EXIT_MWAIT]                        = invalid_op_interception,
1312 };
1313
1314
1315 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1316 {
1317         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1318
1319         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1320             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1321                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1322                        "exit_code 0x%x\n",
1323                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1324                        exit_code);
1325
1326         if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1327             || svm_exit_handlers[exit_code] == 0) {
1328                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1329                 printk(KERN_ERR "%s: 0x%x @ 0x%llx cr0 0x%lx rflags 0x%llx\n",
1330                        __FUNCTION__,
1331                        exit_code,
1332                        vcpu->svm->vmcb->save.rip,
1333                        vcpu->cr0,
1334                        vcpu->svm->vmcb->save.rflags);
1335                 return 0;
1336         }
1337
1338         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1339 }
1340
1341 static void reload_tss(struct kvm_vcpu *vcpu)
1342 {
1343         int cpu = raw_smp_processor_id();
1344
1345         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1346         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1347         load_TR_desc();
1348 }
1349
1350 static void pre_svm_run(struct kvm_vcpu *vcpu)
1351 {
1352         int cpu = raw_smp_processor_id();
1353
1354         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1355
1356         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1357         if (vcpu->cpu != cpu ||
1358             vcpu->svm->asid_generation != svm_data->asid_generation)
1359                 new_asid(vcpu, svm_data);
1360 }
1361
1362
1363 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1364 {
1365         struct vmcb_control_area *control;
1366
1367         control = &vcpu->svm->vmcb->control;
1368         control->int_vector = pop_irq(vcpu);
1369         control->int_ctl &= ~V_INTR_PRIO_MASK;
1370         control->int_ctl |= V_IRQ_MASK |
1371                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1372 }
1373
1374 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1375 {
1376         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1377
1378         if (control->int_ctl & V_IRQ_MASK) {
1379                 control->int_ctl &= ~V_IRQ_MASK;
1380                 push_irq(vcpu, control->int_vector);
1381         }
1382
1383         vcpu->interrupt_window_open =
1384                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1385 }
1386
1387 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1388                                        struct kvm_run *kvm_run)
1389 {
1390         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1391
1392         vcpu->interrupt_window_open =
1393                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1394                  (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1395
1396         if (vcpu->interrupt_window_open && vcpu->irq_summary)
1397                 /*
1398                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1399                  */
1400                 kvm_do_inject_irq(vcpu);
1401
1402         /*
1403          * Interrupts blocked.  Wait for unblock.
1404          */
1405         if (!vcpu->interrupt_window_open &&
1406             (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1407                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1408         } else
1409                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1410 }
1411
1412 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1413                               struct kvm_run *kvm_run)
1414 {
1415         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1416                                                   vcpu->irq_summary == 0);
1417         kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1418         kvm_run->cr8 = vcpu->cr8;
1419         kvm_run->apic_base = vcpu->apic_base;
1420 }
1421
1422 /*
1423  * Check if userspace requested an interrupt window, and that the
1424  * interrupt window is open.
1425  *
1426  * No need to exit to userspace if we already have an interrupt queued.
1427  */
1428 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1429                                           struct kvm_run *kvm_run)
1430 {
1431         return (!vcpu->irq_summary &&
1432                 kvm_run->request_interrupt_window &&
1433                 vcpu->interrupt_window_open &&
1434                 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1435 }
1436
1437 static void save_db_regs(unsigned long *db_regs)
1438 {
1439         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1440         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1441         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1442         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1443 }
1444
1445 static void load_db_regs(unsigned long *db_regs)
1446 {
1447         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1448         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1449         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1450         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1451 }
1452
1453 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1454 {
1455         u16 fs_selector;
1456         u16 gs_selector;
1457         u16 ldt_selector;
1458         int r;
1459
1460 again:
1461         if (!vcpu->mmio_read_completed)
1462                 do_interrupt_requests(vcpu, kvm_run);
1463
1464         clgi();
1465
1466         pre_svm_run(vcpu);
1467
1468         save_host_msrs(vcpu);
1469         fs_selector = read_fs();
1470         gs_selector = read_gs();
1471         ldt_selector = read_ldt();
1472         vcpu->svm->host_cr2 = kvm_read_cr2();
1473         vcpu->svm->host_dr6 = read_dr6();
1474         vcpu->svm->host_dr7 = read_dr7();
1475         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1476
1477         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1478                 write_dr7(0);
1479                 save_db_regs(vcpu->svm->host_db_regs);
1480                 load_db_regs(vcpu->svm->db_regs);
1481         }
1482
1483         fx_save(vcpu->host_fx_image);
1484         fx_restore(vcpu->guest_fx_image);
1485
1486         asm volatile (
1487 #ifdef CONFIG_X86_64
1488                 "push %%rbx; push %%rcx; push %%rdx;"
1489                 "push %%rsi; push %%rdi; push %%rbp;"
1490                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1491                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1492 #else
1493                 "push %%ebx; push %%ecx; push %%edx;"
1494                 "push %%esi; push %%edi; push %%ebp;"
1495 #endif
1496
1497 #ifdef CONFIG_X86_64
1498                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1499                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1500                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1501                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1502                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1503                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1504                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1505                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1506                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1507                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1508                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1509                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1510                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1511                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1512 #else
1513                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1514                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1515                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1516                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1517                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1518                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1519 #endif
1520
1521 #ifdef CONFIG_X86_64
1522                 /* Enter guest mode */
1523                 "push %%rax \n\t"
1524                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1525                 "mov %c[vmcb](%%rax), %%rax \n\t"
1526                 SVM_VMLOAD "\n\t"
1527                 SVM_VMRUN "\n\t"
1528                 SVM_VMSAVE "\n\t"
1529                 "pop %%rax \n\t"
1530 #else
1531                 /* Enter guest mode */
1532                 "push %%eax \n\t"
1533                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1534                 "mov %c[vmcb](%%eax), %%eax \n\t"
1535                 SVM_VMLOAD "\n\t"
1536                 SVM_VMRUN "\n\t"
1537                 SVM_VMSAVE "\n\t"
1538                 "pop %%eax \n\t"
1539 #endif
1540
1541                 /* Save guest registers, load host registers */
1542 #ifdef CONFIG_X86_64
1543                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1544                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1545                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1546                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1547                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1548                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1549                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1550                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1551                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1552                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1553                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1554                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1555                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1556                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1557
1558                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1559                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1560                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1561                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1562 #else
1563                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1564                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1565                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1566                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1567                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1568                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1569
1570                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1571                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1572 #endif
1573                 :
1574                 : [vcpu]"a"(vcpu),
1575                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1576                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1577                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1578                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1579                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1580                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1581                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1582                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1583 #ifdef CONFIG_X86_64
1584                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1585                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1586                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1587                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1588                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1589                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1590                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1591                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1592 #endif
1593                 : "cc", "memory" );
1594
1595         fx_save(vcpu->guest_fx_image);
1596         fx_restore(vcpu->host_fx_image);
1597
1598         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1599                 load_db_regs(vcpu->svm->host_db_regs);
1600
1601         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1602
1603         write_dr6(vcpu->svm->host_dr6);
1604         write_dr7(vcpu->svm->host_dr7);
1605         kvm_write_cr2(vcpu->svm->host_cr2);
1606
1607         load_fs(fs_selector);
1608         load_gs(gs_selector);
1609         load_ldt(ldt_selector);
1610         load_host_msrs(vcpu);
1611
1612         reload_tss(vcpu);
1613
1614         /*
1615          * Profile KVM exit RIPs:
1616          */
1617         if (unlikely(prof_on == KVM_PROFILING))
1618                 profile_hit(KVM_PROFILING,
1619                         (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1620
1621         stgi();
1622
1623         kvm_reput_irq(vcpu);
1624
1625         vcpu->svm->next_rip = 0;
1626
1627         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1628                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1629                 kvm_run->fail_entry.hardware_entry_failure_reason
1630                         = vcpu->svm->vmcb->control.exit_code;
1631                 post_kvm_run_save(vcpu, kvm_run);
1632                 return 0;
1633         }
1634
1635         r = handle_exit(vcpu, kvm_run);
1636         if (r > 0) {
1637                 if (signal_pending(current)) {
1638                         ++kvm_stat.signal_exits;
1639                         post_kvm_run_save(vcpu, kvm_run);
1640                         kvm_run->exit_reason = KVM_EXIT_INTR;
1641                         return -EINTR;
1642                 }
1643
1644                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1645                         ++kvm_stat.request_irq_exits;
1646                         post_kvm_run_save(vcpu, kvm_run);
1647                         kvm_run->exit_reason = KVM_EXIT_INTR;
1648                         return -EINTR;
1649                 }
1650                 kvm_resched(vcpu);
1651                 goto again;
1652         }
1653         post_kvm_run_save(vcpu, kvm_run);
1654         return r;
1655 }
1656
1657 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1658 {
1659         force_new_asid(vcpu);
1660 }
1661
1662 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1663 {
1664         vcpu->svm->vmcb->save.cr3 = root;
1665         force_new_asid(vcpu);
1666 }
1667
1668 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1669                                   unsigned long  addr,
1670                                   uint32_t err_code)
1671 {
1672         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1673
1674         ++kvm_stat.pf_guest;
1675
1676         if (is_page_fault(exit_int_info)) {
1677
1678                 vcpu->svm->vmcb->control.event_inj_err = 0;
1679                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1680                                                         SVM_EVTINJ_VALID_ERR |
1681                                                         SVM_EVTINJ_TYPE_EXEPT |
1682                                                         DF_VECTOR;
1683                 return;
1684         }
1685         vcpu->cr2 = addr;
1686         vcpu->svm->vmcb->save.cr2 = addr;
1687         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1688                                                 SVM_EVTINJ_VALID_ERR |
1689                                                 SVM_EVTINJ_TYPE_EXEPT |
1690                                                 PF_VECTOR;
1691         vcpu->svm->vmcb->control.event_inj_err = err_code;
1692 }
1693
1694
1695 static int is_disabled(void)
1696 {
1697         return 0;
1698 }
1699
1700 static void
1701 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1702 {
1703         /*
1704          * Patch in the VMMCALL instruction:
1705          */
1706         hypercall[0] = 0x0f;
1707         hypercall[1] = 0x01;
1708         hypercall[2] = 0xd9;
1709         hypercall[3] = 0xc3;
1710 }
1711
1712 static struct kvm_arch_ops svm_arch_ops = {
1713         .cpu_has_kvm_support = has_svm,
1714         .disabled_by_bios = is_disabled,
1715         .hardware_setup = svm_hardware_setup,
1716         .hardware_unsetup = svm_hardware_unsetup,
1717         .hardware_enable = svm_hardware_enable,
1718         .hardware_disable = svm_hardware_disable,
1719
1720         .vcpu_create = svm_create_vcpu,
1721         .vcpu_free = svm_free_vcpu,
1722
1723         .vcpu_load = svm_vcpu_load,
1724         .vcpu_put = svm_vcpu_put,
1725         .vcpu_decache = svm_vcpu_decache,
1726
1727         .set_guest_debug = svm_guest_debug,
1728         .get_msr = svm_get_msr,
1729         .set_msr = svm_set_msr,
1730         .get_segment_base = svm_get_segment_base,
1731         .get_segment = svm_get_segment,
1732         .set_segment = svm_set_segment,
1733         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1734         .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1735         .set_cr0 = svm_set_cr0,
1736         .set_cr3 = svm_set_cr3,
1737         .set_cr4 = svm_set_cr4,
1738         .set_efer = svm_set_efer,
1739         .get_idt = svm_get_idt,
1740         .set_idt = svm_set_idt,
1741         .get_gdt = svm_get_gdt,
1742         .set_gdt = svm_set_gdt,
1743         .get_dr = svm_get_dr,
1744         .set_dr = svm_set_dr,
1745         .cache_regs = svm_cache_regs,
1746         .decache_regs = svm_decache_regs,
1747         .get_rflags = svm_get_rflags,
1748         .set_rflags = svm_set_rflags,
1749
1750         .invlpg = svm_invlpg,
1751         .tlb_flush = svm_flush_tlb,
1752         .inject_page_fault = svm_inject_page_fault,
1753
1754         .inject_gp = svm_inject_gp,
1755
1756         .run = svm_vcpu_run,
1757         .skip_emulated_instruction = skip_emulated_instruction,
1758         .vcpu_setup = svm_vcpu_setup,
1759         .patch_hypercall = svm_patch_hypercall,
1760 };
1761
1762 static int __init svm_init(void)
1763 {
1764         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1765 }
1766
1767 static void __exit svm_exit(void)
1768 {
1769         kvm_exit_arch();
1770 }
1771
1772 module_init(svm_init)
1773 module_exit(svm_exit)