drivers/kvm/svm.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * AMD SVM support
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  *
   8  * Authors:
   9  *   Yaniv Kamay  <yaniv@qumranet.com>
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *
  12  * This work is licensed under the terms of the GNU GPL, version 2.  See
  13  * the COPYING file in the top-level directory.
  14  *
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/vmalloc.h>
  20 #include <linux/highmem.h>
  21 #include <linux/profile.h>
  22 #include <asm/desc.h>
  23
  24 #include "kvm_svm.h"
  25 #include "x86_emulate.h"
  26
  27 MODULE_AUTHOR("Qumranet");
  28 MODULE_LICENSE("GPL");
  29
  30 #define IOPM_ALLOC_ORDER 2
  31 #define MSRPM_ALLOC_ORDER 1
  32
  33 #define DB_VECTOR 1
  34 #define UD_VECTOR 6
  35 #define GP_VECTOR 13
  36
  37 #define DR7_GD_MASK (1 << 13)
  38 #define DR6_BD_MASK (1 << 13)
  39 #define CR4_DE_MASK (1UL << 3)
  40
  41 #define SEG_TYPE_LDT 2
  42 #define SEG_TYPE_BUSY_TSS16 3
  43
  44 #define KVM_EFER_LMA (1 << 10)
  45 #define KVM_EFER_LME (1 << 8)
  46
  47 #define SVM_FEATURE_NPT  (1 << 0)
  48 #define SVM_FEATURE_LBRV (1 << 1)
  49 #define SVM_DEATURE_SVML (1 << 2)
  50
  51 unsigned long iopm_base;
  52 unsigned long msrpm_base;
  53
  54 struct kvm_ldttss_desc {
  55         u16 limit0;
  56         u16 base0;
  57         unsigned base1 : 8, type : 5, dpl : 2, p : 1;
  58         unsigned limit1 : 4, zero0 : 3, g : 1, base2 : 8;
  59         u32 base3;
  60         u32 zero1;
  61 } __attribute__((packed));
  62
  63 struct svm_cpu_data {
  64         int cpu;
  65
  66         u64 asid_generation;
  67         u32 max_asid;
  68         u32 next_asid;
  69         struct kvm_ldttss_desc *tss_desc;
  70
  71         struct page *save_area;
  72 };
  73
  74 static DEFINE_PER_CPU(struct svm_cpu_data *, svm_data);
  75 static uint32_t svm_features;
  76
  77 struct svm_init_data {
  78         int cpu;
  79         int r;
  80 };
  81
  82 static u32 msrpm_ranges[] = {0, 0xc0000000, 0xc0010000};
  83
  84 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
  85 #define MSRS_RANGE_SIZE 2048
  86 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
  87
  88 #define MAX_INST_SIZE 15
  89
  90 static inline u32 svm_has(u32 feat)
  91 {
  92         return svm_features & feat;
  93 }
  94
  95 static unsigned get_addr_size(struct kvm_vcpu *vcpu)
  96 {
  97         struct vmcb_save_area *sa = &vcpu->svm->vmcb->save;
  98         u16 cs_attrib;
  99
 100         if (!(sa->cr0 & CR0_PE_MASK) || (sa->rflags & X86_EFLAGS_VM))
 101                 return 2;
 102
 103         cs_attrib = sa->cs.attrib;
 104
 105         return (cs_attrib & SVM_SELECTOR_L_MASK) ? 8 :
 106                                 (cs_attrib & SVM_SELECTOR_DB_MASK) ? 4 : 2;
 107 }
 108
 109 static inline u8 pop_irq(struct kvm_vcpu *vcpu)
 110 {
 111         int word_index = __ffs(vcpu->irq_summary);
 112         int bit_index = __ffs(vcpu->irq_pending[word_index]);
 113         int irq = word_index * BITS_PER_LONG + bit_index;
 114
 115         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
 116         if (!vcpu->irq_pending[word_index])
 117                 clear_bit(word_index, &vcpu->irq_summary);
 118         return irq;
 119 }
 120
 121 static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
 122 {
 123         set_bit(irq, vcpu->irq_pending);
 124         set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
 125 }
 126
 127 static inline void clgi(void)
 128 {
 129         asm volatile (SVM_CLGI);
 130 }
 131
 132 static inline void stgi(void)
 133 {
 134         asm volatile (SVM_STGI);
 135 }
 136
 137 static inline void invlpga(unsigned long addr, u32 asid)
 138 {
 139         asm volatile (SVM_INVLPGA :: "a"(addr), "c"(asid));
 140 }
 141
 142 static inline unsigned long kvm_read_cr2(void)
 143 {
 144         unsigned long cr2;
 145
 146         asm volatile ("mov %%cr2, %0" : "=r" (cr2));
 147         return cr2;
 148 }
 149
 150 static inline void kvm_write_cr2(unsigned long val)
 151 {
 152         asm volatile ("mov %0, %%cr2" :: "r" (val));
 153 }
 154
 155 static inline unsigned long read_dr6(void)
 156 {
 157         unsigned long dr6;
 158
 159         asm volatile ("mov %%dr6, %0" : "=r" (dr6));
 160         return dr6;
 161 }
 162
 163 static inline void write_dr6(unsigned long val)
 164 {
 165         asm volatile ("mov %0, %%dr6" :: "r" (val));
 166 }
 167
 168 static inline unsigned long read_dr7(void)
 169 {
 170         unsigned long dr7;
 171
 172         asm volatile ("mov %%dr7, %0" : "=r" (dr7));
 173         return dr7;
 174 }
 175
 176 static inline void write_dr7(unsigned long val)
 177 {
 178         asm volatile ("mov %0, %%dr7" :: "r" (val));
 179 }
 180
 181 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 182 {
 183         vcpu->svm->asid_generation--;
 184 }
 185
 186 static inline void flush_guest_tlb(struct kvm_vcpu *vcpu)
 187 {
 188         force_new_asid(vcpu);
 189 }
 190
 191 static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 192 {
 193         if (!(efer & KVM_EFER_LMA))
 194                 efer &= ~KVM_EFER_LME;
 195
 196         vcpu->svm->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
 197         vcpu->shadow_efer = efer;
 198 }
 199
 200 static void svm_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 201 {
 202         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 203                                                 SVM_EVTINJ_VALID_ERR |
 204                                                 SVM_EVTINJ_TYPE_EXEPT |
 205                                                 GP_VECTOR;
 206         vcpu->svm->vmcb->control.event_inj_err = error_code;
 207 }
 208
 209 static void inject_ud(struct kvm_vcpu *vcpu)
 210 {
 211         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
 212                                                 SVM_EVTINJ_TYPE_EXEPT |
 213                                                 UD_VECTOR;
 214 }
 215
 216 static int is_page_fault(uint32_t info)
 217 {
 218         info &= SVM_EVTINJ_VEC_MASK | SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 219         return info == (PF_VECTOR | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT);
 220 }
 221
 222 static int is_external_interrupt(u32 info)
 223 {
 224         info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
 225         return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
 226 }
 227
 228 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 229 {
 230         if (!vcpu->svm->next_rip) {
 231                 printk(KERN_DEBUG "%s: NOP\n", __FUNCTION__);
 232                 return;
 233         }
 234         if (vcpu->svm->next_rip - vcpu->svm->vmcb->save.rip > 15) {
 235                 printk(KERN_ERR "%s: ip 0x%llx next 0x%llx\n",
 236                        __FUNCTION__,
 237                        vcpu->svm->vmcb->save.rip,
 238                        vcpu->svm->next_rip);
 239         }
 240
 241         vcpu->rip = vcpu->svm->vmcb->save.rip = vcpu->svm->next_rip;
 242         vcpu->svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 243
 244         vcpu->interrupt_window_open = 1;
 245 }
 246
 247 static int has_svm(void)
 248 {
 249         uint32_t eax, ebx, ecx, edx;
 250
 251         if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
 252                 printk(KERN_INFO "has_svm: not amd\n");
 253                 return 0;
 254         }
 255
 256         cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
 257         if (eax < SVM_CPUID_FUNC) {
 258                 printk(KERN_INFO "has_svm: can't execute cpuid_8000000a\n");
 259                 return 0;
 260         }
 261
 262         cpuid(0x80000001, &eax, &ebx, &ecx, &edx);
 263         if (!(ecx & (1 << SVM_CPUID_FEATURE_SHIFT))) {
 264                 printk(KERN_DEBUG "has_svm: svm not available\n");
 265                 return 0;
 266         }
 267         return 1;
 268 }
 269
 270 static void svm_hardware_disable(void *garbage)
 271 {
 272         struct svm_cpu_data *svm_data
 273                 = per_cpu(svm_data, raw_smp_processor_id());
 274
 275         if (svm_data) {
 276                 uint64_t efer;
 277
 278                 wrmsrl(MSR_VM_HSAVE_PA, 0);
 279                 rdmsrl(MSR_EFER, efer);
 280                 wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
 281                 per_cpu(svm_data, raw_smp_processor_id()) = NULL;
 282                 __free_page(svm_data->save_area);
 283                 kfree(svm_data);
 284         }
 285 }
 286
 287 static void svm_hardware_enable(void *garbage)
 288 {
 289
 290         struct svm_cpu_data *svm_data;
 291         uint64_t efer;
 292 #ifdef CONFIG_X86_64
 293         struct desc_ptr gdt_descr;
 294 #else
 295         struct Xgt_desc_struct gdt_descr;
 296 #endif
 297         struct desc_struct *gdt;
 298         int me = raw_smp_processor_id();
 299
 300         if (!has_svm()) {
 301                 printk(KERN_ERR "svm_cpu_init: err EOPNOTSUPP on %d\n", me);
 302                 return;
 303         }
 304         svm_data = per_cpu(svm_data, me);
 305
 306         if (!svm_data) {
 307                 printk(KERN_ERR "svm_cpu_init: svm_data is NULL on %d\n",
 308                        me);
 309                 return;
 310         }
 311
 312         svm_data->asid_generation = 1;
 313         svm_data->max_asid = cpuid_ebx(SVM_CPUID_FUNC) - 1;
 314         svm_data->next_asid = svm_data->max_asid + 1;
 315         svm_features = cpuid_edx(SVM_CPUID_FUNC);
 316
 317         asm volatile ( "sgdt %0" : "=m"(gdt_descr) );
 318         gdt = (struct desc_struct *)gdt_descr.address;
 319         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 320
 321         rdmsrl(MSR_EFER, efer);
 322         wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
 323
 324         wrmsrl(MSR_VM_HSAVE_PA,
 325                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
 326 }
 327
 328 static int svm_cpu_init(int cpu)
 329 {
 330         struct svm_cpu_data *svm_data;
 331         int r;
 332
 333         svm_data = kzalloc(sizeof(struct svm_cpu_data), GFP_KERNEL);
 334         if (!svm_data)
 335                 return -ENOMEM;
 336         svm_data->cpu = cpu;
 337         svm_data->save_area = alloc_page(GFP_KERNEL);
 338         r = -ENOMEM;
 339         if (!svm_data->save_area)
 340                 goto err_1;
 341
 342         per_cpu(svm_data, cpu) = svm_data;
 343
 344         return 0;
 345
 346 err_1:
 347         kfree(svm_data);
 348         return r;
 349
 350 }
 351
 352 static int set_msr_interception(u32 *msrpm, unsigned msr,
 353                                 int read, int write)
 354 {
 355         int i;
 356
 357         for (i = 0; i < NUM_MSR_MAPS; i++) {
 358                 if (msr >= msrpm_ranges[i] &&
 359                     msr < msrpm_ranges[i] + MSRS_IN_RANGE) {
 360                         u32 msr_offset = (i * MSRS_IN_RANGE + msr -
 361                                           msrpm_ranges[i]) * 2;
 362
 363                         u32 *base = msrpm + (msr_offset / 32);
 364                         u32 msr_shift = msr_offset % 32;
 365                         u32 mask = ((write) ? 0 : 2) | ((read) ? 0 : 1);
 366                         *base = (*base & ~(0x3 << msr_shift)) |
 367                                 (mask << msr_shift);
 368                         return 1;
 369                 }
 370         }
 371         printk(KERN_DEBUG "%s: not found 0x%x\n", __FUNCTION__, msr);
 372         return 0;
 373 }
 374
 375 static __init int svm_hardware_setup(void)
 376 {
 377         int cpu;
 378         struct page *iopm_pages;
 379         struct page *msrpm_pages;
 380         void *msrpm_va;
 381         int r;
 382
 383         kvm_emulator_want_group7_invlpg();
 384
 385         iopm_pages = alloc_pages(GFP_KERNEL, IOPM_ALLOC_ORDER);
 386
 387         if (!iopm_pages)
 388                 return -ENOMEM;
 389         memset(page_address(iopm_pages), 0xff,
 390                                         PAGE_SIZE * (1 << IOPM_ALLOC_ORDER));
 391         iopm_base = page_to_pfn(iopm_pages) << PAGE_SHIFT;
 392
 393
 394         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
 395
 396         r = -ENOMEM;
 397         if (!msrpm_pages)
 398                 goto err_1;
 399
 400         msrpm_va = page_address(msrpm_pages);
 401         memset(msrpm_va, 0xff, PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER));
 402         msrpm_base = page_to_pfn(msrpm_pages) << PAGE_SHIFT;
 403
 404 #ifdef CONFIG_X86_64
 405         set_msr_interception(msrpm_va, MSR_GS_BASE, 1, 1);
 406         set_msr_interception(msrpm_va, MSR_FS_BASE, 1, 1);
 407         set_msr_interception(msrpm_va, MSR_KERNEL_GS_BASE, 1, 1);
 408         set_msr_interception(msrpm_va, MSR_LSTAR, 1, 1);
 409         set_msr_interception(msrpm_va, MSR_CSTAR, 1, 1);
 410         set_msr_interception(msrpm_va, MSR_SYSCALL_MASK, 1, 1);
 411 #endif
 412         set_msr_interception(msrpm_va, MSR_K6_STAR, 1, 1);
 413         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_CS, 1, 1);
 414         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_ESP, 1, 1);
 415         set_msr_interception(msrpm_va, MSR_IA32_SYSENTER_EIP, 1, 1);
 416
 417         for_each_online_cpu(cpu) {
 418                 r = svm_cpu_init(cpu);
 419                 if (r)
 420                         goto err_2;
 421         }
 422         return 0;
 423
 424 err_2:
 425         __free_pages(msrpm_pages, MSRPM_ALLOC_ORDER);
 426         msrpm_base = 0;
 427 err_1:
 428         __free_pages(iopm_pages, IOPM_ALLOC_ORDER);
 429         iopm_base = 0;
 430         return r;
 431 }
 432
 433 static __exit void svm_hardware_unsetup(void)
 434 {
 435         __free_pages(pfn_to_page(msrpm_base >> PAGE_SHIFT), MSRPM_ALLOC_ORDER);
 436         __free_pages(pfn_to_page(iopm_base >> PAGE_SHIFT), IOPM_ALLOC_ORDER);
 437         iopm_base = msrpm_base = 0;
 438 }
 439
 440 static void init_seg(struct vmcb_seg *seg)
 441 {
 442         seg->selector = 0;
 443         seg->attrib = SVM_SELECTOR_P_MASK | SVM_SELECTOR_S_MASK |
 444                 SVM_SELECTOR_WRITE_MASK; /* Read/Write Data Segment */
 445         seg->limit = 0xffff;
 446         seg->base = 0;
 447 }
 448
 449 static void init_sys_seg(struct vmcb_seg *seg, uint32_t type)
 450 {
 451         seg->selector = 0;
 452         seg->attrib = SVM_SELECTOR_P_MASK | type;
 453         seg->limit = 0xffff;
 454         seg->base = 0;
 455 }
 456
 457 static int svm_vcpu_setup(struct kvm_vcpu *vcpu)
 458 {
 459         return 0;
 460 }
 461
 462 static void init_vmcb(struct vmcb *vmcb)
 463 {
 464         struct vmcb_control_area *control = &vmcb->control;
 465         struct vmcb_save_area *save = &vmcb->save;
 466
 467         control->intercept_cr_read =    INTERCEPT_CR0_MASK |
 468                                         INTERCEPT_CR3_MASK |
 469                                         INTERCEPT_CR4_MASK;
 470
 471         control->intercept_cr_write =   INTERCEPT_CR0_MASK |
 472                                         INTERCEPT_CR3_MASK |
 473                                         INTERCEPT_CR4_MASK;
 474
 475         control->intercept_dr_read =    INTERCEPT_DR0_MASK |
 476                                         INTERCEPT_DR1_MASK |
 477                                         INTERCEPT_DR2_MASK |
 478                                         INTERCEPT_DR3_MASK;
 479
 480         control->intercept_dr_write =   INTERCEPT_DR0_MASK |
 481                                         INTERCEPT_DR1_MASK |
 482                                         INTERCEPT_DR2_MASK |
 483                                         INTERCEPT_DR3_MASK |
 484                                         INTERCEPT_DR5_MASK |
 485                                         INTERCEPT_DR7_MASK;
 486
 487         control->intercept_exceptions = 1 << PF_VECTOR;
 488
 489
 490         control->intercept =    (1ULL << INTERCEPT_INTR) |
 491                                 (1ULL << INTERCEPT_NMI) |
 492                                 (1ULL << INTERCEPT_SMI) |
 493                 /*
 494                  * selective cr0 intercept bug?
 495                  *      0:   0f 22 d8                mov    %eax,%cr3
 496                  *      3:   0f 20 c0                mov    %cr0,%eax
 497                  *      6:   0d 00 00 00 80          or     $0x80000000,%eax
 498                  *      b:   0f 22 c0                mov    %eax,%cr0
 499                  * set cr3 ->interception
 500                  * get cr0 ->interception
 501                  * set cr0 -> no interception
 502                  */
 503                 /*              (1ULL << INTERCEPT_SELECTIVE_CR0) | */
 504                                 (1ULL << INTERCEPT_CPUID) |
 505                                 (1ULL << INTERCEPT_HLT) |
 506                                 (1ULL << INTERCEPT_INVLPGA) |
 507                                 (1ULL << INTERCEPT_IOIO_PROT) |
 508                                 (1ULL << INTERCEPT_MSR_PROT) |
 509                                 (1ULL << INTERCEPT_TASK_SWITCH) |
 510                                 (1ULL << INTERCEPT_SHUTDOWN) |
 511                                 (1ULL << INTERCEPT_VMRUN) |
 512                                 (1ULL << INTERCEPT_VMMCALL) |
 513                                 (1ULL << INTERCEPT_VMLOAD) |
 514                                 (1ULL << INTERCEPT_VMSAVE) |
 515                                 (1ULL << INTERCEPT_STGI) |
 516                                 (1ULL << INTERCEPT_CLGI) |
 517                                 (1ULL << INTERCEPT_SKINIT) |
 518                                 (1ULL << INTERCEPT_MONITOR) |
 519                                 (1ULL << INTERCEPT_MWAIT);
 520
 521         control->iopm_base_pa = iopm_base;
 522         control->msrpm_base_pa = msrpm_base;
 523         control->tsc_offset = 0;
 524         control->int_ctl = V_INTR_MASKING_MASK;
 525         if (svm_has(SVM_FEATURE_LBRV))
 526                 control->lbr_ctl = 1ULL;
 527
 528         init_seg(&save->es);
 529         init_seg(&save->ss);
 530         init_seg(&save->ds);
 531         init_seg(&save->fs);
 532         init_seg(&save->gs);
 533
 534         save->cs.selector = 0xf000;
 535         /* Executable/Readable Code Segment */
 536         save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK |
 537                 SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK;
 538         save->cs.limit = 0xffff;
 539         /*
 540          * cs.base should really be 0xffff0000, but vmx can't handle that, so
 541          * be consistent with it.
 542          *
 543          * Replace when we have real mode working for vmx.
 544          */
 545         save->cs.base = 0xf0000;
 546
 547         save->gdtr.limit = 0xffff;
 548         save->idtr.limit = 0xffff;
 549
 550         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
 551         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 552
 553         save->efer = MSR_EFER_SVME_MASK;
 554
 555         save->dr6 = 0xffff0ff0;
 556         save->dr7 = 0x400;
 557         save->rflags = 2;
 558         save->rip = 0x0000fff0;
 559
 560         /*
 561          * cr0 val on cpu init should be 0x60000010, we enable cpu
 562          * cache by default. the orderly way is to enable cache in bios.
 563          */
 564         save->cr0 = 0x00000010 | CR0_PG_MASK | CR0_WP_MASK;
 565         save->cr4 = CR4_PAE_MASK;
 566         /* rdx = ?? */
 567 }
 568
 569 static int svm_create_vcpu(struct kvm_vcpu *vcpu)
 570 {
 571         struct page *page;
 572         int r;
 573
 574         r = -ENOMEM;
 575         vcpu->svm = kzalloc(sizeof *vcpu->svm, GFP_KERNEL);
 576         if (!vcpu->svm)
 577                 goto out1;
 578         page = alloc_page(GFP_KERNEL);
 579         if (!page)
 580                 goto out2;
 581
 582         vcpu->svm->vmcb = page_address(page);
 583         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 584         vcpu->svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
 585         vcpu->svm->asid_generation = 0;
 586         memset(vcpu->svm->db_regs, 0, sizeof(vcpu->svm->db_regs));
 587         init_vmcb(vcpu->svm->vmcb);
 588
 589         fx_init(vcpu);
 590         vcpu->apic_base = 0xfee00000 |
 591                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
 592                         MSR_IA32_APICBASE_ENABLE;
 593
 594         return 0;
 595
 596 out2:
 597         kfree(vcpu->svm);
 598 out1:
 599         return r;
 600 }
 601
 602 static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 603 {
 604         if (!vcpu->svm)
 605                 return;
 606         if (vcpu->svm->vmcb)
 607                 __free_page(pfn_to_page(vcpu->svm->vmcb_pa >> PAGE_SHIFT));
 608         kfree(vcpu->svm);
 609 }
 610
 611 static void svm_vcpu_load(struct kvm_vcpu *vcpu)
 612 {
 613         int cpu;
 614
 615         cpu = get_cpu();
 616         if (unlikely(cpu != vcpu->cpu)) {
 617                 u64 tsc_this, delta;
 618
 619                 /*
 620                  * Make sure that the guest sees a monotonically
 621                  * increasing TSC.
 622                  */
 623                 rdtscll(tsc_this);
 624                 delta = vcpu->host_tsc - tsc_this;
 625                 vcpu->svm->vmcb->control.tsc_offset += delta;
 626                 vcpu->cpu = cpu;
 627         }
 628 }
 629
 630 static void svm_vcpu_put(struct kvm_vcpu *vcpu)
 631 {
 632         rdtscll(vcpu->host_tsc);
 633         put_cpu();
 634 }
 635
 636 static void svm_vcpu_decache(struct kvm_vcpu *vcpu)
 637 {
 638 }
 639
 640 static void svm_cache_regs(struct kvm_vcpu *vcpu)
 641 {
 642         vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax;
 643         vcpu->regs[VCPU_REGS_RSP] = vcpu->svm->vmcb->save.rsp;
 644         vcpu->rip = vcpu->svm->vmcb->save.rip;
 645 }
 646
 647 static void svm_decache_regs(struct kvm_vcpu *vcpu)
 648 {
 649         vcpu->svm->vmcb->save.rax = vcpu->regs[VCPU_REGS_RAX];
 650         vcpu->svm->vmcb->save.rsp = vcpu->regs[VCPU_REGS_RSP];
 651         vcpu->svm->vmcb->save.rip = vcpu->rip;
 652 }
 653
 654 static unsigned long svm_get_rflags(struct kvm_vcpu *vcpu)
 655 {
 656         return vcpu->svm->vmcb->save.rflags;
 657 }
 658
 659 static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 660 {
 661         vcpu->svm->vmcb->save.rflags = rflags;
 662 }
 663
 664 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 665 {
 666         struct vmcb_save_area *save = &vcpu->svm->vmcb->save;
 667
 668         switch (seg) {
 669         case VCPU_SREG_CS: return &save->cs;
 670         case VCPU_SREG_DS: return &save->ds;
 671         case VCPU_SREG_ES: return &save->es;
 672         case VCPU_SREG_FS: return &save->fs;
 673         case VCPU_SREG_GS: return &save->gs;
 674         case VCPU_SREG_SS: return &save->ss;
 675         case VCPU_SREG_TR: return &save->tr;
 676         case VCPU_SREG_LDTR: return &save->ldtr;
 677         }
 678         BUG();
 679         return NULL;
 680 }
 681
 682 static u64 svm_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 683 {
 684         struct vmcb_seg *s = svm_seg(vcpu, seg);
 685
 686         return s->base;
 687 }
 688
 689 static void svm_get_segment(struct kvm_vcpu *vcpu,
 690                             struct kvm_segment *var, int seg)
 691 {
 692         struct vmcb_seg *s = svm_seg(vcpu, seg);
 693
 694         var->base = s->base;
 695         var->limit = s->limit;
 696         var->selector = s->selector;
 697         var->type = s->attrib & SVM_SELECTOR_TYPE_MASK;
 698         var->s = (s->attrib >> SVM_SELECTOR_S_SHIFT) & 1;
 699         var->dpl = (s->attrib >> SVM_SELECTOR_DPL_SHIFT) & 3;
 700         var->present = (s->attrib >> SVM_SELECTOR_P_SHIFT) & 1;
 701         var->avl = (s->attrib >> SVM_SELECTOR_AVL_SHIFT) & 1;
 702         var->l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 703         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 704         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 705         var->unusable = !var->present;
 706 }
 707
 708 static void svm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 709 {
 710         struct vmcb_seg *s = svm_seg(vcpu, VCPU_SREG_CS);
 711
 712         *db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
 713         *l = (s->attrib >> SVM_SELECTOR_L_SHIFT) & 1;
 714 }
 715
 716 static void svm_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 717 {
 718         dt->limit = vcpu->svm->vmcb->save.idtr.limit;
 719         dt->base = vcpu->svm->vmcb->save.idtr.base;
 720 }
 721
 722 static void svm_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 723 {
 724         vcpu->svm->vmcb->save.idtr.limit = dt->limit;
 725         vcpu->svm->vmcb->save.idtr.base = dt->base ;
 726 }
 727
 728 static void svm_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 729 {
 730         dt->limit = vcpu->svm->vmcb->save.gdtr.limit;
 731         dt->base = vcpu->svm->vmcb->save.gdtr.base;
 732 }
 733
 734 static void svm_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 735 {
 736         vcpu->svm->vmcb->save.gdtr.limit = dt->limit;
 737         vcpu->svm->vmcb->save.gdtr.base = dt->base ;
 738 }
 739
 740 static void svm_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
 741 {
 742 }
 743
 744 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 745 {
 746 #ifdef CONFIG_X86_64
 747         if (vcpu->shadow_efer & KVM_EFER_LME) {
 748                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK)) {
 749                         vcpu->shadow_efer |= KVM_EFER_LMA;
 750                         vcpu->svm->vmcb->save.efer |= KVM_EFER_LMA | KVM_EFER_LME;
 751                 }
 752
 753                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK) ) {
 754                         vcpu->shadow_efer &= ~KVM_EFER_LMA;
 755                         vcpu->svm->vmcb->save.efer &= ~(KVM_EFER_LMA | KVM_EFER_LME);
 756                 }
 757         }
 758 #endif
 759         vcpu->cr0 = cr0;
 760         cr0 |= CR0_PG_MASK | CR0_WP_MASK;
 761         cr0 &= ~(CR0_CD_MASK | CR0_NW_MASK);
 762         vcpu->svm->vmcb->save.cr0 = cr0;
 763 }
 764
 765 static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 766 {
 767        vcpu->cr4 = cr4;
 768        vcpu->svm->vmcb->save.cr4 = cr4 | CR4_PAE_MASK;
 769 }
 770
 771 static void svm_set_segment(struct kvm_vcpu *vcpu,
 772                             struct kvm_segment *var, int seg)
 773 {
 774         struct vmcb_seg *s = svm_seg(vcpu, seg);
 775
 776         s->base = var->base;
 777         s->limit = var->limit;
 778         s->selector = var->selector;
 779         if (var->unusable)
 780                 s->attrib = 0;
 781         else {
 782                 s->attrib = (var->type & SVM_SELECTOR_TYPE_MASK);
 783                 s->attrib |= (var->s & 1) << SVM_SELECTOR_S_SHIFT;
 784                 s->attrib |= (var->dpl & 3) << SVM_SELECTOR_DPL_SHIFT;
 785                 s->attrib |= (var->present & 1) << SVM_SELECTOR_P_SHIFT;
 786                 s->attrib |= (var->avl & 1) << SVM_SELECTOR_AVL_SHIFT;
 787                 s->attrib |= (var->l & 1) << SVM_SELECTOR_L_SHIFT;
 788                 s->attrib |= (var->db & 1) << SVM_SELECTOR_DB_SHIFT;
 789                 s->attrib |= (var->g & 1) << SVM_SELECTOR_G_SHIFT;
 790         }
 791         if (seg == VCPU_SREG_CS)
 792                 vcpu->svm->vmcb->save.cpl
 793                         = (vcpu->svm->vmcb->save.cs.attrib
 794                            >> SVM_SELECTOR_DPL_SHIFT) & 3;
 795
 796 }
 797
 798 /* FIXME:
 799
 800         vcpu->svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
 801         vcpu->svm->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
 802
 803 */
 804
 805 static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 806 {
 807         return -EOPNOTSUPP;
 808 }
 809
 810 static void load_host_msrs(struct kvm_vcpu *vcpu)
 811 {
 812         int i;
 813
 814         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 815                 wrmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 816 }
 817
 818 static void save_host_msrs(struct kvm_vcpu *vcpu)
 819 {
 820         int i;
 821
 822         for ( i = 0; i < NR_HOST_SAVE_MSRS; i++)
 823                 rdmsrl(host_save_msrs[i], vcpu->svm->host_msrs[i]);
 824 }
 825
 826 static void new_asid(struct kvm_vcpu *vcpu, struct svm_cpu_data *svm_data)
 827 {
 828         if (svm_data->next_asid > svm_data->max_asid) {
 829                 ++svm_data->asid_generation;
 830                 svm_data->next_asid = 1;
 831                 vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_FLUSH_ALL_ASID;
 832         }
 833
 834         vcpu->cpu = svm_data->cpu;
 835         vcpu->svm->asid_generation = svm_data->asid_generation;
 836         vcpu->svm->vmcb->control.asid = svm_data->next_asid++;
 837 }
 838
 839 static void svm_invlpg(struct kvm_vcpu *vcpu, gva_t address)
 840 {
 841         invlpga(address, vcpu->svm->vmcb->control.asid); // is needed?
 842 }
 843
 844 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 845 {
 846         return vcpu->svm->db_regs[dr];
 847 }
 848
 849 static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 850                        int *exception)
 851 {
 852         *exception = 0;
 853
 854         if (vcpu->svm->vmcb->save.dr7 & DR7_GD_MASK) {
 855                 vcpu->svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
 856                 vcpu->svm->vmcb->save.dr6 |= DR6_BD_MASK;
 857                 *exception = DB_VECTOR;
 858                 return;
 859         }
 860
 861         switch (dr) {
 862         case 0 ... 3:
 863                 vcpu->svm->db_regs[dr] = value;
 864                 return;
 865         case 4 ... 5:
 866                 if (vcpu->cr4 & CR4_DE_MASK) {
 867                         *exception = UD_VECTOR;
 868                         return;
 869                 }
 870         case 7: {
 871                 if (value & ~((1ULL << 32) - 1)) {
 872                         *exception = GP_VECTOR;
 873                         return;
 874                 }
 875                 vcpu->svm->vmcb->save.dr7 = value;
 876                 return;
 877         }
 878         default:
 879                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
 880                        __FUNCTION__, dr);
 881                 *exception = UD_VECTOR;
 882                 return;
 883         }
 884 }
 885
 886 static int pf_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 887 {
 888         u32 exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
 889         u64 fault_address;
 890         u32 error_code;
 891         enum emulation_result er;
 892         int r;
 893
 894         if (is_external_interrupt(exit_int_info))
 895                 push_irq(vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
 896
 897         spin_lock(&vcpu->kvm->lock);
 898
 899         fault_address  = vcpu->svm->vmcb->control.exit_info_2;
 900         error_code = vcpu->svm->vmcb->control.exit_info_1;
 901         r = kvm_mmu_page_fault(vcpu, fault_address, error_code);
 902         if (r < 0) {
 903                 spin_unlock(&vcpu->kvm->lock);
 904                 return r;
 905         }
 906         if (!r) {
 907                 spin_unlock(&vcpu->kvm->lock);
 908                 return 1;
 909         }
 910         er = emulate_instruction(vcpu, kvm_run, fault_address, error_code);
 911         spin_unlock(&vcpu->kvm->lock);
 912
 913         switch (er) {
 914         case EMULATE_DONE:
 915                 return 1;
 916         case EMULATE_DO_MMIO:
 917                 ++vcpu->stat.mmio_exits;
 918                 kvm_run->exit_reason = KVM_EXIT_MMIO;
 919                 return 0;
 920         case EMULATE_FAIL:
 921                 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
 922                 break;
 923         default:
 924                 BUG();
 925         }
 926
 927         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
 928         return 0;
 929 }
 930
 931 static int shutdown_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 932 {
 933         /*
 934          * VMCB is undefined after a SHUTDOWN intercept
 935          * so reinitialize it.
 936          */
 937         memset(vcpu->svm->vmcb, 0, PAGE_SIZE);
 938         init_vmcb(vcpu->svm->vmcb);
 939
 940         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
 941         return 0;
 942 }
 943
 944 static int io_get_override(struct kvm_vcpu *vcpu,
 945                           struct vmcb_seg **seg,
 946                           int *addr_override)
 947 {
 948         u8 inst[MAX_INST_SIZE];
 949         unsigned ins_length;
 950         gva_t rip;
 951         int i;
 952
 953         rip =  vcpu->svm->vmcb->save.rip;
 954         ins_length = vcpu->svm->next_rip - rip;
 955         rip += vcpu->svm->vmcb->save.cs.base;
 956
 957         if (ins_length > MAX_INST_SIZE)
 958                 printk(KERN_DEBUG
 959                        "%s: inst length err, cs base 0x%llx rip 0x%llx "
 960                        "next rip 0x%llx ins_length %u\n",
 961                        __FUNCTION__,
 962                        vcpu->svm->vmcb->save.cs.base,
 963                        vcpu->svm->vmcb->save.rip,
 964                        vcpu->svm->vmcb->control.exit_info_2,
 965                        ins_length);
 966
 967         if (kvm_read_guest(vcpu, rip, ins_length, inst) != ins_length)
 968                 /* #PF */
 969                 return 0;
 970
 971         *addr_override = 0;
 972         *seg = NULL;
 973         for (i = 0; i < ins_length; i++)
 974                 switch (inst[i]) {
 975                 case 0xf0:
 976                 case 0xf2:
 977                 case 0xf3:
 978                 case 0x66:
 979                         continue;
 980                 case 0x67:
 981                         *addr_override = 1;
 982                         continue;
 983                 case 0x2e:
 984                         *seg = &vcpu->svm->vmcb->save.cs;
 985                         continue;
 986                 case 0x36:
 987                         *seg = &vcpu->svm->vmcb->save.ss;
 988                         continue;
 989                 case 0x3e:
 990                         *seg = &vcpu->svm->vmcb->save.ds;
 991                         continue;
 992                 case 0x26:
 993                         *seg = &vcpu->svm->vmcb->save.es;
 994                         continue;
 995                 case 0x64:
 996                         *seg = &vcpu->svm->vmcb->save.fs;
 997                         continue;
 998                 case 0x65:
 999                         *seg = &vcpu->svm->vmcb->save.gs;
1000                         continue;
1001                 default:
1002                         return 1;
1003                 }
1004         printk(KERN_DEBUG "%s: unexpected\n", __FUNCTION__);
1005         return 0;
1006 }
1007
1008 static unsigned long io_adress(struct kvm_vcpu *vcpu, int ins, gva_t *address)
1009 {
1010         unsigned long addr_mask;
1011         unsigned long *reg;
1012         struct vmcb_seg *seg;
1013         int addr_override;
1014         struct vmcb_save_area *save_area = &vcpu->svm->vmcb->save;
1015         u16 cs_attrib = save_area->cs.attrib;
1016         unsigned addr_size = get_addr_size(vcpu);
1017
1018         if (!io_get_override(vcpu, &seg, &addr_override))
1019                 return 0;
1020
1021         if (addr_override)
1022                 addr_size = (addr_size == 2) ? 4: (addr_size >> 1);
1023
1024         if (ins) {
1025                 reg = &vcpu->regs[VCPU_REGS_RDI];
1026                 seg = &vcpu->svm->vmcb->save.es;
1027         } else {
1028                 reg = &vcpu->regs[VCPU_REGS_RSI];
1029                 seg = (seg) ? seg : &vcpu->svm->vmcb->save.ds;
1030         }
1031
1032         addr_mask = ~0ULL >> (64 - (addr_size * 8));
1033
1034         if ((cs_attrib & SVM_SELECTOR_L_MASK) &&
1035             !(vcpu->svm->vmcb->save.rflags & X86_EFLAGS_VM)) {
1036                 *address = (*reg & addr_mask);
1037                 return addr_mask;
1038         }
1039
1040         if (!(seg->attrib & SVM_SELECTOR_P_SHIFT)) {
1041                 svm_inject_gp(vcpu, 0);
1042                 return 0;
1043         }
1044
1045         *address = (*reg & addr_mask) + seg->base;
1046         return addr_mask;
1047 }
1048
1049 static int io_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1050 {
1051         u32 io_info = vcpu->svm->vmcb->control.exit_info_1; //address size bug?
1052         int size, down, in, string, rep;
1053         unsigned port;
1054         unsigned long count;
1055         gva_t address = 0;
1056
1057         ++vcpu->stat.io_exits;
1058
1059         vcpu->svm->next_rip = vcpu->svm->vmcb->control.exit_info_2;
1060
1061         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
1062         port = io_info >> 16;
1063         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
1064         string = (io_info & SVM_IOIO_STR_MASK) != 0;
1065         rep = (io_info & SVM_IOIO_REP_MASK) != 0;
1066         count = 1;
1067         down = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
1068
1069         if (string) {
1070                 unsigned addr_mask;
1071
1072                 addr_mask = io_adress(vcpu, in, &address);
1073                 if (!addr_mask) {
1074                         printk(KERN_DEBUG "%s: get io address failed\n",
1075                                __FUNCTION__);
1076                         return 1;
1077                 }
1078
1079                 if (rep)
1080                         count = vcpu->regs[VCPU_REGS_RCX] & addr_mask;
1081         }
1082         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1083                              address, rep, port);
1084 }
1085
1086 static int nop_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1087 {
1088         return 1;
1089 }
1090
1091 static int halt_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1092 {
1093         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 1;
1094         skip_emulated_instruction(vcpu);
1095         if (vcpu->irq_summary)
1096                 return 1;
1097
1098         kvm_run->exit_reason = KVM_EXIT_HLT;
1099         ++vcpu->stat.halt_exits;
1100         return 0;
1101 }
1102
1103 static int vmmcall_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1104 {
1105         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 3;
1106         skip_emulated_instruction(vcpu);
1107         return kvm_hypercall(vcpu, kvm_run);
1108 }
1109
1110 static int invalid_op_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1111 {
1112         inject_ud(vcpu);
1113         return 1;
1114 }
1115
1116 static int task_switch_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1117 {
1118         printk(KERN_DEBUG "%s: task swiche is unsupported\n", __FUNCTION__);
1119         kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1120         return 0;
1121 }
1122
1123 static int cpuid_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1124 {
1125         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1126         kvm_emulate_cpuid(vcpu);
1127         return 1;
1128 }
1129
1130 static int emulate_on_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1131 {
1132         if (emulate_instruction(vcpu, NULL, 0, 0) != EMULATE_DONE)
1133                 printk(KERN_ERR "%s: failed\n", __FUNCTION__);
1134         return 1;
1135 }
1136
1137 static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
1138 {
1139         switch (ecx) {
1140         case MSR_IA32_TIME_STAMP_COUNTER: {
1141                 u64 tsc;
1142
1143                 rdtscll(tsc);
1144                 *data = vcpu->svm->vmcb->control.tsc_offset + tsc;
1145                 break;
1146         }
1147         case MSR_K6_STAR:
1148                 *data = vcpu->svm->vmcb->save.star;
1149                 break;
1150 #ifdef CONFIG_X86_64
1151         case MSR_LSTAR:
1152                 *data = vcpu->svm->vmcb->save.lstar;
1153                 break;
1154         case MSR_CSTAR:
1155                 *data = vcpu->svm->vmcb->save.cstar;
1156                 break;
1157         case MSR_KERNEL_GS_BASE:
1158                 *data = vcpu->svm->vmcb->save.kernel_gs_base;
1159                 break;
1160         case MSR_SYSCALL_MASK:
1161                 *data = vcpu->svm->vmcb->save.sfmask;
1162                 break;
1163 #endif
1164         case MSR_IA32_SYSENTER_CS:
1165                 *data = vcpu->svm->vmcb->save.sysenter_cs;
1166                 break;
1167         case MSR_IA32_SYSENTER_EIP:
1168                 *data = vcpu->svm->vmcb->save.sysenter_eip;
1169                 break;
1170         case MSR_IA32_SYSENTER_ESP:
1171                 *data = vcpu->svm->vmcb->save.sysenter_esp;
1172                 break;
1173         default:
1174                 return kvm_get_msr_common(vcpu, ecx, data);
1175         }
1176         return 0;
1177 }
1178
1179 static int rdmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1180 {
1181         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1182         u64 data;
1183
1184         if (svm_get_msr(vcpu, ecx, &data))
1185                 svm_inject_gp(vcpu, 0);
1186         else {
1187                 vcpu->svm->vmcb->save.rax = data & 0xffffffff;
1188                 vcpu->regs[VCPU_REGS_RDX] = data >> 32;
1189                 vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1190                 skip_emulated_instruction(vcpu);
1191         }
1192         return 1;
1193 }
1194
1195 static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
1196 {
1197         switch (ecx) {
1198         case MSR_IA32_TIME_STAMP_COUNTER: {
1199                 u64 tsc;
1200
1201                 rdtscll(tsc);
1202                 vcpu->svm->vmcb->control.tsc_offset = data - tsc;
1203                 break;
1204         }
1205         case MSR_K6_STAR:
1206                 vcpu->svm->vmcb->save.star = data;
1207                 break;
1208 #ifdef CONFIG_X86_64
1209         case MSR_LSTAR:
1210                 vcpu->svm->vmcb->save.lstar = data;
1211                 break;
1212         case MSR_CSTAR:
1213                 vcpu->svm->vmcb->save.cstar = data;
1214                 break;
1215         case MSR_KERNEL_GS_BASE:
1216                 vcpu->svm->vmcb->save.kernel_gs_base = data;
1217                 break;
1218         case MSR_SYSCALL_MASK:
1219                 vcpu->svm->vmcb->save.sfmask = data;
1220                 break;
1221 #endif
1222         case MSR_IA32_SYSENTER_CS:
1223                 vcpu->svm->vmcb->save.sysenter_cs = data;
1224                 break;
1225         case MSR_IA32_SYSENTER_EIP:
1226                 vcpu->svm->vmcb->save.sysenter_eip = data;
1227                 break;
1228         case MSR_IA32_SYSENTER_ESP:
1229                 vcpu->svm->vmcb->save.sysenter_esp = data;
1230                 break;
1231         default:
1232                 return kvm_set_msr_common(vcpu, ecx, data);
1233         }
1234         return 0;
1235 }
1236
1237 static int wrmsr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1238 {
1239         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1240         u64 data = (vcpu->svm->vmcb->save.rax & -1u)
1241                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1242         vcpu->svm->next_rip = vcpu->svm->vmcb->save.rip + 2;
1243         if (svm_set_msr(vcpu, ecx, data))
1244                 svm_inject_gp(vcpu, 0);
1245         else
1246                 skip_emulated_instruction(vcpu);
1247         return 1;
1248 }
1249
1250 static int msr_interception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1251 {
1252         if (vcpu->svm->vmcb->control.exit_info_1)
1253                 return wrmsr_interception(vcpu, kvm_run);
1254         else
1255                 return rdmsr_interception(vcpu, kvm_run);
1256 }
1257
1258 static int interrupt_window_interception(struct kvm_vcpu *vcpu,
1259                                    struct kvm_run *kvm_run)
1260 {
1261         /*
1262          * If the user space waits to inject interrupts, exit as soon as
1263          * possible
1264          */
1265         if (kvm_run->request_interrupt_window &&
1266             !vcpu->irq_summary) {
1267                 ++vcpu->stat.irq_window_exits;
1268                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1269                 return 0;
1270         }
1271
1272         return 1;
1273 }
1274
1275 static int (*svm_exit_handlers[])(struct kvm_vcpu *vcpu,
1276                                       struct kvm_run *kvm_run) = {
1277         [SVM_EXIT_READ_CR0]                     = emulate_on_interception,
1278         [SVM_EXIT_READ_CR3]                     = emulate_on_interception,
1279         [SVM_EXIT_READ_CR4]                     = emulate_on_interception,
1280         /* for now: */
1281         [SVM_EXIT_WRITE_CR0]                    = emulate_on_interception,
1282         [SVM_EXIT_WRITE_CR3]                    = emulate_on_interception,
1283         [SVM_EXIT_WRITE_CR4]                    = emulate_on_interception,
1284         [SVM_EXIT_READ_DR0]                     = emulate_on_interception,
1285         [SVM_EXIT_READ_DR1]                     = emulate_on_interception,
1286         [SVM_EXIT_READ_DR2]                     = emulate_on_interception,
1287         [SVM_EXIT_READ_DR3]                     = emulate_on_interception,
1288         [SVM_EXIT_WRITE_DR0]                    = emulate_on_interception,
1289         [SVM_EXIT_WRITE_DR1]                    = emulate_on_interception,
1290         [SVM_EXIT_WRITE_DR2]                    = emulate_on_interception,
1291         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
1292         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
1293         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
1294         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
1295         [SVM_EXIT_INTR]                         = nop_on_interception,
1296         [SVM_EXIT_NMI]                          = nop_on_interception,
1297         [SVM_EXIT_SMI]                          = nop_on_interception,
1298         [SVM_EXIT_INIT]                         = nop_on_interception,
1299         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
1300         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
1301         [SVM_EXIT_CPUID]                        = cpuid_interception,
1302         [SVM_EXIT_HLT]                          = halt_interception,
1303         [SVM_EXIT_INVLPG]                       = emulate_on_interception,
1304         [SVM_EXIT_INVLPGA]                      = invalid_op_interception,
1305         [SVM_EXIT_IOIO]                         = io_interception,
1306         [SVM_EXIT_MSR]                          = msr_interception,
1307         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
1308         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
1309         [SVM_EXIT_VMRUN]                        = invalid_op_interception,
1310         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
1311         [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
1312         [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
1313         [SVM_EXIT_STGI]                         = invalid_op_interception,
1314         [SVM_EXIT_CLGI]                         = invalid_op_interception,
1315         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
1316         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
1317         [SVM_EXIT_MWAIT]                        = invalid_op_interception,
1318 };
1319
1320
1321 static int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1322 {
1323         u32 exit_code = vcpu->svm->vmcb->control.exit_code;
1324
1325         if (is_external_interrupt(vcpu->svm->vmcb->control.exit_int_info) &&
1326             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR)
1327                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
1328                        "exit_code 0x%x\n",
1329                        __FUNCTION__, vcpu->svm->vmcb->control.exit_int_info,
1330                        exit_code);
1331
1332         if (exit_code >= ARRAY_SIZE(svm_exit_handlers)
1333             || svm_exit_handlers[exit_code] == 0) {
1334                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1335                 kvm_run->hw.hardware_exit_reason = exit_code;
1336                 return 0;
1337         }
1338
1339         return svm_exit_handlers[exit_code](vcpu, kvm_run);
1340 }
1341
1342 static void reload_tss(struct kvm_vcpu *vcpu)
1343 {
1344         int cpu = raw_smp_processor_id();
1345
1346         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1347         svm_data->tss_desc->type = 9; //available 32/64-bit TSS
1348         load_TR_desc();
1349 }
1350
1351 static void pre_svm_run(struct kvm_vcpu *vcpu)
1352 {
1353         int cpu = raw_smp_processor_id();
1354
1355         struct svm_cpu_data *svm_data = per_cpu(svm_data, cpu);
1356
1357         vcpu->svm->vmcb->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
1358         if (vcpu->cpu != cpu ||
1359             vcpu->svm->asid_generation != svm_data->asid_generation)
1360                 new_asid(vcpu, svm_data);
1361 }
1362
1363
1364 static inline void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1365 {
1366         struct vmcb_control_area *control;
1367
1368         control = &vcpu->svm->vmcb->control;
1369         control->int_vector = pop_irq(vcpu);
1370         control->int_ctl &= ~V_INTR_PRIO_MASK;
1371         control->int_ctl |= V_IRQ_MASK |
1372                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
1373 }
1374
1375 static void kvm_reput_irq(struct kvm_vcpu *vcpu)
1376 {
1377         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1378
1379         if (control->int_ctl & V_IRQ_MASK) {
1380                 control->int_ctl &= ~V_IRQ_MASK;
1381                 push_irq(vcpu, control->int_vector);
1382         }
1383
1384         vcpu->interrupt_window_open =
1385                 !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
1386 }
1387
1388 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1389                                        struct kvm_run *kvm_run)
1390 {
1391         struct vmcb_control_area *control = &vcpu->svm->vmcb->control;
1392
1393         vcpu->interrupt_window_open =
1394                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
1395                  (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1396
1397         if (vcpu->interrupt_window_open && vcpu->irq_summary)
1398                 /*
1399                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1400                  */
1401                 kvm_do_inject_irq(vcpu);
1402
1403         /*
1404          * Interrupts blocked.  Wait for unblock.
1405          */
1406         if (!vcpu->interrupt_window_open &&
1407             (vcpu->irq_summary || kvm_run->request_interrupt_window)) {
1408                 control->intercept |= 1ULL << INTERCEPT_VINTR;
1409         } else
1410                 control->intercept &= ~(1ULL << INTERCEPT_VINTR);
1411 }
1412
1413 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1414                               struct kvm_run *kvm_run)
1415 {
1416         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1417                                                   vcpu->irq_summary == 0);
1418         kvm_run->if_flag = (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF) != 0;
1419         kvm_run->cr8 = vcpu->cr8;
1420         kvm_run->apic_base = vcpu->apic_base;
1421 }
1422
1423 /*
1424  * Check if userspace requested an interrupt window, and that the
1425  * interrupt window is open.
1426  *
1427  * No need to exit to userspace if we already have an interrupt queued.
1428  */
1429 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1430                                           struct kvm_run *kvm_run)
1431 {
1432         return (!vcpu->irq_summary &&
1433                 kvm_run->request_interrupt_window &&
1434                 vcpu->interrupt_window_open &&
1435                 (vcpu->svm->vmcb->save.rflags & X86_EFLAGS_IF));
1436 }
1437
1438 static void save_db_regs(unsigned long *db_regs)
1439 {
1440         asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
1441         asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
1442         asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
1443         asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
1444 }
1445
1446 static void load_db_regs(unsigned long *db_regs)
1447 {
1448         asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
1449         asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
1450         asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
1451         asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
1452 }
1453
1454 static int svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1455 {
1456         u16 fs_selector;
1457         u16 gs_selector;
1458         u16 ldt_selector;
1459         int r;
1460
1461 again:
1462         if (!vcpu->mmio_read_completed)
1463                 do_interrupt_requests(vcpu, kvm_run);
1464
1465         clgi();
1466
1467         pre_svm_run(vcpu);
1468
1469         save_host_msrs(vcpu);
1470         fs_selector = read_fs();
1471         gs_selector = read_gs();
1472         ldt_selector = read_ldt();
1473         vcpu->svm->host_cr2 = kvm_read_cr2();
1474         vcpu->svm->host_dr6 = read_dr6();
1475         vcpu->svm->host_dr7 = read_dr7();
1476         vcpu->svm->vmcb->save.cr2 = vcpu->cr2;
1477
1478         if (vcpu->svm->vmcb->save.dr7 & 0xff) {
1479                 write_dr7(0);
1480                 save_db_regs(vcpu->svm->host_db_regs);
1481                 load_db_regs(vcpu->svm->db_regs);
1482         }
1483
1484         fx_save(vcpu->host_fx_image);
1485         fx_restore(vcpu->guest_fx_image);
1486
1487         asm volatile (
1488 #ifdef CONFIG_X86_64
1489                 "push %%rbx; push %%rcx; push %%rdx;"
1490                 "push %%rsi; push %%rdi; push %%rbp;"
1491                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1492                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1493 #else
1494                 "push %%ebx; push %%ecx; push %%edx;"
1495                 "push %%esi; push %%edi; push %%ebp;"
1496 #endif
1497
1498 #ifdef CONFIG_X86_64
1499                 "mov %c[rbx](%[vcpu]), %%rbx \n\t"
1500                 "mov %c[rcx](%[vcpu]), %%rcx \n\t"
1501                 "mov %c[rdx](%[vcpu]), %%rdx \n\t"
1502                 "mov %c[rsi](%[vcpu]), %%rsi \n\t"
1503                 "mov %c[rdi](%[vcpu]), %%rdi \n\t"
1504                 "mov %c[rbp](%[vcpu]), %%rbp \n\t"
1505                 "mov %c[r8](%[vcpu]),  %%r8  \n\t"
1506                 "mov %c[r9](%[vcpu]),  %%r9  \n\t"
1507                 "mov %c[r10](%[vcpu]), %%r10 \n\t"
1508                 "mov %c[r11](%[vcpu]), %%r11 \n\t"
1509                 "mov %c[r12](%[vcpu]), %%r12 \n\t"
1510                 "mov %c[r13](%[vcpu]), %%r13 \n\t"
1511                 "mov %c[r14](%[vcpu]), %%r14 \n\t"
1512                 "mov %c[r15](%[vcpu]), %%r15 \n\t"
1513 #else
1514                 "mov %c[rbx](%[vcpu]), %%ebx \n\t"
1515                 "mov %c[rcx](%[vcpu]), %%ecx \n\t"
1516                 "mov %c[rdx](%[vcpu]), %%edx \n\t"
1517                 "mov %c[rsi](%[vcpu]), %%esi \n\t"
1518                 "mov %c[rdi](%[vcpu]), %%edi \n\t"
1519                 "mov %c[rbp](%[vcpu]), %%ebp \n\t"
1520 #endif
1521
1522 #ifdef CONFIG_X86_64
1523                 /* Enter guest mode */
1524                 "push %%rax \n\t"
1525                 "mov %c[svm](%[vcpu]), %%rax \n\t"
1526                 "mov %c[vmcb](%%rax), %%rax \n\t"
1527                 SVM_VMLOAD "\n\t"
1528                 SVM_VMRUN "\n\t"
1529                 SVM_VMSAVE "\n\t"
1530                 "pop %%rax \n\t"
1531 #else
1532                 /* Enter guest mode */
1533                 "push %%eax \n\t"
1534                 "mov %c[svm](%[vcpu]), %%eax \n\t"
1535                 "mov %c[vmcb](%%eax), %%eax \n\t"
1536                 SVM_VMLOAD "\n\t"
1537                 SVM_VMRUN "\n\t"
1538                 SVM_VMSAVE "\n\t"
1539                 "pop %%eax \n\t"
1540 #endif
1541
1542                 /* Save guest registers, load host registers */
1543 #ifdef CONFIG_X86_64
1544                 "mov %%rbx, %c[rbx](%[vcpu]) \n\t"
1545                 "mov %%rcx, %c[rcx](%[vcpu]) \n\t"
1546                 "mov %%rdx, %c[rdx](%[vcpu]) \n\t"
1547                 "mov %%rsi, %c[rsi](%[vcpu]) \n\t"
1548                 "mov %%rdi, %c[rdi](%[vcpu]) \n\t"
1549                 "mov %%rbp, %c[rbp](%[vcpu]) \n\t"
1550                 "mov %%r8,  %c[r8](%[vcpu]) \n\t"
1551                 "mov %%r9,  %c[r9](%[vcpu]) \n\t"
1552                 "mov %%r10, %c[r10](%[vcpu]) \n\t"
1553                 "mov %%r11, %c[r11](%[vcpu]) \n\t"
1554                 "mov %%r12, %c[r12](%[vcpu]) \n\t"
1555                 "mov %%r13, %c[r13](%[vcpu]) \n\t"
1556                 "mov %%r14, %c[r14](%[vcpu]) \n\t"
1557                 "mov %%r15, %c[r15](%[vcpu]) \n\t"
1558
1559                 "pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1560                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1561                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1562                 "pop  %%rdx; pop  %%rcx; pop  %%rbx; \n\t"
1563 #else
1564                 "mov %%ebx, %c[rbx](%[vcpu]) \n\t"
1565                 "mov %%ecx, %c[rcx](%[vcpu]) \n\t"
1566                 "mov %%edx, %c[rdx](%[vcpu]) \n\t"
1567                 "mov %%esi, %c[rsi](%[vcpu]) \n\t"
1568                 "mov %%edi, %c[rdi](%[vcpu]) \n\t"
1569                 "mov %%ebp, %c[rbp](%[vcpu]) \n\t"
1570
1571                 "pop  %%ebp; pop  %%edi; pop  %%esi;"
1572                 "pop  %%edx; pop  %%ecx; pop  %%ebx; \n\t"
1573 #endif
1574                 :
1575                 : [vcpu]"a"(vcpu),
1576                   [svm]"i"(offsetof(struct kvm_vcpu, svm)),
1577                   [vmcb]"i"(offsetof(struct vcpu_svm, vmcb_pa)),
1578                   [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1579                   [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1580                   [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1581                   [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1582                   [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1583                   [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP]))
1584 #ifdef CONFIG_X86_64
1585                   ,[r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1586                   [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1587                   [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1588                   [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1589                   [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1590                   [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1591                   [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1592                   [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15]))
1593 #endif
1594                 : "cc", "memory" );
1595
1596         fx_save(vcpu->guest_fx_image);
1597         fx_restore(vcpu->host_fx_image);
1598
1599         if ((vcpu->svm->vmcb->save.dr7 & 0xff))
1600                 load_db_regs(vcpu->svm->host_db_regs);
1601
1602         vcpu->cr2 = vcpu->svm->vmcb->save.cr2;
1603
1604         write_dr6(vcpu->svm->host_dr6);
1605         write_dr7(vcpu->svm->host_dr7);
1606         kvm_write_cr2(vcpu->svm->host_cr2);
1607
1608         load_fs(fs_selector);
1609         load_gs(gs_selector);
1610         load_ldt(ldt_selector);
1611         load_host_msrs(vcpu);
1612
1613         reload_tss(vcpu);
1614
1615         /*
1616          * Profile KVM exit RIPs:
1617          */
1618         if (unlikely(prof_on == KVM_PROFILING))
1619                 profile_hit(KVM_PROFILING,
1620                         (void *)(unsigned long)vcpu->svm->vmcb->save.rip);
1621
1622         stgi();
1623
1624         kvm_reput_irq(vcpu);
1625
1626         vcpu->svm->next_rip = 0;
1627
1628         if (vcpu->svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
1629                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1630                 kvm_run->fail_entry.hardware_entry_failure_reason
1631                         = vcpu->svm->vmcb->control.exit_code;
1632                 post_kvm_run_save(vcpu, kvm_run);
1633                 return 0;
1634         }
1635
1636         r = handle_exit(vcpu, kvm_run);
1637         if (r > 0) {
1638                 if (signal_pending(current)) {
1639                         ++vcpu->stat.signal_exits;
1640                         post_kvm_run_save(vcpu, kvm_run);
1641                         kvm_run->exit_reason = KVM_EXIT_INTR;
1642                         return -EINTR;
1643                 }
1644
1645                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1646                         ++vcpu->stat.request_irq_exits;
1647                         post_kvm_run_save(vcpu, kvm_run);
1648                         kvm_run->exit_reason = KVM_EXIT_INTR;
1649                         return -EINTR;
1650                 }
1651                 kvm_resched(vcpu);
1652                 goto again;
1653         }
1654         post_kvm_run_save(vcpu, kvm_run);
1655         return r;
1656 }
1657
1658 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
1659 {
1660         force_new_asid(vcpu);
1661 }
1662
1663 static void svm_set_cr3(struct kvm_vcpu *vcpu, unsigned long root)
1664 {
1665         vcpu->svm->vmcb->save.cr3 = root;
1666         force_new_asid(vcpu);
1667 }
1668
1669 static void svm_inject_page_fault(struct kvm_vcpu *vcpu,
1670                                   unsigned long  addr,
1671                                   uint32_t err_code)
1672 {
1673         uint32_t exit_int_info = vcpu->svm->vmcb->control.exit_int_info;
1674
1675         ++vcpu->stat.pf_guest;
1676
1677         if (is_page_fault(exit_int_info)) {
1678
1679                 vcpu->svm->vmcb->control.event_inj_err = 0;
1680                 vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1681                                                         SVM_EVTINJ_VALID_ERR |
1682                                                         SVM_EVTINJ_TYPE_EXEPT |
1683                                                         DF_VECTOR;
1684                 return;
1685         }
1686         vcpu->cr2 = addr;
1687         vcpu->svm->vmcb->save.cr2 = addr;
1688         vcpu->svm->vmcb->control.event_inj =    SVM_EVTINJ_VALID |
1689                                                 SVM_EVTINJ_VALID_ERR |
1690                                                 SVM_EVTINJ_TYPE_EXEPT |
1691                                                 PF_VECTOR;
1692         vcpu->svm->vmcb->control.event_inj_err = err_code;
1693 }
1694
1695
1696 static int is_disabled(void)
1697 {
1698         return 0;
1699 }
1700
1701 static void
1702 svm_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1703 {
1704         /*
1705          * Patch in the VMMCALL instruction:
1706          */
1707         hypercall[0] = 0x0f;
1708         hypercall[1] = 0x01;
1709         hypercall[2] = 0xd9;
1710         hypercall[3] = 0xc3;
1711 }
1712
1713 static struct kvm_arch_ops svm_arch_ops = {
1714         .cpu_has_kvm_support = has_svm,
1715         .disabled_by_bios = is_disabled,
1716         .hardware_setup = svm_hardware_setup,
1717         .hardware_unsetup = svm_hardware_unsetup,
1718         .hardware_enable = svm_hardware_enable,
1719         .hardware_disable = svm_hardware_disable,
1720
1721         .vcpu_create = svm_create_vcpu,
1722         .vcpu_free = svm_free_vcpu,
1723
1724         .vcpu_load = svm_vcpu_load,
1725         .vcpu_put = svm_vcpu_put,
1726         .vcpu_decache = svm_vcpu_decache,
1727
1728         .set_guest_debug = svm_guest_debug,
1729         .get_msr = svm_get_msr,
1730         .set_msr = svm_set_msr,
1731         .get_segment_base = svm_get_segment_base,
1732         .get_segment = svm_get_segment,
1733         .set_segment = svm_set_segment,
1734         .get_cs_db_l_bits = svm_get_cs_db_l_bits,
1735         .decache_cr0_cr4_guest_bits = svm_decache_cr0_cr4_guest_bits,
1736         .set_cr0 = svm_set_cr0,
1737         .set_cr3 = svm_set_cr3,
1738         .set_cr4 = svm_set_cr4,
1739         .set_efer = svm_set_efer,
1740         .get_idt = svm_get_idt,
1741         .set_idt = svm_set_idt,
1742         .get_gdt = svm_get_gdt,
1743         .set_gdt = svm_set_gdt,
1744         .get_dr = svm_get_dr,
1745         .set_dr = svm_set_dr,
1746         .cache_regs = svm_cache_regs,
1747         .decache_regs = svm_decache_regs,
1748         .get_rflags = svm_get_rflags,
1749         .set_rflags = svm_set_rflags,
1750
1751         .invlpg = svm_invlpg,
1752         .tlb_flush = svm_flush_tlb,
1753         .inject_page_fault = svm_inject_page_fault,
1754
1755         .inject_gp = svm_inject_gp,
1756
1757         .run = svm_vcpu_run,
1758         .skip_emulated_instruction = skip_emulated_instruction,
1759         .vcpu_setup = svm_vcpu_setup,
1760         .patch_hypercall = svm_patch_hypercall,
1761 };
1762
1763 static int __init svm_init(void)
1764 {
1765         return kvm_init_arch(&svm_arch_ops, THIS_MODULE);
1766 }
1767
1768 static void __exit svm_exit(void)
1769 {
1770         kvm_exit_arch();
1771 }
1772
1773 module_init(svm_init)
1774 module_exit(svm_exit)