drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include <linux/module.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <linux/profile.h>
  25 #include <linux/sched.h>
  26 #include <asm/io.h>
  27 #include <asm/desc.h>
  28
  29 #include "segment_descriptor.h"
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 static struct page *vmx_io_bitmap_a;
  38 static struct page *vmx_io_bitmap_b;
  39
  40 #ifdef CONFIG_X86_64
  41 #define HOST_IS_64 1
  42 #else
  43 #define HOST_IS_64 0
  44 #endif
  45 #define EFER_SAVE_RESTORE_BITS ((u64)EFER_SCE)
  46
  47 static struct vmcs_descriptor {
  48         int size;
  49         int order;
  50         u32 revision_id;
  51 } vmcs_descriptor;
  52
  53 #define VMX_SEGMENT_FIELD(seg)                                  \
  54         [VCPU_SREG_##seg] = {                                   \
  55                 .selector = GUEST_##seg##_SELECTOR,             \
  56                 .base = GUEST_##seg##_BASE,                     \
  57                 .limit = GUEST_##seg##_LIMIT,                   \
  58                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  59         }
  60
  61 static struct kvm_vmx_segment_field {
  62         unsigned selector;
  63         unsigned base;
  64         unsigned limit;
  65         unsigned ar_bytes;
  66 } kvm_vmx_segment_fields[] = {
  67         VMX_SEGMENT_FIELD(CS),
  68         VMX_SEGMENT_FIELD(DS),
  69         VMX_SEGMENT_FIELD(ES),
  70         VMX_SEGMENT_FIELD(FS),
  71         VMX_SEGMENT_FIELD(GS),
  72         VMX_SEGMENT_FIELD(SS),
  73         VMX_SEGMENT_FIELD(TR),
  74         VMX_SEGMENT_FIELD(LDTR),
  75 };
  76
  77 /*
  78  * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
  79  * away by decrementing the array size.
  80  */
  81 static const u32 vmx_msr_index[] = {
  82 #ifdef CONFIG_X86_64
  83         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  84 #endif
  85         MSR_EFER, MSR_K6_STAR,
  86 };
  87 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
  88
  89 static inline u64 msr_efer_save_restore_bits(struct vmx_msr_entry msr)
  90 {
  91         return (u64)msr.data & EFER_SAVE_RESTORE_BITS;
  92 }
  93
  94 static inline int msr_efer_need_save_restore(struct kvm_vcpu *vcpu)
  95 {
  96         int efer_offset = vcpu->msr_offset_efer;
  97         return msr_efer_save_restore_bits(vcpu->host_msrs[efer_offset]) !=
  98                 msr_efer_save_restore_bits(vcpu->guest_msrs[efer_offset]);
  99 }
 100
 101 static inline int is_page_fault(u32 intr_info)
 102 {
 103         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 104                              INTR_INFO_VALID_MASK)) ==
 105                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 106 }
 107
 108 static inline int is_no_device(u32 intr_info)
 109 {
 110         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
 111                              INTR_INFO_VALID_MASK)) ==
 112                 (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 113 }
 114
 115 static inline int is_external_interrupt(u32 intr_info)
 116 {
 117         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
 118                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 119 }
 120
 121 static int __find_msr_index(struct kvm_vcpu *vcpu, u32 msr)
 122 {
 123         int i;
 124
 125         for (i = 0; i < vcpu->nmsrs; ++i)
 126                 if (vcpu->guest_msrs[i].index == msr)
 127                         return i;
 128         return -1;
 129 }
 130
 131 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
 132 {
 133         int i;
 134
 135         i = __find_msr_index(vcpu, msr);
 136         if (i >= 0)
 137                 return &vcpu->guest_msrs[i];
 138         return NULL;
 139 }
 140
 141 static void vmcs_clear(struct vmcs *vmcs)
 142 {
 143         u64 phys_addr = __pa(vmcs);
 144         u8 error;
 145
 146         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 147                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 148                       : "cc", "memory");
 149         if (error)
 150                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 151                        vmcs, phys_addr);
 152 }
 153
 154 static void __vcpu_clear(void *arg)
 155 {
 156         struct kvm_vcpu *vcpu = arg;
 157         int cpu = raw_smp_processor_id();
 158
 159         if (vcpu->cpu == cpu)
 160                 vmcs_clear(vcpu->vmcs);
 161         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 162                 per_cpu(current_vmcs, cpu) = NULL;
 163         rdtscll(vcpu->host_tsc);
 164 }
 165
 166 static void vcpu_clear(struct kvm_vcpu *vcpu)
 167 {
 168         if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
 169                 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
 170         else
 171                 __vcpu_clear(vcpu);
 172         vcpu->launched = 0;
 173 }
 174
 175 static unsigned long vmcs_readl(unsigned long field)
 176 {
 177         unsigned long value;
 178
 179         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 180                       : "=a"(value) : "d"(field) : "cc");
 181         return value;
 182 }
 183
 184 static u16 vmcs_read16(unsigned long field)
 185 {
 186         return vmcs_readl(field);
 187 }
 188
 189 static u32 vmcs_read32(unsigned long field)
 190 {
 191         return vmcs_readl(field);
 192 }
 193
 194 static u64 vmcs_read64(unsigned long field)
 195 {
 196 #ifdef CONFIG_X86_64
 197         return vmcs_readl(field);
 198 #else
 199         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 200 #endif
 201 }
 202
 203 static noinline void vmwrite_error(unsigned long field, unsigned long value)
 204 {
 205         printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 206                field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 207         dump_stack();
 208 }
 209
 210 static void vmcs_writel(unsigned long field, unsigned long value)
 211 {
 212         u8 error;
 213
 214         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 215                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 216         if (unlikely(error))
 217                 vmwrite_error(field, value);
 218 }
 219
 220 static void vmcs_write16(unsigned long field, u16 value)
 221 {
 222         vmcs_writel(field, value);
 223 }
 224
 225 static void vmcs_write32(unsigned long field, u32 value)
 226 {
 227         vmcs_writel(field, value);
 228 }
 229
 230 static void vmcs_write64(unsigned long field, u64 value)
 231 {
 232 #ifdef CONFIG_X86_64
 233         vmcs_writel(field, value);
 234 #else
 235         vmcs_writel(field, value);
 236         asm volatile ("");
 237         vmcs_writel(field+1, value >> 32);
 238 #endif
 239 }
 240
 241 static void vmcs_clear_bits(unsigned long field, u32 mask)
 242 {
 243         vmcs_writel(field, vmcs_readl(field) & ~mask);
 244 }
 245
 246 static void vmcs_set_bits(unsigned long field, u32 mask)
 247 {
 248         vmcs_writel(field, vmcs_readl(field) | mask);
 249 }
 250
 251 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 252 {
 253         u32 eb;
 254
 255         eb = 1u << PF_VECTOR;
 256         if (!vcpu->fpu_active)
 257                 eb |= 1u << NM_VECTOR;
 258         if (vcpu->guest_debug.enabled)
 259                 eb |= 1u << 1;
 260         if (vcpu->rmode.active)
 261                 eb = ~0;
 262         vmcs_write32(EXCEPTION_BITMAP, eb);
 263 }
 264
 265 static void reload_tss(void)
 266 {
 267 #ifndef CONFIG_X86_64
 268
 269         /*
 270          * VT restores TR but not its size.  Useless.
 271          */
 272         struct descriptor_table gdt;
 273         struct segment_descriptor *descs;
 274
 275         get_gdt(&gdt);
 276         descs = (void *)gdt.base;
 277         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 278         load_TR_desc();
 279 #endif
 280 }
 281
 282 static void load_transition_efer(struct kvm_vcpu *vcpu)
 283 {
 284         u64 trans_efer;
 285         int efer_offset = vcpu->msr_offset_efer;
 286
 287         trans_efer = vcpu->host_msrs[efer_offset].data;
 288         trans_efer &= ~EFER_SAVE_RESTORE_BITS;
 289         trans_efer |= msr_efer_save_restore_bits(
 290                                 vcpu->guest_msrs[efer_offset]);
 291         wrmsrl(MSR_EFER, trans_efer);
 292         vcpu->stat.efer_reload++;
 293 }
 294
 295 static void vmx_save_host_state(struct kvm_vcpu *vcpu)
 296 {
 297         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 298
 299         if (hs->loaded)
 300                 return;
 301
 302         hs->loaded = 1;
 303         /*
 304          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
 305          * allow segment selectors with cpl > 0 or ti == 1.
 306          */
 307         hs->ldt_sel = read_ldt();
 308         hs->fs_gs_ldt_reload_needed = hs->ldt_sel;
 309         hs->fs_sel = read_fs();
 310         if (!(hs->fs_sel & 7))
 311                 vmcs_write16(HOST_FS_SELECTOR, hs->fs_sel);
 312         else {
 313                 vmcs_write16(HOST_FS_SELECTOR, 0);
 314                 hs->fs_gs_ldt_reload_needed = 1;
 315         }
 316         hs->gs_sel = read_gs();
 317         if (!(hs->gs_sel & 7))
 318                 vmcs_write16(HOST_GS_SELECTOR, hs->gs_sel);
 319         else {
 320                 vmcs_write16(HOST_GS_SELECTOR, 0);
 321                 hs->fs_gs_ldt_reload_needed = 1;
 322         }
 323
 324 #ifdef CONFIG_X86_64
 325         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
 326         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
 327 #else
 328         vmcs_writel(HOST_FS_BASE, segment_base(hs->fs_sel));
 329         vmcs_writel(HOST_GS_BASE, segment_base(hs->gs_sel));
 330 #endif
 331
 332 #ifdef CONFIG_X86_64
 333         if (is_long_mode(vcpu)) {
 334                 save_msrs(vcpu->host_msrs + vcpu->msr_offset_kernel_gs_base, 1);
 335         }
 336 #endif
 337         load_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 338         if (msr_efer_need_save_restore(vcpu))
 339                 load_transition_efer(vcpu);
 340 }
 341
 342 static void vmx_load_host_state(struct kvm_vcpu *vcpu)
 343 {
 344         struct vmx_host_state *hs = &vcpu->vmx_host_state;
 345
 346         if (!hs->loaded)
 347                 return;
 348
 349         hs->loaded = 0;
 350         if (hs->fs_gs_ldt_reload_needed) {
 351                 load_ldt(hs->ldt_sel);
 352                 load_fs(hs->fs_sel);
 353                 /*
 354                  * If we have to reload gs, we must take care to
 355                  * preserve our gs base.
 356                  */
 357                 local_irq_disable();
 358                 load_gs(hs->gs_sel);
 359 #ifdef CONFIG_X86_64
 360                 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
 361 #endif
 362                 local_irq_enable();
 363
 364                 reload_tss();
 365         }
 366         save_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 367         load_msrs(vcpu->host_msrs, vcpu->save_nmsrs);
 368         if (msr_efer_need_save_restore(vcpu))
 369                 load_msrs(vcpu->host_msrs + vcpu->msr_offset_efer, 1);
 370 }
 371
 372 /*
 373  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 374  * vcpu mutex is already taken.
 375  */
 376 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
 377 {
 378         u64 phys_addr = __pa(vcpu->vmcs);
 379         int cpu;
 380         u64 tsc_this, delta;
 381
 382         cpu = get_cpu();
 383
 384         if (vcpu->cpu != cpu)
 385                 vcpu_clear(vcpu);
 386
 387         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 388                 u8 error;
 389
 390                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 391                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 392                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 393                               : "cc");
 394                 if (error)
 395                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 396                                vcpu->vmcs, phys_addr);
 397         }
 398
 399         if (vcpu->cpu != cpu) {
 400                 struct descriptor_table dt;
 401                 unsigned long sysenter_esp;
 402
 403                 vcpu->cpu = cpu;
 404                 /*
 405                  * Linux uses per-cpu TSS and GDT, so set these when switching
 406                  * processors.
 407                  */
 408                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 409                 get_gdt(&dt);
 410                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 411
 412                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 413                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 414
 415                 /*
 416                  * Make sure the time stamp counter is monotonous.
 417                  */
 418                 rdtscll(tsc_this);
 419                 delta = vcpu->host_tsc - tsc_this;
 420                 vmcs_write64(TSC_OFFSET, vmcs_read64(TSC_OFFSET) + delta);
 421         }
 422 }
 423
 424 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 425 {
 426         vmx_load_host_state(vcpu);
 427         kvm_put_guest_fpu(vcpu);
 428         put_cpu();
 429 }
 430
 431 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 432 {
 433         if (vcpu->fpu_active)
 434                 return;
 435         vcpu->fpu_active = 1;
 436         vmcs_clear_bits(GUEST_CR0, CR0_TS_MASK);
 437         if (vcpu->cr0 & CR0_TS_MASK)
 438                 vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 439         update_exception_bitmap(vcpu);
 440 }
 441
 442 static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
 443 {
 444         if (!vcpu->fpu_active)
 445                 return;
 446         vcpu->fpu_active = 0;
 447         vmcs_set_bits(GUEST_CR0, CR0_TS_MASK);
 448         update_exception_bitmap(vcpu);
 449 }
 450
 451 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
 452 {
 453         vcpu_clear(vcpu);
 454 }
 455
 456 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 457 {
 458         return vmcs_readl(GUEST_RFLAGS);
 459 }
 460
 461 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 462 {
 463         vmcs_writel(GUEST_RFLAGS, rflags);
 464 }
 465
 466 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 467 {
 468         unsigned long rip;
 469         u32 interruptibility;
 470
 471         rip = vmcs_readl(GUEST_RIP);
 472         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 473         vmcs_writel(GUEST_RIP, rip);
 474
 475         /*
 476          * We emulated an instruction, so temporary interrupt blocking
 477          * should be removed, if set.
 478          */
 479         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 480         if (interruptibility & 3)
 481                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 482                              interruptibility & ~3);
 483         vcpu->interrupt_window_open = 1;
 484 }
 485
 486 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 487 {
 488         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 489                vmcs_readl(GUEST_RIP));
 490         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 491         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 492                      GP_VECTOR |
 493                      INTR_TYPE_EXCEPTION |
 494                      INTR_INFO_DELIEVER_CODE_MASK |
 495                      INTR_INFO_VALID_MASK);
 496 }
 497
 498 /*
 499  * Swap MSR entry in host/guest MSR entry array.
 500  */
 501 void move_msr_up(struct kvm_vcpu *vcpu, int from, int to)
 502 {
 503         struct vmx_msr_entry tmp;
 504         tmp = vcpu->guest_msrs[to];
 505         vcpu->guest_msrs[to] = vcpu->guest_msrs[from];
 506         vcpu->guest_msrs[from] = tmp;
 507         tmp = vcpu->host_msrs[to];
 508         vcpu->host_msrs[to] = vcpu->host_msrs[from];
 509         vcpu->host_msrs[from] = tmp;
 510 }
 511
 512 /*
 513  * Set up the vmcs to automatically save and restore system
 514  * msrs.  Don't touch the 64-bit msrs if the guest is in legacy
 515  * mode, as fiddling with msrs is very expensive.
 516  */
 517 static void setup_msrs(struct kvm_vcpu *vcpu)
 518 {
 519         int save_nmsrs;
 520
 521         save_nmsrs = 0;
 522 #ifdef CONFIG_X86_64
 523         if (is_long_mode(vcpu)) {
 524                 int index;
 525
 526                 index = __find_msr_index(vcpu, MSR_SYSCALL_MASK);
 527                 if (index >= 0)
 528                         move_msr_up(vcpu, index, save_nmsrs++);
 529                 index = __find_msr_index(vcpu, MSR_LSTAR);
 530                 if (index >= 0)
 531                         move_msr_up(vcpu, index, save_nmsrs++);
 532                 index = __find_msr_index(vcpu, MSR_CSTAR);
 533                 if (index >= 0)
 534                         move_msr_up(vcpu, index, save_nmsrs++);
 535                 index = __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 536                 if (index >= 0)
 537                         move_msr_up(vcpu, index, save_nmsrs++);
 538                 /*
 539                  * MSR_K6_STAR is only needed on long mode guests, and only
 540                  * if efer.sce is enabled.
 541                  */
 542                 index = __find_msr_index(vcpu, MSR_K6_STAR);
 543                 if ((index >= 0) && (vcpu->shadow_efer & EFER_SCE))
 544                         move_msr_up(vcpu, index, save_nmsrs++);
 545         }
 546 #endif
 547         vcpu->save_nmsrs = save_nmsrs;
 548
 549 #ifdef CONFIG_X86_64
 550         vcpu->msr_offset_kernel_gs_base =
 551                 __find_msr_index(vcpu, MSR_KERNEL_GS_BASE);
 552 #endif
 553         vcpu->msr_offset_efer = __find_msr_index(vcpu, MSR_EFER);
 554 }
 555
 556 /*
 557  * reads and returns guest's timestamp counter "register"
 558  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 559  */
 560 static u64 guest_read_tsc(void)
 561 {
 562         u64 host_tsc, tsc_offset;
 563
 564         rdtscll(host_tsc);
 565         tsc_offset = vmcs_read64(TSC_OFFSET);
 566         return host_tsc + tsc_offset;
 567 }
 568
 569 /*
 570  * writes 'guest_tsc' into guest's timestamp counter "register"
 571  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 572  */
 573 static void guest_write_tsc(u64 guest_tsc)
 574 {
 575         u64 host_tsc;
 576
 577         rdtscll(host_tsc);
 578         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 579 }
 580
 581 /*
 582  * Reads an msr value (of 'msr_index') into 'pdata'.
 583  * Returns 0 on success, non-0 otherwise.
 584  * Assumes vcpu_load() was already called.
 585  */
 586 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 587 {
 588         u64 data;
 589         struct vmx_msr_entry *msr;
 590
 591         if (!pdata) {
 592                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 593                 return -EINVAL;
 594         }
 595
 596         switch (msr_index) {
 597 #ifdef CONFIG_X86_64
 598         case MSR_FS_BASE:
 599                 data = vmcs_readl(GUEST_FS_BASE);
 600                 break;
 601         case MSR_GS_BASE:
 602                 data = vmcs_readl(GUEST_GS_BASE);
 603                 break;
 604         case MSR_EFER:
 605                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 606 #endif
 607         case MSR_IA32_TIME_STAMP_COUNTER:
 608                 data = guest_read_tsc();
 609                 break;
 610         case MSR_IA32_SYSENTER_CS:
 611                 data = vmcs_read32(GUEST_SYSENTER_CS);
 612                 break;
 613         case MSR_IA32_SYSENTER_EIP:
 614                 data = vmcs_readl(GUEST_SYSENTER_EIP);
 615                 break;
 616         case MSR_IA32_SYSENTER_ESP:
 617                 data = vmcs_readl(GUEST_SYSENTER_ESP);
 618                 break;
 619         default:
 620                 msr = find_msr_entry(vcpu, msr_index);
 621                 if (msr) {
 622                         data = msr->data;
 623                         break;
 624                 }
 625                 return kvm_get_msr_common(vcpu, msr_index, pdata);
 626         }
 627
 628         *pdata = data;
 629         return 0;
 630 }
 631
 632 /*
 633  * Writes msr value into into the appropriate "register".
 634  * Returns 0 on success, non-0 otherwise.
 635  * Assumes vcpu_load() was already called.
 636  */
 637 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 638 {
 639         struct vmx_msr_entry *msr;
 640         int ret = 0;
 641
 642         switch (msr_index) {
 643 #ifdef CONFIG_X86_64
 644         case MSR_EFER:
 645                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 646                 if (vcpu->vmx_host_state.loaded)
 647                         load_transition_efer(vcpu);
 648                 break;
 649         case MSR_FS_BASE:
 650                 vmcs_writel(GUEST_FS_BASE, data);
 651                 break;
 652         case MSR_GS_BASE:
 653                 vmcs_writel(GUEST_GS_BASE, data);
 654                 break;
 655 #endif
 656         case MSR_IA32_SYSENTER_CS:
 657                 vmcs_write32(GUEST_SYSENTER_CS, data);
 658                 break;
 659         case MSR_IA32_SYSENTER_EIP:
 660                 vmcs_writel(GUEST_SYSENTER_EIP, data);
 661                 break;
 662         case MSR_IA32_SYSENTER_ESP:
 663                 vmcs_writel(GUEST_SYSENTER_ESP, data);
 664                 break;
 665         case MSR_IA32_TIME_STAMP_COUNTER:
 666                 guest_write_tsc(data);
 667                 break;
 668         default:
 669                 msr = find_msr_entry(vcpu, msr_index);
 670                 if (msr) {
 671                         msr->data = data;
 672                         if (vcpu->vmx_host_state.loaded)
 673                                 load_msrs(vcpu->guest_msrs, vcpu->save_nmsrs);
 674                         break;
 675                 }
 676                 ret = kvm_set_msr_common(vcpu, msr_index, data);
 677         }
 678
 679         return ret;
 680 }
 681
 682 /*
 683  * Sync the rsp and rip registers into the vcpu structure.  This allows
 684  * registers to be accessed by indexing vcpu->regs.
 685  */
 686 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 687 {
 688         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 689         vcpu->rip = vmcs_readl(GUEST_RIP);
 690 }
 691
 692 /*
 693  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 694  * modification.
 695  */
 696 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 697 {
 698         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 699         vmcs_writel(GUEST_RIP, vcpu->rip);
 700 }
 701
 702 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 703 {
 704         unsigned long dr7 = 0x400;
 705         int old_singlestep;
 706
 707         old_singlestep = vcpu->guest_debug.singlestep;
 708
 709         vcpu->guest_debug.enabled = dbg->enabled;
 710         if (vcpu->guest_debug.enabled) {
 711                 int i;
 712
 713                 dr7 |= 0x200;  /* exact */
 714                 for (i = 0; i < 4; ++i) {
 715                         if (!dbg->breakpoints[i].enabled)
 716                                 continue;
 717                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 718                         dr7 |= 2 << (i*2);    /* global enable */
 719                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 720                 }
 721
 722                 vcpu->guest_debug.singlestep = dbg->singlestep;
 723         } else
 724                 vcpu->guest_debug.singlestep = 0;
 725
 726         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 727                 unsigned long flags;
 728
 729                 flags = vmcs_readl(GUEST_RFLAGS);
 730                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 731                 vmcs_writel(GUEST_RFLAGS, flags);
 732         }
 733
 734         update_exception_bitmap(vcpu);
 735         vmcs_writel(GUEST_DR7, dr7);
 736
 737         return 0;
 738 }
 739
 740 static __init int cpu_has_kvm_support(void)
 741 {
 742         unsigned long ecx = cpuid_ecx(1);
 743         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 744 }
 745
 746 static __init int vmx_disabled_by_bios(void)
 747 {
 748         u64 msr;
 749
 750         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 751         return (msr & 5) == 1; /* locked but not enabled */
 752 }
 753
 754 static void hardware_enable(void *garbage)
 755 {
 756         int cpu = raw_smp_processor_id();
 757         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 758         u64 old;
 759
 760         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 761         if ((old & 5) != 5)
 762                 /* enable and lock */
 763                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 764         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 765         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 766                       : "memory", "cc");
 767 }
 768
 769 static void hardware_disable(void *garbage)
 770 {
 771         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 772 }
 773
 774 static __init void setup_vmcs_descriptor(void)
 775 {
 776         u32 vmx_msr_low, vmx_msr_high;
 777
 778         rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
 779         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 780         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 781         vmcs_descriptor.revision_id = vmx_msr_low;
 782 }
 783
 784 static struct vmcs *alloc_vmcs_cpu(int cpu)
 785 {
 786         int node = cpu_to_node(cpu);
 787         struct page *pages;
 788         struct vmcs *vmcs;
 789
 790         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 791         if (!pages)
 792                 return NULL;
 793         vmcs = page_address(pages);
 794         memset(vmcs, 0, vmcs_descriptor.size);
 795         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 796         return vmcs;
 797 }
 798
 799 static struct vmcs *alloc_vmcs(void)
 800 {
 801         return alloc_vmcs_cpu(raw_smp_processor_id());
 802 }
 803
 804 static void free_vmcs(struct vmcs *vmcs)
 805 {
 806         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 807 }
 808
 809 static void free_kvm_area(void)
 810 {
 811         int cpu;
 812
 813         for_each_online_cpu(cpu)
 814                 free_vmcs(per_cpu(vmxarea, cpu));
 815 }
 816
 817 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 818
 819 static __init int alloc_kvm_area(void)
 820 {
 821         int cpu;
 822
 823         for_each_online_cpu(cpu) {
 824                 struct vmcs *vmcs;
 825
 826                 vmcs = alloc_vmcs_cpu(cpu);
 827                 if (!vmcs) {
 828                         free_kvm_area();
 829                         return -ENOMEM;
 830                 }
 831
 832                 per_cpu(vmxarea, cpu) = vmcs;
 833         }
 834         return 0;
 835 }
 836
 837 static __init int hardware_setup(void)
 838 {
 839         setup_vmcs_descriptor();
 840         return alloc_kvm_area();
 841 }
 842
 843 static __exit void hardware_unsetup(void)
 844 {
 845         free_kvm_area();
 846 }
 847
 848 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 849 {
 850         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 851
 852         if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
 853                 vmcs_write16(sf->selector, save->selector);
 854                 vmcs_writel(sf->base, save->base);
 855                 vmcs_write32(sf->limit, save->limit);
 856                 vmcs_write32(sf->ar_bytes, save->ar);
 857         } else {
 858                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 859                         << AR_DPL_SHIFT;
 860                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 861         }
 862 }
 863
 864 static void enter_pmode(struct kvm_vcpu *vcpu)
 865 {
 866         unsigned long flags;
 867
 868         vcpu->rmode.active = 0;
 869
 870         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 871         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 872         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 873
 874         flags = vmcs_readl(GUEST_RFLAGS);
 875         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 876         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 877         vmcs_writel(GUEST_RFLAGS, flags);
 878
 879         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 880                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 881
 882         update_exception_bitmap(vcpu);
 883
 884         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 885         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 886         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 887         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 888
 889         vmcs_write16(GUEST_SS_SELECTOR, 0);
 890         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 891
 892         vmcs_write16(GUEST_CS_SELECTOR,
 893                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 894         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 895 }
 896
 897 static int rmode_tss_base(struct kvm* kvm)
 898 {
 899         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 900         return base_gfn << PAGE_SHIFT;
 901 }
 902
 903 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 904 {
 905         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 906
 907         save->selector = vmcs_read16(sf->selector);
 908         save->base = vmcs_readl(sf->base);
 909         save->limit = vmcs_read32(sf->limit);
 910         save->ar = vmcs_read32(sf->ar_bytes);
 911         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 912         vmcs_write32(sf->limit, 0xffff);
 913         vmcs_write32(sf->ar_bytes, 0xf3);
 914 }
 915
 916 static void enter_rmode(struct kvm_vcpu *vcpu)
 917 {
 918         unsigned long flags;
 919
 920         vcpu->rmode.active = 1;
 921
 922         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 923         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 924
 925         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 926         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 927
 928         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 929         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 930
 931         flags = vmcs_readl(GUEST_RFLAGS);
 932         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 933
 934         flags |= IOPL_MASK | X86_EFLAGS_VM;
 935
 936         vmcs_writel(GUEST_RFLAGS, flags);
 937         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 938         update_exception_bitmap(vcpu);
 939
 940         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 941         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 942         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 943
 944         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 945         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
 946         if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
 947                 vmcs_writel(GUEST_CS_BASE, 0xf0000);
 948         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 949
 950         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 951         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 952         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 953         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 954 }
 955
 956 #ifdef CONFIG_X86_64
 957
 958 static void enter_lmode(struct kvm_vcpu *vcpu)
 959 {
 960         u32 guest_tr_ar;
 961
 962         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 963         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 964                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 965                        __FUNCTION__);
 966                 vmcs_write32(GUEST_TR_AR_BYTES,
 967                              (guest_tr_ar & ~AR_TYPE_MASK)
 968                              | AR_TYPE_BUSY_64_TSS);
 969         }
 970
 971         vcpu->shadow_efer |= EFER_LMA;
 972
 973         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 974         vmcs_write32(VM_ENTRY_CONTROLS,
 975                      vmcs_read32(VM_ENTRY_CONTROLS)
 976                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 977 }
 978
 979 static void exit_lmode(struct kvm_vcpu *vcpu)
 980 {
 981         vcpu->shadow_efer &= ~EFER_LMA;
 982
 983         vmcs_write32(VM_ENTRY_CONTROLS,
 984                      vmcs_read32(VM_ENTRY_CONTROLS)
 985                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 986 }
 987
 988 #endif
 989
 990 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
 991 {
 992         vcpu->cr4 &= KVM_GUEST_CR4_MASK;
 993         vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
 994 }
 995
 996 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 997 {
 998         vmx_fpu_deactivate(vcpu);
 999
1000         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
1001                 enter_pmode(vcpu);
1002
1003         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
1004                 enter_rmode(vcpu);
1005
1006 #ifdef CONFIG_X86_64
1007         if (vcpu->shadow_efer & EFER_LME) {
1008                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
1009                         enter_lmode(vcpu);
1010                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
1011                         exit_lmode(vcpu);
1012         }
1013 #endif
1014
1015         vmcs_writel(CR0_READ_SHADOW, cr0);
1016         vmcs_writel(GUEST_CR0,
1017                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
1018         vcpu->cr0 = cr0;
1019
1020         if (!(cr0 & CR0_TS_MASK) || !(cr0 & CR0_PE_MASK))
1021                 vmx_fpu_activate(vcpu);
1022 }
1023
1024 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1025 {
1026         vmcs_writel(GUEST_CR3, cr3);
1027         if (vcpu->cr0 & CR0_PE_MASK)
1028                 vmx_fpu_deactivate(vcpu);
1029 }
1030
1031 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1032 {
1033         vmcs_writel(CR4_READ_SHADOW, cr4);
1034         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
1035                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
1036         vcpu->cr4 = cr4;
1037 }
1038
1039 #ifdef CONFIG_X86_64
1040
1041 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
1042 {
1043         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
1044
1045         vcpu->shadow_efer = efer;
1046         if (efer & EFER_LMA) {
1047                 vmcs_write32(VM_ENTRY_CONTROLS,
1048                                      vmcs_read32(VM_ENTRY_CONTROLS) |
1049                                      VM_ENTRY_CONTROLS_IA32E_MASK);
1050                 msr->data = efer;
1051
1052         } else {
1053                 vmcs_write32(VM_ENTRY_CONTROLS,
1054                                      vmcs_read32(VM_ENTRY_CONTROLS) &
1055                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
1056
1057                 msr->data = efer & ~EFER_LME;
1058         }
1059         setup_msrs(vcpu);
1060 }
1061
1062 #endif
1063
1064 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
1065 {
1066         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1067
1068         return vmcs_readl(sf->base);
1069 }
1070
1071 static void vmx_get_segment(struct kvm_vcpu *vcpu,
1072                             struct kvm_segment *var, int seg)
1073 {
1074         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1075         u32 ar;
1076
1077         var->base = vmcs_readl(sf->base);
1078         var->limit = vmcs_read32(sf->limit);
1079         var->selector = vmcs_read16(sf->selector);
1080         ar = vmcs_read32(sf->ar_bytes);
1081         if (ar & AR_UNUSABLE_MASK)
1082                 ar = 0;
1083         var->type = ar & 15;
1084         var->s = (ar >> 4) & 1;
1085         var->dpl = (ar >> 5) & 3;
1086         var->present = (ar >> 7) & 1;
1087         var->avl = (ar >> 12) & 1;
1088         var->l = (ar >> 13) & 1;
1089         var->db = (ar >> 14) & 1;
1090         var->g = (ar >> 15) & 1;
1091         var->unusable = (ar >> 16) & 1;
1092 }
1093
1094 static u32 vmx_segment_access_rights(struct kvm_segment *var)
1095 {
1096         u32 ar;
1097
1098         if (var->unusable)
1099                 ar = 1 << 16;
1100         else {
1101                 ar = var->type & 15;
1102                 ar |= (var->s & 1) << 4;
1103                 ar |= (var->dpl & 3) << 5;
1104                 ar |= (var->present & 1) << 7;
1105                 ar |= (var->avl & 1) << 12;
1106                 ar |= (var->l & 1) << 13;
1107                 ar |= (var->db & 1) << 14;
1108                 ar |= (var->g & 1) << 15;
1109         }
1110         if (ar == 0) /* a 0 value means unusable */
1111                 ar = AR_UNUSABLE_MASK;
1112
1113         return ar;
1114 }
1115
1116 static void vmx_set_segment(struct kvm_vcpu *vcpu,
1117                             struct kvm_segment *var, int seg)
1118 {
1119         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1120         u32 ar;
1121
1122         if (vcpu->rmode.active && seg == VCPU_SREG_TR) {
1123                 vcpu->rmode.tr.selector = var->selector;
1124                 vcpu->rmode.tr.base = var->base;
1125                 vcpu->rmode.tr.limit = var->limit;
1126                 vcpu->rmode.tr.ar = vmx_segment_access_rights(var);
1127                 return;
1128         }
1129         vmcs_writel(sf->base, var->base);
1130         vmcs_write32(sf->limit, var->limit);
1131         vmcs_write16(sf->selector, var->selector);
1132         if (vcpu->rmode.active && var->s) {
1133                 /*
1134                  * Hack real-mode segments into vm86 compatibility.
1135                  */
1136                 if (var->base == 0xffff0000 && var->selector == 0xf000)
1137                         vmcs_writel(sf->base, 0xf0000);
1138                 ar = 0xf3;
1139         } else
1140                 ar = vmx_segment_access_rights(var);
1141         vmcs_write32(sf->ar_bytes, ar);
1142 }
1143
1144 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
1145 {
1146         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
1147
1148         *db = (ar >> 14) & 1;
1149         *l = (ar >> 13) & 1;
1150 }
1151
1152 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1153 {
1154         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
1155         dt->base = vmcs_readl(GUEST_IDTR_BASE);
1156 }
1157
1158 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1159 {
1160         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
1161         vmcs_writel(GUEST_IDTR_BASE, dt->base);
1162 }
1163
1164 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1165 {
1166         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
1167         dt->base = vmcs_readl(GUEST_GDTR_BASE);
1168 }
1169
1170 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
1171 {
1172         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
1173         vmcs_writel(GUEST_GDTR_BASE, dt->base);
1174 }
1175
1176 static int init_rmode_tss(struct kvm* kvm)
1177 {
1178         struct page *p1, *p2, *p3;
1179         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
1180         char *page;
1181
1182         p1 = gfn_to_page(kvm, fn++);
1183         p2 = gfn_to_page(kvm, fn++);
1184         p3 = gfn_to_page(kvm, fn);
1185
1186         if (!p1 || !p2 || !p3) {
1187                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
1188                 return 0;
1189         }
1190
1191         page = kmap_atomic(p1, KM_USER0);
1192         clear_page(page);
1193         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
1194         kunmap_atomic(page, KM_USER0);
1195
1196         page = kmap_atomic(p2, KM_USER0);
1197         clear_page(page);
1198         kunmap_atomic(page, KM_USER0);
1199
1200         page = kmap_atomic(p3, KM_USER0);
1201         clear_page(page);
1202         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
1203         kunmap_atomic(page, KM_USER0);
1204
1205         return 1;
1206 }
1207
1208 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
1209 {
1210         u32 msr_high, msr_low;
1211
1212         rdmsr(msr, msr_low, msr_high);
1213
1214         val &= msr_high;
1215         val |= msr_low;
1216         vmcs_write32(vmcs_field, val);
1217 }
1218
1219 static void seg_setup(int seg)
1220 {
1221         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
1222
1223         vmcs_write16(sf->selector, 0);
1224         vmcs_writel(sf->base, 0);
1225         vmcs_write32(sf->limit, 0xffff);
1226         vmcs_write32(sf->ar_bytes, 0x93);
1227 }
1228
1229 /*
1230  * Sets up the vmcs for emulated real mode.
1231  */
1232 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
1233 {
1234         u32 host_sysenter_cs;
1235         u32 junk;
1236         unsigned long a;
1237         struct descriptor_table dt;
1238         int i;
1239         int ret = 0;
1240         unsigned long kvm_vmx_return;
1241
1242         if (!init_rmode_tss(vcpu->kvm)) {
1243                 ret = -ENOMEM;
1244                 goto out;
1245         }
1246
1247         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1248         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1249         vcpu->cr8 = 0;
1250         vcpu->apic_base = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
1251         if (vcpu == &vcpu->kvm->vcpus[0])
1252                 vcpu->apic_base |= MSR_IA32_APICBASE_BSP;
1253
1254         fx_init(vcpu);
1255
1256         /*
1257          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1258          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1259          */
1260         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1261         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1262         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1263         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1264
1265         seg_setup(VCPU_SREG_DS);
1266         seg_setup(VCPU_SREG_ES);
1267         seg_setup(VCPU_SREG_FS);
1268         seg_setup(VCPU_SREG_GS);
1269         seg_setup(VCPU_SREG_SS);
1270
1271         vmcs_write16(GUEST_TR_SELECTOR, 0);
1272         vmcs_writel(GUEST_TR_BASE, 0);
1273         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1274         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1275
1276         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1277         vmcs_writel(GUEST_LDTR_BASE, 0);
1278         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1279         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1280
1281         vmcs_write32(GUEST_SYSENTER_CS, 0);
1282         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1283         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1284
1285         vmcs_writel(GUEST_RFLAGS, 0x02);
1286         vmcs_writel(GUEST_RIP, 0xfff0);
1287         vmcs_writel(GUEST_RSP, 0);
1288
1289         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1290         vmcs_writel(GUEST_DR7, 0x400);
1291
1292         vmcs_writel(GUEST_GDTR_BASE, 0);
1293         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1294
1295         vmcs_writel(GUEST_IDTR_BASE, 0);
1296         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1297
1298         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1299         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1300         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1301
1302         /* I/O */
1303         vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
1304         vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
1305
1306         guest_write_tsc(0);
1307
1308         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1309
1310         /* Special registers */
1311         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1312
1313         /* Control */
1314         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1315                                PIN_BASED_VM_EXEC_CONTROL,
1316                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1317                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1318                         );
1319         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1320                                CPU_BASED_VM_EXEC_CONTROL,
1321                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1322                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1323                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1324                                | CPU_BASED_ACTIVATE_IO_BITMAP  /* 20.6.2 */
1325                                | CPU_BASED_MOV_DR_EXITING
1326                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1327                         );
1328
1329         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1330         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1331         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1332
1333         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1334         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1335         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1336
1337         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1338         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1339         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1340         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1341         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1342         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1343 #ifdef CONFIG_X86_64
1344         rdmsrl(MSR_FS_BASE, a);
1345         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1346         rdmsrl(MSR_GS_BASE, a);
1347         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1348 #else
1349         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1350         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1351 #endif
1352
1353         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1354
1355         get_idt(&dt);
1356         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1357
1358         asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return));
1359         vmcs_writel(HOST_RIP, kvm_vmx_return); /* 22.2.5 */
1360         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
1361         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
1362         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
1363
1364         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1365         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1366         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1367         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1368         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1369         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1370
1371         for (i = 0; i < NR_VMX_MSR; ++i) {
1372                 u32 index = vmx_msr_index[i];
1373                 u32 data_low, data_high;
1374                 u64 data;
1375                 int j = vcpu->nmsrs;
1376
1377                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1378                         continue;
1379                 if (wrmsr_safe(index, data_low, data_high) < 0)
1380                         continue;
1381                 data = data_low | ((u64)data_high << 32);
1382                 vcpu->host_msrs[j].index = index;
1383                 vcpu->host_msrs[j].reserved = 0;
1384                 vcpu->host_msrs[j].data = data;
1385                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1386                 ++vcpu->nmsrs;
1387         }
1388
1389         setup_msrs(vcpu);
1390
1391         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1392                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1393
1394         /* 22.2.1, 20.8.1 */
1395         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1396                                VM_ENTRY_CONTROLS, 0);
1397         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1398
1399 #ifdef CONFIG_X86_64
1400         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1401         vmcs_writel(TPR_THRESHOLD, 0);
1402 #endif
1403
1404         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
1405         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1406
1407         vcpu->cr0 = 0x60000010;
1408         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1409         vmx_set_cr4(vcpu, 0);
1410 #ifdef CONFIG_X86_64
1411         vmx_set_efer(vcpu, 0);
1412 #endif
1413         vmx_fpu_activate(vcpu);
1414         update_exception_bitmap(vcpu);
1415
1416         return 0;
1417
1418 out:
1419         return ret;
1420 }
1421
1422 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1423 {
1424         u16 ent[2];
1425         u16 cs;
1426         u16 ip;
1427         unsigned long flags;
1428         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1429         u16 sp =  vmcs_readl(GUEST_RSP);
1430         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1431
1432         if (sp > ss_limit || sp < 6 ) {
1433                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1434                             __FUNCTION__,
1435                             vmcs_readl(GUEST_RSP),
1436                             vmcs_readl(GUEST_SS_BASE),
1437                             vmcs_read32(GUEST_SS_LIMIT));
1438                 return;
1439         }
1440
1441         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1442                                                                 sizeof(ent)) {
1443                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1444                 return;
1445         }
1446
1447         flags =  vmcs_readl(GUEST_RFLAGS);
1448         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1449         ip =  vmcs_readl(GUEST_RIP);
1450
1451
1452         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1453             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1454             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1455                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1456                 return;
1457         }
1458
1459         vmcs_writel(GUEST_RFLAGS, flags &
1460                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1461         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1462         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1463         vmcs_writel(GUEST_RIP, ent[0]);
1464         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1465 }
1466
1467 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1468 {
1469         int word_index = __ffs(vcpu->irq_summary);
1470         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1471         int irq = word_index * BITS_PER_LONG + bit_index;
1472
1473         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1474         if (!vcpu->irq_pending[word_index])
1475                 clear_bit(word_index, &vcpu->irq_summary);
1476
1477         if (vcpu->rmode.active) {
1478                 inject_rmode_irq(vcpu, irq);
1479                 return;
1480         }
1481         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1482                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1483 }
1484
1485
1486 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1487                                        struct kvm_run *kvm_run)
1488 {
1489         u32 cpu_based_vm_exec_control;
1490
1491         vcpu->interrupt_window_open =
1492                 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1493                  (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1494
1495         if (vcpu->interrupt_window_open &&
1496             vcpu->irq_summary &&
1497             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1498                 /*
1499                  * If interrupts enabled, and not blocked by sti or mov ss. Good.
1500                  */
1501                 kvm_do_inject_irq(vcpu);
1502
1503         cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1504         if (!vcpu->interrupt_window_open &&
1505             (vcpu->irq_summary || kvm_run->request_interrupt_window))
1506                 /*
1507                  * Interrupts blocked.  Wait for unblock.
1508                  */
1509                 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1510         else
1511                 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1512         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1513 }
1514
1515 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1516 {
1517         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1518
1519         set_debugreg(dbg->bp[0], 0);
1520         set_debugreg(dbg->bp[1], 1);
1521         set_debugreg(dbg->bp[2], 2);
1522         set_debugreg(dbg->bp[3], 3);
1523
1524         if (dbg->singlestep) {
1525                 unsigned long flags;
1526
1527                 flags = vmcs_readl(GUEST_RFLAGS);
1528                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1529                 vmcs_writel(GUEST_RFLAGS, flags);
1530         }
1531 }
1532
1533 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1534                                   int vec, u32 err_code)
1535 {
1536         if (!vcpu->rmode.active)
1537                 return 0;
1538
1539         /*
1540          * Instruction with address size override prefix opcode 0x67
1541          * Cause the #SS fault with 0 error code in VM86 mode.
1542          */
1543         if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
1544                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1545                         return 1;
1546         return 0;
1547 }
1548
1549 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1550 {
1551         u32 intr_info, error_code;
1552         unsigned long cr2, rip;
1553         u32 vect_info;
1554         enum emulation_result er;
1555         int r;
1556
1557         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1558         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1559
1560         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1561                                                 !is_page_fault(intr_info)) {
1562                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1563                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1564         }
1565
1566         if (is_external_interrupt(vect_info)) {
1567                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1568                 set_bit(irq, vcpu->irq_pending);
1569                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1570         }
1571
1572         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1573                 asm ("int $2");
1574                 return 1;
1575         }
1576
1577         if (is_no_device(intr_info)) {
1578                 vmx_fpu_activate(vcpu);
1579                 return 1;
1580         }
1581
1582         error_code = 0;
1583         rip = vmcs_readl(GUEST_RIP);
1584         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1585                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1586         if (is_page_fault(intr_info)) {
1587                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1588
1589                 spin_lock(&vcpu->kvm->lock);
1590                 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1591                 if (r < 0) {
1592                         spin_unlock(&vcpu->kvm->lock);
1593                         return r;
1594                 }
1595                 if (!r) {
1596                         spin_unlock(&vcpu->kvm->lock);
1597                         return 1;
1598                 }
1599
1600                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1601                 spin_unlock(&vcpu->kvm->lock);
1602
1603                 switch (er) {
1604                 case EMULATE_DONE:
1605                         return 1;
1606                 case EMULATE_DO_MMIO:
1607                         ++vcpu->stat.mmio_exits;
1608                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1609                         return 0;
1610                  case EMULATE_FAIL:
1611                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1612                         break;
1613                 default:
1614                         BUG();
1615                 }
1616         }
1617
1618         if (vcpu->rmode.active &&
1619             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1620                                                                 error_code)) {
1621                 if (vcpu->halt_request) {
1622                         vcpu->halt_request = 0;
1623                         return kvm_emulate_halt(vcpu);
1624                 }
1625                 return 1;
1626         }
1627
1628         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1629                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1630                 return 0;
1631         }
1632         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1633         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1634         kvm_run->ex.error_code = error_code;
1635         return 0;
1636 }
1637
1638 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1639                                      struct kvm_run *kvm_run)
1640 {
1641         ++vcpu->stat.irq_exits;
1642         return 1;
1643 }
1644
1645 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1646 {
1647         kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1648         return 0;
1649 }
1650
1651 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1652 {
1653         u64 inst;
1654         gva_t rip;
1655         int countr_size;
1656         int i, n;
1657
1658         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1659                 countr_size = 2;
1660         } else {
1661                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1662
1663                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1664                               (cs_ar & AR_DB_MASK) ? 4: 2;
1665         }
1666
1667         rip =  vmcs_readl(GUEST_RIP);
1668         if (countr_size != 8)
1669                 rip += vmcs_readl(GUEST_CS_BASE);
1670
1671         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1672
1673         for (i = 0; i < n; i++) {
1674                 switch (((u8*)&inst)[i]) {
1675                 case 0xf0:
1676                 case 0xf2:
1677                 case 0xf3:
1678                 case 0x2e:
1679                 case 0x36:
1680                 case 0x3e:
1681                 case 0x26:
1682                 case 0x64:
1683                 case 0x65:
1684                 case 0x66:
1685                         break;
1686                 case 0x67:
1687                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1688                 default:
1689                         goto done;
1690                 }
1691         }
1692         return 0;
1693 done:
1694         countr_size *= 8;
1695         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1696         //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1697         return 1;
1698 }
1699
1700 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1701 {
1702         u64 exit_qualification;
1703         int size, down, in, string, rep;
1704         unsigned port;
1705         unsigned long count;
1706         gva_t address;
1707
1708         ++vcpu->stat.io_exits;
1709         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1710         in = (exit_qualification & 8) != 0;
1711         size = (exit_qualification & 7) + 1;
1712         string = (exit_qualification & 16) != 0;
1713         down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1714         count = 1;
1715         rep = (exit_qualification & 32) != 0;
1716         port = exit_qualification >> 16;
1717         address = 0;
1718         if (string) {
1719                 if (rep && !get_io_count(vcpu, &count))
1720                         return 1;
1721                 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1722         }
1723         return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1724                              address, rep, port);
1725 }
1726
1727 static void
1728 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1729 {
1730         /*
1731          * Patch in the VMCALL instruction:
1732          */
1733         hypercall[0] = 0x0f;
1734         hypercall[1] = 0x01;
1735         hypercall[2] = 0xc1;
1736         hypercall[3] = 0xc3;
1737 }
1738
1739 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1740 {
1741         u64 exit_qualification;
1742         int cr;
1743         int reg;
1744
1745         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1746         cr = exit_qualification & 15;
1747         reg = (exit_qualification >> 8) & 15;
1748         switch ((exit_qualification >> 4) & 3) {
1749         case 0: /* mov to cr */
1750                 switch (cr) {
1751                 case 0:
1752                         vcpu_load_rsp_rip(vcpu);
1753                         set_cr0(vcpu, vcpu->regs[reg]);
1754                         skip_emulated_instruction(vcpu);
1755                         return 1;
1756                 case 3:
1757                         vcpu_load_rsp_rip(vcpu);
1758                         set_cr3(vcpu, vcpu->regs[reg]);
1759                         skip_emulated_instruction(vcpu);
1760                         return 1;
1761                 case 4:
1762                         vcpu_load_rsp_rip(vcpu);
1763                         set_cr4(vcpu, vcpu->regs[reg]);
1764                         skip_emulated_instruction(vcpu);
1765                         return 1;
1766                 case 8:
1767                         vcpu_load_rsp_rip(vcpu);
1768                         set_cr8(vcpu, vcpu->regs[reg]);
1769                         skip_emulated_instruction(vcpu);
1770                         return 1;
1771                 };
1772                 break;
1773         case 2: /* clts */
1774                 vcpu_load_rsp_rip(vcpu);
1775                 vmx_fpu_deactivate(vcpu);
1776                 vcpu->cr0 &= ~CR0_TS_MASK;
1777                 vmcs_writel(CR0_READ_SHADOW, vcpu->cr0);
1778                 vmx_fpu_activate(vcpu);
1779                 skip_emulated_instruction(vcpu);
1780                 return 1;
1781         case 1: /*mov from cr*/
1782                 switch (cr) {
1783                 case 3:
1784                         vcpu_load_rsp_rip(vcpu);
1785                         vcpu->regs[reg] = vcpu->cr3;
1786                         vcpu_put_rsp_rip(vcpu);
1787                         skip_emulated_instruction(vcpu);
1788                         return 1;
1789                 case 8:
1790                         vcpu_load_rsp_rip(vcpu);
1791                         vcpu->regs[reg] = vcpu->cr8;
1792                         vcpu_put_rsp_rip(vcpu);
1793                         skip_emulated_instruction(vcpu);
1794                         return 1;
1795                 }
1796                 break;
1797         case 3: /* lmsw */
1798                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1799
1800                 skip_emulated_instruction(vcpu);
1801                 return 1;
1802         default:
1803                 break;
1804         }
1805         kvm_run->exit_reason = 0;
1806         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1807                (int)(exit_qualification >> 4) & 3, cr);
1808         return 0;
1809 }
1810
1811 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1812 {
1813         u64 exit_qualification;
1814         unsigned long val;
1815         int dr, reg;
1816
1817         /*
1818          * FIXME: this code assumes the host is debugging the guest.
1819          *        need to deal with guest debugging itself too.
1820          */
1821         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1822         dr = exit_qualification & 7;
1823         reg = (exit_qualification >> 8) & 15;
1824         vcpu_load_rsp_rip(vcpu);
1825         if (exit_qualification & 16) {
1826                 /* mov from dr */
1827                 switch (dr) {
1828                 case 6:
1829                         val = 0xffff0ff0;
1830                         break;
1831                 case 7:
1832                         val = 0x400;
1833                         break;
1834                 default:
1835                         val = 0;
1836                 }
1837                 vcpu->regs[reg] = val;
1838         } else {
1839                 /* mov to dr */
1840         }
1841         vcpu_put_rsp_rip(vcpu);
1842         skip_emulated_instruction(vcpu);
1843         return 1;
1844 }
1845
1846 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1847 {
1848         kvm_emulate_cpuid(vcpu);
1849         return 1;
1850 }
1851
1852 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1853 {
1854         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1855         u64 data;
1856
1857         if (vmx_get_msr(vcpu, ecx, &data)) {
1858                 vmx_inject_gp(vcpu, 0);
1859                 return 1;
1860         }
1861
1862         /* FIXME: handling of bits 32:63 of rax, rdx */
1863         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1864         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1865         skip_emulated_instruction(vcpu);
1866         return 1;
1867 }
1868
1869 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1870 {
1871         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1872         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1873                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1874
1875         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1876                 vmx_inject_gp(vcpu, 0);
1877                 return 1;
1878         }
1879
1880         skip_emulated_instruction(vcpu);
1881         return 1;
1882 }
1883
1884 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1885                               struct kvm_run *kvm_run)
1886 {
1887         kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1888         kvm_run->cr8 = vcpu->cr8;
1889         kvm_run->apic_base = vcpu->apic_base;
1890         kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1891                                                   vcpu->irq_summary == 0);
1892 }
1893
1894 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1895                                    struct kvm_run *kvm_run)
1896 {
1897         /*
1898          * If the user space waits to inject interrupts, exit as soon as
1899          * possible
1900          */
1901         if (kvm_run->request_interrupt_window &&
1902             !vcpu->irq_summary) {
1903                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1904                 ++vcpu->stat.irq_window_exits;
1905                 return 0;
1906         }
1907         return 1;
1908 }
1909
1910 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1911 {
1912         skip_emulated_instruction(vcpu);
1913         return kvm_emulate_halt(vcpu);
1914 }
1915
1916 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1917 {
1918         skip_emulated_instruction(vcpu);
1919         return kvm_hypercall(vcpu, kvm_run);
1920 }
1921
1922 /*
1923  * The exit handlers return 1 if the exit was handled fully and guest execution
1924  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1925  * to be done to userspace and return 0.
1926  */
1927 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1928                                       struct kvm_run *kvm_run) = {
1929         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1930         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1931         [EXIT_REASON_TRIPLE_FAULT]            = handle_triple_fault,
1932         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1933         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1934         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1935         [EXIT_REASON_CPUID]                   = handle_cpuid,
1936         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1937         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1938         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1939         [EXIT_REASON_HLT]                     = handle_halt,
1940         [EXIT_REASON_VMCALL]                  = handle_vmcall,
1941 };
1942
1943 static const int kvm_vmx_max_exit_handlers =
1944         ARRAY_SIZE(kvm_vmx_exit_handlers);
1945
1946 /*
1947  * The guest has exited.  See if we can fix it or if we need userspace
1948  * assistance.
1949  */
1950 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1951 {
1952         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1953         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1954
1955         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1956                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1957                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1958                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1959         if (exit_reason < kvm_vmx_max_exit_handlers
1960             && kvm_vmx_exit_handlers[exit_reason])
1961                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1962         else {
1963                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1964                 kvm_run->hw.hardware_exit_reason = exit_reason;
1965         }
1966         return 0;
1967 }
1968
1969 /*
1970  * Check if userspace requested an interrupt window, and that the
1971  * interrupt window is open.
1972  *
1973  * No need to exit to userspace if we already have an interrupt queued.
1974  */
1975 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1976                                           struct kvm_run *kvm_run)
1977 {
1978         return (!vcpu->irq_summary &&
1979                 kvm_run->request_interrupt_window &&
1980                 vcpu->interrupt_window_open &&
1981                 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1982 }
1983
1984 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1985 {
1986         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1987 }
1988
1989 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1990 {
1991         u8 fail;
1992         int r;
1993
1994 preempted:
1995         if (vcpu->guest_debug.enabled)
1996                 kvm_guest_debug_pre(vcpu);
1997
1998 again:
1999         if (!vcpu->mmio_read_completed)
2000                 do_interrupt_requests(vcpu, kvm_run);
2001
2002         vmx_save_host_state(vcpu);
2003         kvm_load_guest_fpu(vcpu);
2004
2005         r = kvm_mmu_reload(vcpu);
2006         if (unlikely(r))
2007                 goto out;
2008
2009         /*
2010          * Loading guest fpu may have cleared host cr0.ts
2011          */
2012         vmcs_writel(HOST_CR0, read_cr0());
2013
2014         local_irq_disable();
2015
2016         vcpu->guest_mode = 1;
2017         if (vcpu->requests)
2018                 if (test_and_clear_bit(KVM_TLB_FLUSH, &vcpu->requests))
2019                     vmx_flush_tlb(vcpu);
2020
2021         asm (
2022                 /* Store host registers */
2023 #ifdef CONFIG_X86_64
2024                 "push %%rax; push %%rbx; push %%rdx;"
2025                 "push %%rsi; push %%rdi; push %%rbp;"
2026                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
2027                 "push %%r12; push %%r13; push %%r14; push %%r15;"
2028                 "push %%rcx \n\t"
2029                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2030 #else
2031                 "pusha; push %%ecx \n\t"
2032                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
2033 #endif
2034                 /* Check if vmlaunch of vmresume is needed */
2035                 "cmp $0, %1 \n\t"
2036                 /* Load guest registers.  Don't clobber flags. */
2037 #ifdef CONFIG_X86_64
2038                 "mov %c[cr2](%3), %%rax \n\t"
2039                 "mov %%rax, %%cr2 \n\t"
2040                 "mov %c[rax](%3), %%rax \n\t"
2041                 "mov %c[rbx](%3), %%rbx \n\t"
2042                 "mov %c[rdx](%3), %%rdx \n\t"
2043                 "mov %c[rsi](%3), %%rsi \n\t"
2044                 "mov %c[rdi](%3), %%rdi \n\t"
2045                 "mov %c[rbp](%3), %%rbp \n\t"
2046                 "mov %c[r8](%3),  %%r8  \n\t"
2047                 "mov %c[r9](%3),  %%r9  \n\t"
2048                 "mov %c[r10](%3), %%r10 \n\t"
2049                 "mov %c[r11](%3), %%r11 \n\t"
2050                 "mov %c[r12](%3), %%r12 \n\t"
2051                 "mov %c[r13](%3), %%r13 \n\t"
2052                 "mov %c[r14](%3), %%r14 \n\t"
2053                 "mov %c[r15](%3), %%r15 \n\t"
2054                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2055 #else
2056                 "mov %c[cr2](%3), %%eax \n\t"
2057                 "mov %%eax,   %%cr2 \n\t"
2058                 "mov %c[rax](%3), %%eax \n\t"
2059                 "mov %c[rbx](%3), %%ebx \n\t"
2060                 "mov %c[rdx](%3), %%edx \n\t"
2061                 "mov %c[rsi](%3), %%esi \n\t"
2062                 "mov %c[rdi](%3), %%edi \n\t"
2063                 "mov %c[rbp](%3), %%ebp \n\t"
2064                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2065 #endif
2066                 /* Enter guest mode */
2067                 "jne .Llaunched \n\t"
2068                 ASM_VMX_VMLAUNCH "\n\t"
2069                 "jmp .Lkvm_vmx_return \n\t"
2070                 ".Llaunched: " ASM_VMX_VMRESUME "\n\t"
2071                 ".Lkvm_vmx_return: "
2072                 /* Save guest registers, load host registers, keep flags */
2073 #ifdef CONFIG_X86_64
2074                 "xchg %3,     (%%rsp) \n\t"
2075                 "mov %%rax, %c[rax](%3) \n\t"
2076                 "mov %%rbx, %c[rbx](%3) \n\t"
2077                 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2078                 "mov %%rdx, %c[rdx](%3) \n\t"
2079                 "mov %%rsi, %c[rsi](%3) \n\t"
2080                 "mov %%rdi, %c[rdi](%3) \n\t"
2081                 "mov %%rbp, %c[rbp](%3) \n\t"
2082                 "mov %%r8,  %c[r8](%3) \n\t"
2083                 "mov %%r9,  %c[r9](%3) \n\t"
2084                 "mov %%r10, %c[r10](%3) \n\t"
2085                 "mov %%r11, %c[r11](%3) \n\t"
2086                 "mov %%r12, %c[r12](%3) \n\t"
2087                 "mov %%r13, %c[r13](%3) \n\t"
2088                 "mov %%r14, %c[r14](%3) \n\t"
2089                 "mov %%r15, %c[r15](%3) \n\t"
2090                 "mov %%cr2, %%rax   \n\t"
2091                 "mov %%rax, %c[cr2](%3) \n\t"
2092                 "mov (%%rsp), %3 \n\t"
2093
2094                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
2095                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
2096                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
2097                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
2098 #else
2099                 "xchg %3, (%%esp) \n\t"
2100                 "mov %%eax, %c[rax](%3) \n\t"
2101                 "mov %%ebx, %c[rbx](%3) \n\t"
2102                 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2103                 "mov %%edx, %c[rdx](%3) \n\t"
2104                 "mov %%esi, %c[rsi](%3) \n\t"
2105                 "mov %%edi, %c[rdi](%3) \n\t"
2106                 "mov %%ebp, %c[rbp](%3) \n\t"
2107                 "mov %%cr2, %%eax  \n\t"
2108                 "mov %%eax, %c[cr2](%3) \n\t"
2109                 "mov (%%esp), %3 \n\t"
2110
2111                 "pop %%ecx; popa \n\t"
2112 #endif
2113                 "setbe %0 \n\t"
2114               : "=q" (fail)
2115               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
2116                 "c"(vcpu),
2117                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
2118                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
2119                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
2120                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
2121                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
2122                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
2123                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
2124 #ifdef CONFIG_X86_64
2125                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
2126                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
2127                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
2128                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
2129                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
2130                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
2131                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
2132                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
2133 #endif
2134                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
2135               : "cc", "memory" );
2136
2137         vcpu->guest_mode = 0;
2138         local_irq_enable();
2139
2140         ++vcpu->stat.exits;
2141
2142         vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
2143
2144         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
2145
2146         if (unlikely(fail)) {
2147                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
2148                 kvm_run->fail_entry.hardware_entry_failure_reason
2149                         = vmcs_read32(VM_INSTRUCTION_ERROR);
2150                 r = 0;
2151                 goto out;
2152         }
2153         /*
2154          * Profile KVM exit RIPs:
2155          */
2156         if (unlikely(prof_on == KVM_PROFILING))
2157                 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
2158
2159         vcpu->launched = 1;
2160         r = kvm_handle_exit(kvm_run, vcpu);
2161         if (r > 0) {
2162                 /* Give scheduler a change to reschedule. */
2163                 if (signal_pending(current)) {
2164                         r = -EINTR;
2165                         kvm_run->exit_reason = KVM_EXIT_INTR;
2166                         ++vcpu->stat.signal_exits;
2167                         goto out;
2168                 }
2169
2170                 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
2171                         r = -EINTR;
2172                         kvm_run->exit_reason = KVM_EXIT_INTR;
2173                         ++vcpu->stat.request_irq_exits;
2174                         goto out;
2175                 }
2176                 if (!need_resched()) {
2177                         ++vcpu->stat.light_exits;
2178                         goto again;
2179                 }
2180         }
2181
2182 out:
2183         if (r > 0) {
2184                 kvm_resched(vcpu);
2185                 goto preempted;
2186         }
2187
2188         post_kvm_run_save(vcpu, kvm_run);
2189         return r;
2190 }
2191
2192 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
2193                                   unsigned long addr,
2194                                   u32 err_code)
2195 {
2196         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
2197
2198         ++vcpu->stat.pf_guest;
2199
2200         if (is_page_fault(vect_info)) {
2201                 printk(KERN_DEBUG "inject_page_fault: "
2202                        "double fault 0x%lx @ 0x%lx\n",
2203                        addr, vmcs_readl(GUEST_RIP));
2204                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
2205                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2206                              DF_VECTOR |
2207                              INTR_TYPE_EXCEPTION |
2208                              INTR_INFO_DELIEVER_CODE_MASK |
2209                              INTR_INFO_VALID_MASK);
2210                 return;
2211         }
2212         vcpu->cr2 = addr;
2213         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
2214         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
2215                      PF_VECTOR |
2216                      INTR_TYPE_EXCEPTION |
2217                      INTR_INFO_DELIEVER_CODE_MASK |
2218                      INTR_INFO_VALID_MASK);
2219
2220 }
2221
2222 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2223 {
2224         if (vcpu->vmcs) {
2225                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2226                 free_vmcs(vcpu->vmcs);
2227                 vcpu->vmcs = NULL;
2228         }
2229 }
2230
2231 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2232 {
2233         vmx_free_vmcs(vcpu);
2234 }
2235
2236 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2237 {
2238         struct vmcs *vmcs;
2239
2240         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2241         if (!vcpu->guest_msrs)
2242                 return -ENOMEM;
2243
2244         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2245         if (!vcpu->host_msrs)
2246                 goto out_free_guest_msrs;
2247
2248         vmcs = alloc_vmcs();
2249         if (!vmcs)
2250                 goto out_free_msrs;
2251
2252         vmcs_clear(vmcs);
2253         vcpu->vmcs = vmcs;
2254         vcpu->launched = 0;
2255
2256         return 0;
2257
2258 out_free_msrs:
2259         kfree(vcpu->host_msrs);
2260         vcpu->host_msrs = NULL;
2261
2262 out_free_guest_msrs:
2263         kfree(vcpu->guest_msrs);
2264         vcpu->guest_msrs = NULL;
2265
2266         return -ENOMEM;
2267 }
2268
2269 static struct kvm_arch_ops vmx_arch_ops = {
2270         .cpu_has_kvm_support = cpu_has_kvm_support,
2271         .disabled_by_bios = vmx_disabled_by_bios,
2272         .hardware_setup = hardware_setup,
2273         .hardware_unsetup = hardware_unsetup,
2274         .hardware_enable = hardware_enable,
2275         .hardware_disable = hardware_disable,
2276
2277         .vcpu_create = vmx_create_vcpu,
2278         .vcpu_free = vmx_free_vcpu,
2279
2280         .vcpu_load = vmx_vcpu_load,
2281         .vcpu_put = vmx_vcpu_put,
2282         .vcpu_decache = vmx_vcpu_decache,
2283
2284         .set_guest_debug = set_guest_debug,
2285         .get_msr = vmx_get_msr,
2286         .set_msr = vmx_set_msr,
2287         .get_segment_base = vmx_get_segment_base,
2288         .get_segment = vmx_get_segment,
2289         .set_segment = vmx_set_segment,
2290         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2291         .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
2292         .set_cr0 = vmx_set_cr0,
2293         .set_cr3 = vmx_set_cr3,
2294         .set_cr4 = vmx_set_cr4,
2295 #ifdef CONFIG_X86_64
2296         .set_efer = vmx_set_efer,
2297 #endif
2298         .get_idt = vmx_get_idt,
2299         .set_idt = vmx_set_idt,
2300         .get_gdt = vmx_get_gdt,
2301         .set_gdt = vmx_set_gdt,
2302         .cache_regs = vcpu_load_rsp_rip,
2303         .decache_regs = vcpu_put_rsp_rip,
2304         .get_rflags = vmx_get_rflags,
2305         .set_rflags = vmx_set_rflags,
2306
2307         .tlb_flush = vmx_flush_tlb,
2308         .inject_page_fault = vmx_inject_page_fault,
2309
2310         .inject_gp = vmx_inject_gp,
2311
2312         .run = vmx_vcpu_run,
2313         .skip_emulated_instruction = skip_emulated_instruction,
2314         .vcpu_setup = vmx_vcpu_setup,
2315         .patch_hypercall = vmx_patch_hypercall,
2316 };
2317
2318 static int __init vmx_init(void)
2319 {
2320         void *iova;
2321         int r;
2322
2323         vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2324         if (!vmx_io_bitmap_a)
2325                 return -ENOMEM;
2326
2327         vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
2328         if (!vmx_io_bitmap_b) {
2329                 r = -ENOMEM;
2330                 goto out;
2331         }
2332
2333         /*
2334          * Allow direct access to the PC debug port (it is often used for I/O
2335          * delays, but the vmexits simply slow things down).
2336          */
2337         iova = kmap(vmx_io_bitmap_a);
2338         memset(iova, 0xff, PAGE_SIZE);
2339         clear_bit(0x80, iova);
2340         kunmap(vmx_io_bitmap_a);
2341
2342         iova = kmap(vmx_io_bitmap_b);
2343         memset(iova, 0xff, PAGE_SIZE);
2344         kunmap(vmx_io_bitmap_b);
2345
2346         r = kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2347         if (r)
2348                 goto out1;
2349
2350         return 0;
2351
2352 out1:
2353         __free_page(vmx_io_bitmap_b);
2354 out:
2355         __free_page(vmx_io_bitmap_a);
2356         return r;
2357 }
2358
2359 static void __exit vmx_exit(void)
2360 {
2361         __free_page(vmx_io_bitmap_b);
2362         __free_page(vmx_io_bitmap_a);
2363
2364         kvm_exit_arch();
2365 }
2366
2367 module_init(vmx_init)
2368 module_exit(vmx_exit)