drivers/kvm/vmx.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  *
   9  * Authors:
  10  *   Avi Kivity   <avi@qumranet.com>
  11  *   Yaniv Kamay  <yaniv@qumranet.com>
  12  *
  13  * This work is licensed under the terms of the GNU GPL, version 2.  See
  14  * the COPYING file in the top-level directory.
  15  *
  16  */
  17
  18 #include "kvm.h"
  19 #include "vmx.h"
  20 #include "kvm_vmx.h"
  21 #include <linux/module.h>
  22 #include <linux/mm.h>
  23 #include <linux/highmem.h>
  24 #include <asm/io.h>
  25 #include <asm/desc.h>
  26
  27 #include "segment_descriptor.h"
  28
  29 #define MSR_IA32_FEATURE_CONTROL                0x03a
  30
  31 MODULE_AUTHOR("Qumranet");
  32 MODULE_LICENSE("GPL");
  33
  34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
  35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
  36
  37 #ifdef CONFIG_X86_64
  38 #define HOST_IS_64 1
  39 #else
  40 #define HOST_IS_64 0
  41 #endif
  42
  43 static struct vmcs_descriptor {
  44         int size;
  45         int order;
  46         u32 revision_id;
  47 } vmcs_descriptor;
  48
  49 #define VMX_SEGMENT_FIELD(seg)                                  \
  50         [VCPU_SREG_##seg] = {                                   \
  51                 .selector = GUEST_##seg##_SELECTOR,             \
  52                 .base = GUEST_##seg##_BASE,                     \
  53                 .limit = GUEST_##seg##_LIMIT,                   \
  54                 .ar_bytes = GUEST_##seg##_AR_BYTES,             \
  55         }
  56
  57 static struct kvm_vmx_segment_field {
  58         unsigned selector;
  59         unsigned base;
  60         unsigned limit;
  61         unsigned ar_bytes;
  62 } kvm_vmx_segment_fields[] = {
  63         VMX_SEGMENT_FIELD(CS),
  64         VMX_SEGMENT_FIELD(DS),
  65         VMX_SEGMENT_FIELD(ES),
  66         VMX_SEGMENT_FIELD(FS),
  67         VMX_SEGMENT_FIELD(GS),
  68         VMX_SEGMENT_FIELD(SS),
  69         VMX_SEGMENT_FIELD(TR),
  70         VMX_SEGMENT_FIELD(LDTR),
  71 };
  72
  73 static const u32 vmx_msr_index[] = {
  74 #ifdef CONFIG_X86_64
  75         MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
  76 #endif
  77         MSR_EFER, MSR_K6_STAR,
  78 };
  79 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
  80
  81 struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr);
  82
  83 static inline int is_page_fault(u32 intr_info)
  84 {
  85         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
  86                              INTR_INFO_VALID_MASK)) ==
  87                 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
  88 }
  89
  90 static inline int is_external_interrupt(u32 intr_info)
  91 {
  92         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
  93                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
  94 }
  95
  96 static void vmcs_clear(struct vmcs *vmcs)
  97 {
  98         u64 phys_addr = __pa(vmcs);
  99         u8 error;
 100
 101         asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
 102                       : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 103                       : "cc", "memory");
 104         if (error)
 105                 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
 106                        vmcs, phys_addr);
 107 }
 108
 109 static void __vcpu_clear(void *arg)
 110 {
 111         struct kvm_vcpu *vcpu = arg;
 112         int cpu = smp_processor_id();
 113
 114         if (vcpu->cpu == cpu)
 115                 vmcs_clear(vcpu->vmcs);
 116         if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
 117                 per_cpu(current_vmcs, cpu) = NULL;
 118 }
 119
 120 static unsigned long vmcs_readl(unsigned long field)
 121 {
 122         unsigned long value;
 123
 124         asm volatile (ASM_VMX_VMREAD_RDX_RAX
 125                       : "=a"(value) : "d"(field) : "cc");
 126         return value;
 127 }
 128
 129 static u16 vmcs_read16(unsigned long field)
 130 {
 131         return vmcs_readl(field);
 132 }
 133
 134 static u32 vmcs_read32(unsigned long field)
 135 {
 136         return vmcs_readl(field);
 137 }
 138
 139 static u64 vmcs_read64(unsigned long field)
 140 {
 141 #ifdef CONFIG_X86_64
 142         return vmcs_readl(field);
 143 #else
 144         return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
 145 #endif
 146 }
 147
 148 static void vmcs_writel(unsigned long field, unsigned long value)
 149 {
 150         u8 error;
 151
 152         asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
 153                        : "=q"(error) : "a"(value), "d"(field) : "cc" );
 154         if (error)
 155                 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
 156                        field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
 157 }
 158
 159 static void vmcs_write16(unsigned long field, u16 value)
 160 {
 161         vmcs_writel(field, value);
 162 }
 163
 164 static void vmcs_write32(unsigned long field, u32 value)
 165 {
 166         vmcs_writel(field, value);
 167 }
 168
 169 static void vmcs_write64(unsigned long field, u64 value)
 170 {
 171 #ifdef CONFIG_X86_64
 172         vmcs_writel(field, value);
 173 #else
 174         vmcs_writel(field, value);
 175         asm volatile ("");
 176         vmcs_writel(field+1, value >> 32);
 177 #endif
 178 }
 179
 180 /*
 181  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
 182  * vcpu mutex is already taken.
 183  */
 184 static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu)
 185 {
 186         u64 phys_addr = __pa(vcpu->vmcs);
 187         int cpu;
 188
 189         cpu = get_cpu();
 190
 191         if (vcpu->cpu != cpu) {
 192                 smp_call_function(__vcpu_clear, vcpu, 0, 1);
 193                 vcpu->launched = 0;
 194         }
 195
 196         if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
 197                 u8 error;
 198
 199                 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
 200                 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
 201                               : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
 202                               : "cc");
 203                 if (error)
 204                         printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
 205                                vcpu->vmcs, phys_addr);
 206         }
 207
 208         if (vcpu->cpu != cpu) {
 209                 struct descriptor_table dt;
 210                 unsigned long sysenter_esp;
 211
 212                 vcpu->cpu = cpu;
 213                 /*
 214                  * Linux uses per-cpu TSS and GDT, so set these when switching
 215                  * processors.
 216                  */
 217                 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
 218                 get_gdt(&dt);
 219                 vmcs_writel(HOST_GDTR_BASE, dt.base);   /* 22.2.4 */
 220
 221                 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
 222                 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
 223         }
 224         return vcpu;
 225 }
 226
 227 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 228 {
 229         put_cpu();
 230 }
 231
 232 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 233 {
 234         return vmcs_readl(GUEST_RFLAGS);
 235 }
 236
 237 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 238 {
 239         vmcs_writel(GUEST_RFLAGS, rflags);
 240 }
 241
 242 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 243 {
 244         unsigned long rip;
 245         u32 interruptibility;
 246
 247         rip = vmcs_readl(GUEST_RIP);
 248         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
 249         vmcs_writel(GUEST_RIP, rip);
 250
 251         /*
 252          * We emulated an instruction, so temporary interrupt blocking
 253          * should be removed, if set.
 254          */
 255         interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
 256         if (interruptibility & 3)
 257                 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
 258                              interruptibility & ~3);
 259 }
 260
 261 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
 262 {
 263         printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
 264                vmcs_readl(GUEST_RIP));
 265         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
 266         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
 267                      GP_VECTOR |
 268                      INTR_TYPE_EXCEPTION |
 269                      INTR_INFO_DELIEVER_CODE_MASK |
 270                      INTR_INFO_VALID_MASK);
 271 }
 272
 273 /*
 274  * reads and returns guest's timestamp counter "register"
 275  * guest_tsc = host_tsc + tsc_offset    -- 21.3
 276  */
 277 static u64 guest_read_tsc(void)
 278 {
 279         u64 host_tsc, tsc_offset;
 280
 281         rdtscll(host_tsc);
 282         tsc_offset = vmcs_read64(TSC_OFFSET);
 283         return host_tsc + tsc_offset;
 284 }
 285
 286 /*
 287  * writes 'guest_tsc' into guest's timestamp counter "register"
 288  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
 289  */
 290 static void guest_write_tsc(u64 guest_tsc)
 291 {
 292         u64 host_tsc;
 293
 294         rdtscll(host_tsc);
 295         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 296 }
 297
 298 static void reload_tss(void)
 299 {
 300 #ifndef CONFIG_X86_64
 301
 302         /*
 303          * VT restores TR but not its size.  Useless.
 304          */
 305         struct descriptor_table gdt;
 306         struct segment_descriptor *descs;
 307
 308         get_gdt(&gdt);
 309         descs = (void *)gdt.base;
 310         descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
 311         load_TR_desc();
 312 #endif
 313 }
 314
 315 /*
 316  * Reads an msr value (of 'msr_index') into 'pdata'.
 317  * Returns 0 on success, non-0 otherwise.
 318  * Assumes vcpu_load() was already called.
 319  */
 320 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
 321 {
 322         u64 data;
 323         struct vmx_msr_entry *msr;
 324
 325         if (!pdata) {
 326                 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
 327                 return -EINVAL;
 328         }
 329
 330         switch (msr_index) {
 331 #ifdef CONFIG_X86_64
 332         case MSR_FS_BASE:
 333                 data = vmcs_readl(GUEST_FS_BASE);
 334                 break;
 335         case MSR_GS_BASE:
 336                 data = vmcs_readl(GUEST_GS_BASE);
 337                 break;
 338         case MSR_EFER:
 339                 data = vcpu->shadow_efer;
 340                 break;
 341 #endif
 342         case MSR_IA32_TIME_STAMP_COUNTER:
 343                 data = guest_read_tsc();
 344                 break;
 345         case MSR_IA32_SYSENTER_CS:
 346                 data = vmcs_read32(GUEST_SYSENTER_CS);
 347                 break;
 348         case MSR_IA32_SYSENTER_EIP:
 349                 data = vmcs_read32(GUEST_SYSENTER_EIP);
 350                 break;
 351         case MSR_IA32_SYSENTER_ESP:
 352                 data = vmcs_read32(GUEST_SYSENTER_ESP);
 353                 break;
 354         case MSR_IA32_MC0_CTL:
 355         case MSR_IA32_MCG_STATUS:
 356         case MSR_IA32_MCG_CAP:
 357         case MSR_IA32_MC0_MISC:
 358         case MSR_IA32_MC0_MISC+4:
 359         case MSR_IA32_MC0_MISC+8:
 360         case MSR_IA32_MC0_MISC+12:
 361         case MSR_IA32_MC0_MISC+16:
 362         case MSR_IA32_UCODE_REV:
 363                 /* MTRR registers */
 364         case 0xfe:
 365         case 0x200 ... 0x2ff:
 366                 data = 0;
 367                 break;
 368         case MSR_IA32_APICBASE:
 369                 data = vcpu->apic_base;
 370                 break;
 371         default:
 372                 msr = find_msr_entry(vcpu, msr_index);
 373                 if (!msr) {
 374                         printk(KERN_ERR "kvm: unhandled rdmsr: %x\n", msr_index);
 375                         return 1;
 376                 }
 377                 data = msr->data;
 378                 break;
 379         }
 380
 381         *pdata = data;
 382         return 0;
 383 }
 384
 385 /*
 386  * Writes msr value into into the appropriate "register".
 387  * Returns 0 on success, non-0 otherwise.
 388  * Assumes vcpu_load() was already called.
 389  */
 390 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 391 {
 392         struct vmx_msr_entry *msr;
 393         switch (msr_index) {
 394 #ifdef CONFIG_X86_64
 395         case MSR_FS_BASE:
 396                 vmcs_writel(GUEST_FS_BASE, data);
 397                 break;
 398         case MSR_GS_BASE:
 399                 vmcs_writel(GUEST_GS_BASE, data);
 400                 break;
 401 #endif
 402         case MSR_IA32_SYSENTER_CS:
 403                 vmcs_write32(GUEST_SYSENTER_CS, data);
 404                 break;
 405         case MSR_IA32_SYSENTER_EIP:
 406                 vmcs_write32(GUEST_SYSENTER_EIP, data);
 407                 break;
 408         case MSR_IA32_SYSENTER_ESP:
 409                 vmcs_write32(GUEST_SYSENTER_ESP, data);
 410                 break;
 411 #ifdef __x86_64
 412         case MSR_EFER:
 413                 set_efer(vcpu, data);
 414                 break;
 415         case MSR_IA32_MC0_STATUS:
 416                 printk(KERN_WARNING "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n"
 417                             , __FUNCTION__, data);
 418                 break;
 419 #endif
 420         case MSR_IA32_TIME_STAMP_COUNTER: {
 421                 guest_write_tsc(data);
 422                 break;
 423         }
 424         case MSR_IA32_UCODE_REV:
 425         case MSR_IA32_UCODE_WRITE:
 426         case 0x200 ... 0x2ff: /* MTRRs */
 427                 break;
 428         case MSR_IA32_APICBASE:
 429                 vcpu->apic_base = data;
 430                 break;
 431         default:
 432                 msr = find_msr_entry(vcpu, msr_index);
 433                 if (!msr) {
 434                         printk(KERN_ERR "kvm: unhandled wrmsr: 0x%x\n", msr_index);
 435                         return 1;
 436                 }
 437                 msr->data = data;
 438                 break;
 439         }
 440
 441         return 0;
 442 }
 443
 444 /*
 445  * Sync the rsp and rip registers into the vcpu structure.  This allows
 446  * registers to be accessed by indexing vcpu->regs.
 447  */
 448 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
 449 {
 450         vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
 451         vcpu->rip = vmcs_readl(GUEST_RIP);
 452 }
 453
 454 /*
 455  * Syncs rsp and rip back into the vmcs.  Should be called after possible
 456  * modification.
 457  */
 458 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
 459 {
 460         vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
 461         vmcs_writel(GUEST_RIP, vcpu->rip);
 462 }
 463
 464 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
 465 {
 466         unsigned long dr7 = 0x400;
 467         u32 exception_bitmap;
 468         int old_singlestep;
 469
 470         exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
 471         old_singlestep = vcpu->guest_debug.singlestep;
 472
 473         vcpu->guest_debug.enabled = dbg->enabled;
 474         if (vcpu->guest_debug.enabled) {
 475                 int i;
 476
 477                 dr7 |= 0x200;  /* exact */
 478                 for (i = 0; i < 4; ++i) {
 479                         if (!dbg->breakpoints[i].enabled)
 480                                 continue;
 481                         vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
 482                         dr7 |= 2 << (i*2);    /* global enable */
 483                         dr7 |= 0 << (i*4+16); /* execution breakpoint */
 484                 }
 485
 486                 exception_bitmap |= (1u << 1);  /* Trap debug exceptions */
 487
 488                 vcpu->guest_debug.singlestep = dbg->singlestep;
 489         } else {
 490                 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
 491                 vcpu->guest_debug.singlestep = 0;
 492         }
 493
 494         if (old_singlestep && !vcpu->guest_debug.singlestep) {
 495                 unsigned long flags;
 496
 497                 flags = vmcs_readl(GUEST_RFLAGS);
 498                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 499                 vmcs_writel(GUEST_RFLAGS, flags);
 500         }
 501
 502         vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
 503         vmcs_writel(GUEST_DR7, dr7);
 504
 505         return 0;
 506 }
 507
 508 static __init int cpu_has_kvm_support(void)
 509 {
 510         unsigned long ecx = cpuid_ecx(1);
 511         return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
 512 }
 513
 514 static __init int vmx_disabled_by_bios(void)
 515 {
 516         u64 msr;
 517
 518         rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
 519         return (msr & 5) == 1; /* locked but not enabled */
 520 }
 521
 522 static __init void hardware_enable(void *garbage)
 523 {
 524         int cpu = raw_smp_processor_id();
 525         u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
 526         u64 old;
 527
 528         rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
 529         if ((old & 5) == 0)
 530                 /* enable and lock */
 531                 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
 532         write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
 533         asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
 534                       : "memory", "cc");
 535 }
 536
 537 static void hardware_disable(void *garbage)
 538 {
 539         asm volatile (ASM_VMX_VMXOFF : : : "cc");
 540 }
 541
 542 static __init void setup_vmcs_descriptor(void)
 543 {
 544         u32 vmx_msr_low, vmx_msr_high;
 545
 546         rdmsr(MSR_IA32_VMX_BASIC_MSR, vmx_msr_low, vmx_msr_high);
 547         vmcs_descriptor.size = vmx_msr_high & 0x1fff;
 548         vmcs_descriptor.order = get_order(vmcs_descriptor.size);
 549         vmcs_descriptor.revision_id = vmx_msr_low;
 550 };
 551
 552 static struct vmcs *alloc_vmcs_cpu(int cpu)
 553 {
 554         int node = cpu_to_node(cpu);
 555         struct page *pages;
 556         struct vmcs *vmcs;
 557
 558         pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
 559         if (!pages)
 560                 return NULL;
 561         vmcs = page_address(pages);
 562         memset(vmcs, 0, vmcs_descriptor.size);
 563         vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
 564         return vmcs;
 565 }
 566
 567 static struct vmcs *alloc_vmcs(void)
 568 {
 569         return alloc_vmcs_cpu(smp_processor_id());
 570 }
 571
 572 static void free_vmcs(struct vmcs *vmcs)
 573 {
 574         free_pages((unsigned long)vmcs, vmcs_descriptor.order);
 575 }
 576
 577 static __exit void free_kvm_area(void)
 578 {
 579         int cpu;
 580
 581         for_each_online_cpu(cpu)
 582                 free_vmcs(per_cpu(vmxarea, cpu));
 583 }
 584
 585 extern struct vmcs *alloc_vmcs_cpu(int cpu);
 586
 587 static __init int alloc_kvm_area(void)
 588 {
 589         int cpu;
 590
 591         for_each_online_cpu(cpu) {
 592                 struct vmcs *vmcs;
 593
 594                 vmcs = alloc_vmcs_cpu(cpu);
 595                 if (!vmcs) {
 596                         free_kvm_area();
 597                         return -ENOMEM;
 598                 }
 599
 600                 per_cpu(vmxarea, cpu) = vmcs;
 601         }
 602         return 0;
 603 }
 604
 605 static __init int hardware_setup(void)
 606 {
 607         setup_vmcs_descriptor();
 608         return alloc_kvm_area();
 609 }
 610
 611 static __exit void hardware_unsetup(void)
 612 {
 613         free_kvm_area();
 614 }
 615
 616 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 617 {
 618         if (vcpu->rmode.active)
 619                 vmcs_write32(EXCEPTION_BITMAP, ~0);
 620         else
 621                 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
 622 }
 623
 624 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
 625 {
 626         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 627
 628         if (vmcs_readl(sf->base) == save->base) {
 629                 vmcs_write16(sf->selector, save->selector);
 630                 vmcs_writel(sf->base, save->base);
 631                 vmcs_write32(sf->limit, save->limit);
 632                 vmcs_write32(sf->ar_bytes, save->ar);
 633         } else {
 634                 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
 635                         << AR_DPL_SHIFT;
 636                 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
 637         }
 638 }
 639
 640 static void enter_pmode(struct kvm_vcpu *vcpu)
 641 {
 642         unsigned long flags;
 643
 644         vcpu->rmode.active = 0;
 645
 646         vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
 647         vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
 648         vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
 649
 650         flags = vmcs_readl(GUEST_RFLAGS);
 651         flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
 652         flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
 653         vmcs_writel(GUEST_RFLAGS, flags);
 654
 655         vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
 656                         (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
 657
 658         update_exception_bitmap(vcpu);
 659
 660         fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
 661         fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
 662         fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
 663         fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
 664
 665         vmcs_write16(GUEST_SS_SELECTOR, 0);
 666         vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
 667
 668         vmcs_write16(GUEST_CS_SELECTOR,
 669                      vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
 670         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
 671 }
 672
 673 static int rmode_tss_base(struct kvm* kvm)
 674 {
 675         gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
 676         return base_gfn << PAGE_SHIFT;
 677 }
 678
 679 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
 680 {
 681         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 682
 683         save->selector = vmcs_read16(sf->selector);
 684         save->base = vmcs_readl(sf->base);
 685         save->limit = vmcs_read32(sf->limit);
 686         save->ar = vmcs_read32(sf->ar_bytes);
 687         vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
 688         vmcs_write32(sf->limit, 0xffff);
 689         vmcs_write32(sf->ar_bytes, 0xf3);
 690 }
 691
 692 static void enter_rmode(struct kvm_vcpu *vcpu)
 693 {
 694         unsigned long flags;
 695
 696         vcpu->rmode.active = 1;
 697
 698         vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
 699         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
 700
 701         vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
 702         vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
 703
 704         vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
 705         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
 706
 707         flags = vmcs_readl(GUEST_RFLAGS);
 708         vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
 709
 710         flags |= IOPL_MASK | X86_EFLAGS_VM;
 711
 712         vmcs_writel(GUEST_RFLAGS, flags);
 713         vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
 714         update_exception_bitmap(vcpu);
 715
 716         vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
 717         vmcs_write32(GUEST_SS_LIMIT, 0xffff);
 718         vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
 719
 720         vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
 721         vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
 722
 723         fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
 724         fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
 725         fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
 726         fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
 727 }
 728
 729 #ifdef CONFIG_X86_64
 730
 731 static void enter_lmode(struct kvm_vcpu *vcpu)
 732 {
 733         u32 guest_tr_ar;
 734
 735         guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
 736         if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
 737                 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
 738                        __FUNCTION__);
 739                 vmcs_write32(GUEST_TR_AR_BYTES,
 740                              (guest_tr_ar & ~AR_TYPE_MASK)
 741                              | AR_TYPE_BUSY_64_TSS);
 742         }
 743
 744         vcpu->shadow_efer |= EFER_LMA;
 745
 746         find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
 747         vmcs_write32(VM_ENTRY_CONTROLS,
 748                      vmcs_read32(VM_ENTRY_CONTROLS)
 749                      | VM_ENTRY_CONTROLS_IA32E_MASK);
 750 }
 751
 752 static void exit_lmode(struct kvm_vcpu *vcpu)
 753 {
 754         vcpu->shadow_efer &= ~EFER_LMA;
 755
 756         vmcs_write32(VM_ENTRY_CONTROLS,
 757                      vmcs_read32(VM_ENTRY_CONTROLS)
 758                      & ~VM_ENTRY_CONTROLS_IA32E_MASK);
 759 }
 760
 761 #endif
 762
 763 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 764 {
 765         if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
 766                 enter_pmode(vcpu);
 767
 768         if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
 769                 enter_rmode(vcpu);
 770
 771 #ifdef CONFIG_X86_64
 772         if (vcpu->shadow_efer & EFER_LME) {
 773                 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
 774                         enter_lmode(vcpu);
 775                 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
 776                         exit_lmode(vcpu);
 777         }
 778 #endif
 779
 780         vmcs_writel(CR0_READ_SHADOW, cr0);
 781         vmcs_writel(GUEST_CR0,
 782                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 783         vcpu->cr0 = cr0;
 784 }
 785
 786 /*
 787  * Used when restoring the VM to avoid corrupting segment registers
 788  */
 789 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
 790 {
 791         vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
 792         update_exception_bitmap(vcpu);
 793         vmcs_writel(CR0_READ_SHADOW, cr0);
 794         vmcs_writel(GUEST_CR0,
 795                     (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
 796         vcpu->cr0 = cr0;
 797 }
 798
 799 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 800 {
 801         vmcs_writel(GUEST_CR3, cr3);
 802 }
 803
 804 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 805 {
 806         vmcs_writel(CR4_READ_SHADOW, cr4);
 807         vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
 808                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
 809         vcpu->cr4 = cr4;
 810 }
 811
 812 #ifdef CONFIG_X86_64
 813
 814 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
 817
 818         vcpu->shadow_efer = efer;
 819         if (efer & EFER_LMA) {
 820                 vmcs_write32(VM_ENTRY_CONTROLS,
 821                                      vmcs_read32(VM_ENTRY_CONTROLS) |
 822                                      VM_ENTRY_CONTROLS_IA32E_MASK);
 823                 msr->data = efer;
 824
 825         } else {
 826                 vmcs_write32(VM_ENTRY_CONTROLS,
 827                                      vmcs_read32(VM_ENTRY_CONTROLS) &
 828                                      ~VM_ENTRY_CONTROLS_IA32E_MASK);
 829
 830                 msr->data = efer & ~EFER_LME;
 831         }
 832 }
 833
 834 #endif
 835
 836 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 837 {
 838         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 839
 840         return vmcs_readl(sf->base);
 841 }
 842
 843 static void vmx_get_segment(struct kvm_vcpu *vcpu,
 844                             struct kvm_segment *var, int seg)
 845 {
 846         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 847         u32 ar;
 848
 849         var->base = vmcs_readl(sf->base);
 850         var->limit = vmcs_read32(sf->limit);
 851         var->selector = vmcs_read16(sf->selector);
 852         ar = vmcs_read32(sf->ar_bytes);
 853         if (ar & AR_UNUSABLE_MASK)
 854                 ar = 0;
 855         var->type = ar & 15;
 856         var->s = (ar >> 4) & 1;
 857         var->dpl = (ar >> 5) & 3;
 858         var->present = (ar >> 7) & 1;
 859         var->avl = (ar >> 12) & 1;
 860         var->l = (ar >> 13) & 1;
 861         var->db = (ar >> 14) & 1;
 862         var->g = (ar >> 15) & 1;
 863         var->unusable = (ar >> 16) & 1;
 864 }
 865
 866 static void vmx_set_segment(struct kvm_vcpu *vcpu,
 867                             struct kvm_segment *var, int seg)
 868 {
 869         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 870         u32 ar;
 871
 872         vmcs_writel(sf->base, var->base);
 873         vmcs_write32(sf->limit, var->limit);
 874         vmcs_write16(sf->selector, var->selector);
 875         if (var->unusable)
 876                 ar = 1 << 16;
 877         else {
 878                 ar = var->type & 15;
 879                 ar |= (var->s & 1) << 4;
 880                 ar |= (var->dpl & 3) << 5;
 881                 ar |= (var->present & 1) << 7;
 882                 ar |= (var->avl & 1) << 12;
 883                 ar |= (var->l & 1) << 13;
 884                 ar |= (var->db & 1) << 14;
 885                 ar |= (var->g & 1) << 15;
 886         }
 887         if (ar == 0) /* a 0 value means unusable */
 888                 ar = AR_UNUSABLE_MASK;
 889         vmcs_write32(sf->ar_bytes, ar);
 890 }
 891
 892 static int vmx_is_long_mode(struct kvm_vcpu *vcpu)
 893 {
 894         return vmcs_read32(VM_ENTRY_CONTROLS) & VM_ENTRY_CONTROLS_IA32E_MASK;
 895 }
 896
 897 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
 898 {
 899         u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
 900
 901         *db = (ar >> 14) & 1;
 902         *l = (ar >> 13) & 1;
 903 }
 904
 905 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 906 {
 907         dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
 908         dt->base = vmcs_readl(GUEST_IDTR_BASE);
 909 }
 910
 911 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 912 {
 913         vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
 914         vmcs_writel(GUEST_IDTR_BASE, dt->base);
 915 }
 916
 917 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 918 {
 919         dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
 920         dt->base = vmcs_readl(GUEST_GDTR_BASE);
 921 }
 922
 923 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
 924 {
 925         vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
 926         vmcs_writel(GUEST_GDTR_BASE, dt->base);
 927 }
 928
 929 static int init_rmode_tss(struct kvm* kvm)
 930 {
 931         struct page *p1, *p2, *p3;
 932         gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
 933         char *page;
 934
 935         p1 = _gfn_to_page(kvm, fn++);
 936         p2 = _gfn_to_page(kvm, fn++);
 937         p3 = _gfn_to_page(kvm, fn);
 938
 939         if (!p1 || !p2 || !p3) {
 940                 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
 941                 return 0;
 942         }
 943
 944         page = kmap_atomic(p1, KM_USER0);
 945         memset(page, 0, PAGE_SIZE);
 946         *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
 947         kunmap_atomic(page, KM_USER0);
 948
 949         page = kmap_atomic(p2, KM_USER0);
 950         memset(page, 0, PAGE_SIZE);
 951         kunmap_atomic(page, KM_USER0);
 952
 953         page = kmap_atomic(p3, KM_USER0);
 954         memset(page, 0, PAGE_SIZE);
 955         *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
 956         kunmap_atomic(page, KM_USER0);
 957
 958         return 1;
 959 }
 960
 961 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
 962 {
 963         u32 msr_high, msr_low;
 964
 965         rdmsr(msr, msr_low, msr_high);
 966
 967         val &= msr_high;
 968         val |= msr_low;
 969         vmcs_write32(vmcs_field, val);
 970 }
 971
 972 static void seg_setup(int seg)
 973 {
 974         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
 975
 976         vmcs_write16(sf->selector, 0);
 977         vmcs_writel(sf->base, 0);
 978         vmcs_write32(sf->limit, 0xffff);
 979         vmcs_write32(sf->ar_bytes, 0x93);
 980 }
 981
 982 /*
 983  * Sets up the vmcs for emulated real mode.
 984  */
 985 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
 986 {
 987         u32 host_sysenter_cs;
 988         u32 junk;
 989         unsigned long a;
 990         struct descriptor_table dt;
 991         int i;
 992         int ret = 0;
 993         int nr_good_msrs;
 994         extern asmlinkage void kvm_vmx_return(void);
 995
 996         if (!init_rmode_tss(vcpu->kvm)) {
 997                 ret = -ENOMEM;
 998                 goto out;
 999         }
1000
1001         memset(vcpu->regs, 0, sizeof(vcpu->regs));
1002         vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1003         vcpu->cr8 = 0;
1004         vcpu->apic_base = 0xfee00000 |
1005                         /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1006                         MSR_IA32_APICBASE_ENABLE;
1007
1008         fx_init(vcpu);
1009
1010         /*
1011          * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1012          * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4.  Sigh.
1013          */
1014         vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1015         vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1016         vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1017         vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1018
1019         seg_setup(VCPU_SREG_DS);
1020         seg_setup(VCPU_SREG_ES);
1021         seg_setup(VCPU_SREG_FS);
1022         seg_setup(VCPU_SREG_GS);
1023         seg_setup(VCPU_SREG_SS);
1024
1025         vmcs_write16(GUEST_TR_SELECTOR, 0);
1026         vmcs_writel(GUEST_TR_BASE, 0);
1027         vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1028         vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1029
1030         vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1031         vmcs_writel(GUEST_LDTR_BASE, 0);
1032         vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1033         vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1034
1035         vmcs_write32(GUEST_SYSENTER_CS, 0);
1036         vmcs_writel(GUEST_SYSENTER_ESP, 0);
1037         vmcs_writel(GUEST_SYSENTER_EIP, 0);
1038
1039         vmcs_writel(GUEST_RFLAGS, 0x02);
1040         vmcs_writel(GUEST_RIP, 0xfff0);
1041         vmcs_writel(GUEST_RSP, 0);
1042
1043         vmcs_writel(GUEST_CR3, 0);
1044
1045         //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1046         vmcs_writel(GUEST_DR7, 0x400);
1047
1048         vmcs_writel(GUEST_GDTR_BASE, 0);
1049         vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1050
1051         vmcs_writel(GUEST_IDTR_BASE, 0);
1052         vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1053
1054         vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1055         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1056         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1057
1058         /* I/O */
1059         vmcs_write64(IO_BITMAP_A, 0);
1060         vmcs_write64(IO_BITMAP_B, 0);
1061
1062         guest_write_tsc(0);
1063
1064         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1065
1066         /* Special registers */
1067         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1068
1069         /* Control */
1070         vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS_MSR,
1071                                PIN_BASED_VM_EXEC_CONTROL,
1072                                PIN_BASED_EXT_INTR_MASK   /* 20.6.1 */
1073                                | PIN_BASED_NMI_EXITING   /* 20.6.1 */
1074                         );
1075         vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS_MSR,
1076                                CPU_BASED_VM_EXEC_CONTROL,
1077                                CPU_BASED_HLT_EXITING         /* 20.6.2 */
1078                                | CPU_BASED_CR8_LOAD_EXITING    /* 20.6.2 */
1079                                | CPU_BASED_CR8_STORE_EXITING   /* 20.6.2 */
1080                                | CPU_BASED_UNCOND_IO_EXITING   /* 20.6.2 */
1081                                | CPU_BASED_INVDPG_EXITING
1082                                | CPU_BASED_MOV_DR_EXITING
1083                                | CPU_BASED_USE_TSC_OFFSETING   /* 21.3 */
1084                         );
1085
1086         vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1087         vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1088         vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1089         vmcs_write32(CR3_TARGET_COUNT, 0);           /* 22.2.1 */
1090
1091         vmcs_writel(HOST_CR0, read_cr0());  /* 22.2.3 */
1092         vmcs_writel(HOST_CR4, read_cr4());  /* 22.2.3, 22.2.5 */
1093         vmcs_writel(HOST_CR3, read_cr3());  /* 22.2.3  FIXME: shadow tables */
1094
1095         vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS);  /* 22.2.4 */
1096         vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1097         vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1098         vmcs_write16(HOST_FS_SELECTOR, read_fs());    /* 22.2.4 */
1099         vmcs_write16(HOST_GS_SELECTOR, read_gs());    /* 22.2.4 */
1100         vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS);  /* 22.2.4 */
1101 #ifdef CONFIG_X86_64
1102         rdmsrl(MSR_FS_BASE, a);
1103         vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1104         rdmsrl(MSR_GS_BASE, a);
1105         vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1106 #else
1107         vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1108         vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1109 #endif
1110
1111         vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8);  /* 22.2.4 */
1112
1113         get_idt(&dt);
1114         vmcs_writel(HOST_IDTR_BASE, dt.base);   /* 22.2.4 */
1115
1116
1117         vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1118
1119         rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1120         vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1121         rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1122         vmcs_writel(HOST_IA32_SYSENTER_ESP, a);   /* 22.2.3 */
1123         rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1124         vmcs_writel(HOST_IA32_SYSENTER_EIP, a);   /* 22.2.3 */
1125
1126         ret = -ENOMEM;
1127         vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1128         if (!vcpu->guest_msrs)
1129                 goto out;
1130         vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
1131         if (!vcpu->host_msrs)
1132                 goto out_free_guest_msrs;
1133
1134         for (i = 0; i < NR_VMX_MSR; ++i) {
1135                 u32 index = vmx_msr_index[i];
1136                 u32 data_low, data_high;
1137                 u64 data;
1138                 int j = vcpu->nmsrs;
1139
1140                 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1141                         continue;
1142                 data = data_low | ((u64)data_high << 32);
1143                 vcpu->host_msrs[j].index = index;
1144                 vcpu->host_msrs[j].reserved = 0;
1145                 vcpu->host_msrs[j].data = data;
1146                 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1147                 ++vcpu->nmsrs;
1148         }
1149         printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1150
1151         nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1152         vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1153                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1154         vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1155                     virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1156         vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1157                     virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1158         vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS_MSR, VM_EXIT_CONTROLS,
1159                                (HOST_IS_64 << 9));  /* 22.2,1, 20.7.1 */
1160         vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1161         vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs);  /* 22.2.2 */
1162         vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1163
1164
1165         /* 22.2.1, 20.8.1 */
1166         vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS_MSR,
1167                                VM_ENTRY_CONTROLS, 0);
1168         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);  /* 22.2.1 */
1169
1170         vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1171         vmcs_writel(TPR_THRESHOLD, 0);
1172
1173         vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1174         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1175
1176         vcpu->cr0 = 0x60000010;
1177         vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1178         vmx_set_cr4(vcpu, 0);
1179 #ifdef CONFIG_X86_64
1180         vmx_set_efer(vcpu, 0);
1181 #endif
1182
1183         return 0;
1184
1185 out_free_guest_msrs:
1186         kfree(vcpu->guest_msrs);
1187 out:
1188         return ret;
1189 }
1190
1191 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1192 {
1193         u16 ent[2];
1194         u16 cs;
1195         u16 ip;
1196         unsigned long flags;
1197         unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1198         u16 sp =  vmcs_readl(GUEST_RSP);
1199         u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1200
1201         if (sp > ss_limit || sp - 6 > sp) {
1202                 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1203                             __FUNCTION__,
1204                             vmcs_readl(GUEST_RSP),
1205                             vmcs_readl(GUEST_SS_BASE),
1206                             vmcs_read32(GUEST_SS_LIMIT));
1207                 return;
1208         }
1209
1210         if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1211                                                                 sizeof(ent)) {
1212                 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1213                 return;
1214         }
1215
1216         flags =  vmcs_readl(GUEST_RFLAGS);
1217         cs =  vmcs_readl(GUEST_CS_BASE) >> 4;
1218         ip =  vmcs_readl(GUEST_RIP);
1219
1220
1221         if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1222             kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1223             kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1224                 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1225                 return;
1226         }
1227
1228         vmcs_writel(GUEST_RFLAGS, flags &
1229                     ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1230         vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1231         vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1232         vmcs_writel(GUEST_RIP, ent[0]);
1233         vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1234 }
1235
1236 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1237 {
1238         int word_index = __ffs(vcpu->irq_summary);
1239         int bit_index = __ffs(vcpu->irq_pending[word_index]);
1240         int irq = word_index * BITS_PER_LONG + bit_index;
1241
1242         clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1243         if (!vcpu->irq_pending[word_index])
1244                 clear_bit(word_index, &vcpu->irq_summary);
1245
1246         if (vcpu->rmode.active) {
1247                 inject_rmode_irq(vcpu, irq);
1248                 return;
1249         }
1250         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1251                         irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1252 }
1253
1254 static void kvm_try_inject_irq(struct kvm_vcpu *vcpu)
1255 {
1256         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF)
1257             && (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0)
1258                 /*
1259                  * Interrupts enabled, and not blocked by sti or mov ss. Good.
1260                  */
1261                 kvm_do_inject_irq(vcpu);
1262         else
1263                 /*
1264                  * Interrupts blocked.  Wait for unblock.
1265                  */
1266                 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1267                              vmcs_read32(CPU_BASED_VM_EXEC_CONTROL)
1268                              | CPU_BASED_VIRTUAL_INTR_PENDING);
1269 }
1270
1271 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1272 {
1273         struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1274
1275         set_debugreg(dbg->bp[0], 0);
1276         set_debugreg(dbg->bp[1], 1);
1277         set_debugreg(dbg->bp[2], 2);
1278         set_debugreg(dbg->bp[3], 3);
1279
1280         if (dbg->singlestep) {
1281                 unsigned long flags;
1282
1283                 flags = vmcs_readl(GUEST_RFLAGS);
1284                 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1285                 vmcs_writel(GUEST_RFLAGS, flags);
1286         }
1287 }
1288
1289 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1290                                   int vec, u32 err_code)
1291 {
1292         if (!vcpu->rmode.active)
1293                 return 0;
1294
1295         if (vec == GP_VECTOR && err_code == 0)
1296                 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1297                         return 1;
1298         return 0;
1299 }
1300
1301 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1302 {
1303         u32 intr_info, error_code;
1304         unsigned long cr2, rip;
1305         u32 vect_info;
1306         enum emulation_result er;
1307
1308         vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1309         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1310
1311         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1312                                                 !is_page_fault(intr_info)) {
1313                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1314                        "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1315         }
1316
1317         if (is_external_interrupt(vect_info)) {
1318                 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1319                 set_bit(irq, vcpu->irq_pending);
1320                 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1321         }
1322
1323         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1324                 asm ("int $2");
1325                 return 1;
1326         }
1327         error_code = 0;
1328         rip = vmcs_readl(GUEST_RIP);
1329         if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1330                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1331         if (is_page_fault(intr_info)) {
1332                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1333
1334                 spin_lock(&vcpu->kvm->lock);
1335                 if (!vcpu->mmu.page_fault(vcpu, cr2, error_code)) {
1336                         spin_unlock(&vcpu->kvm->lock);
1337                         return 1;
1338                 }
1339
1340                 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1341                 spin_unlock(&vcpu->kvm->lock);
1342
1343                 switch (er) {
1344                 case EMULATE_DONE:
1345                         return 1;
1346                 case EMULATE_DO_MMIO:
1347                         ++kvm_stat.mmio_exits;
1348                         kvm_run->exit_reason = KVM_EXIT_MMIO;
1349                         return 0;
1350                  case EMULATE_FAIL:
1351                         vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1352                         break;
1353                 default:
1354                         BUG();
1355                 }
1356         }
1357
1358         if (vcpu->rmode.active &&
1359             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1360                                                                 error_code))
1361                 return 1;
1362
1363         if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1364                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1365                 return 0;
1366         }
1367         kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1368         kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1369         kvm_run->ex.error_code = error_code;
1370         return 0;
1371 }
1372
1373 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1374                                      struct kvm_run *kvm_run)
1375 {
1376         ++kvm_stat.irq_exits;
1377         return 1;
1378 }
1379
1380
1381 static int get_io_count(struct kvm_vcpu *vcpu, u64 *count)
1382 {
1383         u64 inst;
1384         gva_t rip;
1385         int countr_size;
1386         int i, n;
1387
1388         if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1389                 countr_size = 2;
1390         } else {
1391                 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1392
1393                 countr_size = (cs_ar & AR_L_MASK) ? 8:
1394                               (cs_ar & AR_DB_MASK) ? 4: 2;
1395         }
1396
1397         rip =  vmcs_readl(GUEST_RIP);
1398         if (countr_size != 8)
1399                 rip += vmcs_readl(GUEST_CS_BASE);
1400
1401         n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1402
1403         for (i = 0; i < n; i++) {
1404                 switch (((u8*)&inst)[i]) {
1405                 case 0xf0:
1406                 case 0xf2:
1407                 case 0xf3:
1408                 case 0x2e:
1409                 case 0x36:
1410                 case 0x3e:
1411                 case 0x26:
1412                 case 0x64:
1413                 case 0x65:
1414                 case 0x66:
1415                         break;
1416                 case 0x67:
1417                         countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1418                 default:
1419                         goto done;
1420                 }
1421         }
1422         return 0;
1423 done:
1424         countr_size *= 8;
1425         *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1426         return 1;
1427 }
1428
1429 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1430 {
1431         u64 exit_qualification;
1432
1433         ++kvm_stat.io_exits;
1434         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1435         kvm_run->exit_reason = KVM_EXIT_IO;
1436         if (exit_qualification & 8)
1437                 kvm_run->io.direction = KVM_EXIT_IO_IN;
1438         else
1439                 kvm_run->io.direction = KVM_EXIT_IO_OUT;
1440         kvm_run->io.size = (exit_qualification & 7) + 1;
1441         kvm_run->io.string = (exit_qualification & 16) != 0;
1442         kvm_run->io.string_down
1443                 = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1444         kvm_run->io.rep = (exit_qualification & 32) != 0;
1445         kvm_run->io.port = exit_qualification >> 16;
1446         if (kvm_run->io.string) {
1447                 if (!get_io_count(vcpu, &kvm_run->io.count))
1448                         return 1;
1449                 kvm_run->io.address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1450         } else
1451                 kvm_run->io.value = vcpu->regs[VCPU_REGS_RAX]; /* rax */
1452         return 0;
1453 }
1454
1455 static int handle_invlpg(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1456 {
1457         u64 address = vmcs_read64(EXIT_QUALIFICATION);
1458         int instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1459         spin_lock(&vcpu->kvm->lock);
1460         vcpu->mmu.inval_page(vcpu, address);
1461         spin_unlock(&vcpu->kvm->lock);
1462         vmcs_writel(GUEST_RIP, vmcs_readl(GUEST_RIP) + instruction_length);
1463         return 1;
1464 }
1465
1466 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1467 {
1468         u64 exit_qualification;
1469         int cr;
1470         int reg;
1471
1472         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1473         cr = exit_qualification & 15;
1474         reg = (exit_qualification >> 8) & 15;
1475         switch ((exit_qualification >> 4) & 3) {
1476         case 0: /* mov to cr */
1477                 switch (cr) {
1478                 case 0:
1479                         vcpu_load_rsp_rip(vcpu);
1480                         set_cr0(vcpu, vcpu->regs[reg]);
1481                         skip_emulated_instruction(vcpu);
1482                         return 1;
1483                 case 3:
1484                         vcpu_load_rsp_rip(vcpu);
1485                         set_cr3(vcpu, vcpu->regs[reg]);
1486                         skip_emulated_instruction(vcpu);
1487                         return 1;
1488                 case 4:
1489                         vcpu_load_rsp_rip(vcpu);
1490                         set_cr4(vcpu, vcpu->regs[reg]);
1491                         skip_emulated_instruction(vcpu);
1492                         return 1;
1493                 case 8:
1494                         vcpu_load_rsp_rip(vcpu);
1495                         set_cr8(vcpu, vcpu->regs[reg]);
1496                         skip_emulated_instruction(vcpu);
1497                         return 1;
1498                 };
1499                 break;
1500         case 1: /*mov from cr*/
1501                 switch (cr) {
1502                 case 3:
1503                         vcpu_load_rsp_rip(vcpu);
1504                         vcpu->regs[reg] = vcpu->cr3;
1505                         vcpu_put_rsp_rip(vcpu);
1506                         skip_emulated_instruction(vcpu);
1507                         return 1;
1508                 case 8:
1509                         printk(KERN_DEBUG "handle_cr: read CR8 "
1510                                "cpu erratum AA15\n");
1511                         vcpu_load_rsp_rip(vcpu);
1512                         vcpu->regs[reg] = vcpu->cr8;
1513                         vcpu_put_rsp_rip(vcpu);
1514                         skip_emulated_instruction(vcpu);
1515                         return 1;
1516                 }
1517                 break;
1518         case 3: /* lmsw */
1519                 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1520
1521                 skip_emulated_instruction(vcpu);
1522                 return 1;
1523         default:
1524                 break;
1525         }
1526         kvm_run->exit_reason = 0;
1527         printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1528                (int)(exit_qualification >> 4) & 3, cr);
1529         return 0;
1530 }
1531
1532 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1533 {
1534         u64 exit_qualification;
1535         unsigned long val;
1536         int dr, reg;
1537
1538         /*
1539          * FIXME: this code assumes the host is debugging the guest.
1540          *        need to deal with guest debugging itself too.
1541          */
1542         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1543         dr = exit_qualification & 7;
1544         reg = (exit_qualification >> 8) & 15;
1545         vcpu_load_rsp_rip(vcpu);
1546         if (exit_qualification & 16) {
1547                 /* mov from dr */
1548                 switch (dr) {
1549                 case 6:
1550                         val = 0xffff0ff0;
1551                         break;
1552                 case 7:
1553                         val = 0x400;
1554                         break;
1555                 default:
1556                         val = 0;
1557                 }
1558                 vcpu->regs[reg] = val;
1559         } else {
1560                 /* mov to dr */
1561         }
1562         vcpu_put_rsp_rip(vcpu);
1563         skip_emulated_instruction(vcpu);
1564         return 1;
1565 }
1566
1567 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1568 {
1569         kvm_run->exit_reason = KVM_EXIT_CPUID;
1570         return 0;
1571 }
1572
1573 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1574 {
1575         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1576         u64 data;
1577
1578         if (vmx_get_msr(vcpu, ecx, &data)) {
1579                 vmx_inject_gp(vcpu, 0);
1580                 return 1;
1581         }
1582
1583         /* FIXME: handling of bits 32:63 of rax, rdx */
1584         vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1585         vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1586         skip_emulated_instruction(vcpu);
1587         return 1;
1588 }
1589
1590 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1591 {
1592         u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1593         u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1594                 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1595
1596         if (vmx_set_msr(vcpu, ecx, data) != 0) {
1597                 vmx_inject_gp(vcpu, 0);
1598                 return 1;
1599         }
1600
1601         skip_emulated_instruction(vcpu);
1602         return 1;
1603 }
1604
1605 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1606                                    struct kvm_run *kvm_run)
1607 {
1608         /* Turn off interrupt window reporting. */
1609         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
1610                      vmcs_read32(CPU_BASED_VM_EXEC_CONTROL)
1611                      & ~CPU_BASED_VIRTUAL_INTR_PENDING);
1612         return 1;
1613 }
1614
1615 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1616 {
1617         skip_emulated_instruction(vcpu);
1618         if (vcpu->irq_summary && (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF))
1619                 return 1;
1620
1621         kvm_run->exit_reason = KVM_EXIT_HLT;
1622         return 0;
1623 }
1624
1625 /*
1626  * The exit handlers return 1 if the exit was handled fully and guest execution
1627  * may resume.  Otherwise they set the kvm_run parameter to indicate what needs
1628  * to be done to userspace and return 0.
1629  */
1630 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1631                                       struct kvm_run *kvm_run) = {
1632         [EXIT_REASON_EXCEPTION_NMI]           = handle_exception,
1633         [EXIT_REASON_EXTERNAL_INTERRUPT]      = handle_external_interrupt,
1634         [EXIT_REASON_IO_INSTRUCTION]          = handle_io,
1635         [EXIT_REASON_INVLPG]                  = handle_invlpg,
1636         [EXIT_REASON_CR_ACCESS]               = handle_cr,
1637         [EXIT_REASON_DR_ACCESS]               = handle_dr,
1638         [EXIT_REASON_CPUID]                   = handle_cpuid,
1639         [EXIT_REASON_MSR_READ]                = handle_rdmsr,
1640         [EXIT_REASON_MSR_WRITE]               = handle_wrmsr,
1641         [EXIT_REASON_PENDING_INTERRUPT]       = handle_interrupt_window,
1642         [EXIT_REASON_HLT]                     = handle_halt,
1643 };
1644
1645 static const int kvm_vmx_max_exit_handlers =
1646         sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1647
1648 /*
1649  * The guest has exited.  See if we can fix it or if we need userspace
1650  * assistance.
1651  */
1652 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1653 {
1654         u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1655         u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1656
1657         if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1658                                 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1659                 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1660                        "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1661         kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1662         if (exit_reason < kvm_vmx_max_exit_handlers
1663             && kvm_vmx_exit_handlers[exit_reason])
1664                 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1665         else {
1666                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1667                 kvm_run->hw.hardware_exit_reason = exit_reason;
1668         }
1669         return 0;
1670 }
1671
1672 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1673 {
1674         u8 fail;
1675         u16 fs_sel, gs_sel, ldt_sel;
1676         int fs_gs_ldt_reload_needed;
1677
1678 again:
1679         /*
1680          * Set host fs and gs selectors.  Unfortunately, 22.2.3 does not
1681          * allow segment selectors with cpl > 0 or ti == 1.
1682          */
1683         fs_sel = read_fs();
1684         gs_sel = read_gs();
1685         ldt_sel = read_ldt();
1686         fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1687         if (!fs_gs_ldt_reload_needed) {
1688                 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1689                 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1690         } else {
1691                 vmcs_write16(HOST_FS_SELECTOR, 0);
1692                 vmcs_write16(HOST_GS_SELECTOR, 0);
1693         }
1694
1695 #ifdef CONFIG_X86_64
1696         vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1697         vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1698 #else
1699         vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1700         vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1701 #endif
1702
1703         if (vcpu->irq_summary &&
1704             !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1705                 kvm_try_inject_irq(vcpu);
1706
1707         if (vcpu->guest_debug.enabled)
1708                 kvm_guest_debug_pre(vcpu);
1709
1710         fx_save(vcpu->host_fx_image);
1711         fx_restore(vcpu->guest_fx_image);
1712
1713         save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1714         load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1715
1716         asm (
1717                 /* Store host registers */
1718                 "pushf \n\t"
1719 #ifdef CONFIG_X86_64
1720                 "push %%rax; push %%rbx; push %%rdx;"
1721                 "push %%rsi; push %%rdi; push %%rbp;"
1722                 "push %%r8;  push %%r9;  push %%r10; push %%r11;"
1723                 "push %%r12; push %%r13; push %%r14; push %%r15;"
1724                 "push %%rcx \n\t"
1725                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1726 #else
1727                 "pusha; push %%ecx \n\t"
1728                 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1729 #endif
1730                 /* Check if vmlaunch of vmresume is needed */
1731                 "cmp $0, %1 \n\t"
1732                 /* Load guest registers.  Don't clobber flags. */
1733 #ifdef CONFIG_X86_64
1734                 "mov %c[cr2](%3), %%rax \n\t"
1735                 "mov %%rax, %%cr2 \n\t"
1736                 "mov %c[rax](%3), %%rax \n\t"
1737                 "mov %c[rbx](%3), %%rbx \n\t"
1738                 "mov %c[rdx](%3), %%rdx \n\t"
1739                 "mov %c[rsi](%3), %%rsi \n\t"
1740                 "mov %c[rdi](%3), %%rdi \n\t"
1741                 "mov %c[rbp](%3), %%rbp \n\t"
1742                 "mov %c[r8](%3),  %%r8  \n\t"
1743                 "mov %c[r9](%3),  %%r9  \n\t"
1744                 "mov %c[r10](%3), %%r10 \n\t"
1745                 "mov %c[r11](%3), %%r11 \n\t"
1746                 "mov %c[r12](%3), %%r12 \n\t"
1747                 "mov %c[r13](%3), %%r13 \n\t"
1748                 "mov %c[r14](%3), %%r14 \n\t"
1749                 "mov %c[r15](%3), %%r15 \n\t"
1750                 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1751 #else
1752                 "mov %c[cr2](%3), %%eax \n\t"
1753                 "mov %%eax,   %%cr2 \n\t"
1754                 "mov %c[rax](%3), %%eax \n\t"
1755                 "mov %c[rbx](%3), %%ebx \n\t"
1756                 "mov %c[rdx](%3), %%edx \n\t"
1757                 "mov %c[rsi](%3), %%esi \n\t"
1758                 "mov %c[rdi](%3), %%edi \n\t"
1759                 "mov %c[rbp](%3), %%ebp \n\t"
1760                 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1761 #endif
1762                 /* Enter guest mode */
1763                 "jne launched \n\t"
1764                 ASM_VMX_VMLAUNCH "\n\t"
1765                 "jmp kvm_vmx_return \n\t"
1766                 "launched: " ASM_VMX_VMRESUME "\n\t"
1767                 ".globl kvm_vmx_return \n\t"
1768                 "kvm_vmx_return: "
1769                 /* Save guest registers, load host registers, keep flags */
1770 #ifdef CONFIG_X86_64
1771                 "xchg %3,     0(%%rsp) \n\t"
1772                 "mov %%rax, %c[rax](%3) \n\t"
1773                 "mov %%rbx, %c[rbx](%3) \n\t"
1774                 "pushq 0(%%rsp); popq %c[rcx](%3) \n\t"
1775                 "mov %%rdx, %c[rdx](%3) \n\t"
1776                 "mov %%rsi, %c[rsi](%3) \n\t"
1777                 "mov %%rdi, %c[rdi](%3) \n\t"
1778                 "mov %%rbp, %c[rbp](%3) \n\t"
1779                 "mov %%r8,  %c[r8](%3) \n\t"
1780                 "mov %%r9,  %c[r9](%3) \n\t"
1781                 "mov %%r10, %c[r10](%3) \n\t"
1782                 "mov %%r11, %c[r11](%3) \n\t"
1783                 "mov %%r12, %c[r12](%3) \n\t"
1784                 "mov %%r13, %c[r13](%3) \n\t"
1785                 "mov %%r14, %c[r14](%3) \n\t"
1786                 "mov %%r15, %c[r15](%3) \n\t"
1787                 "mov %%cr2, %%rax   \n\t"
1788                 "mov %%rax, %c[cr2](%3) \n\t"
1789                 "mov 0(%%rsp), %3 \n\t"
1790
1791                 "pop  %%rcx; pop  %%r15; pop  %%r14; pop  %%r13; pop  %%r12;"
1792                 "pop  %%r11; pop  %%r10; pop  %%r9;  pop  %%r8;"
1793                 "pop  %%rbp; pop  %%rdi; pop  %%rsi;"
1794                 "pop  %%rdx; pop  %%rbx; pop  %%rax \n\t"
1795 #else
1796                 "xchg %3, 0(%%esp) \n\t"
1797                 "mov %%eax, %c[rax](%3) \n\t"
1798                 "mov %%ebx, %c[rbx](%3) \n\t"
1799                 "pushl 0(%%esp); popl %c[rcx](%3) \n\t"
1800                 "mov %%edx, %c[rdx](%3) \n\t"
1801                 "mov %%esi, %c[rsi](%3) \n\t"
1802                 "mov %%edi, %c[rdi](%3) \n\t"
1803                 "mov %%ebp, %c[rbp](%3) \n\t"
1804                 "mov %%cr2, %%eax  \n\t"
1805                 "mov %%eax, %c[cr2](%3) \n\t"
1806                 "mov 0(%%esp), %3 \n\t"
1807
1808                 "pop %%ecx; popa \n\t"
1809 #endif
1810                 "setbe %0 \n\t"
1811                 "popf \n\t"
1812               : "=g" (fail)
1813               : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1814                 "c"(vcpu),
1815                 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1816                 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1817                 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1818                 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1819                 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1820                 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1821                 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1822 #ifdef CONFIG_X86_64
1823                 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1824                 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1825                 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1826                 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1827                 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1828                 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1829                 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1830                 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1831 #endif
1832                 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1833               : "cc", "memory" );
1834
1835         ++kvm_stat.exits;
1836
1837         save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1838         load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1839
1840         fx_save(vcpu->guest_fx_image);
1841         fx_restore(vcpu->host_fx_image);
1842
1843 #ifndef CONFIG_X86_64
1844         asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1845 #endif
1846
1847         kvm_run->exit_type = 0;
1848         if (fail) {
1849                 kvm_run->exit_type = KVM_EXIT_TYPE_FAIL_ENTRY;
1850                 kvm_run->exit_reason = vmcs_read32(VM_INSTRUCTION_ERROR);
1851         } else {
1852                 if (fs_gs_ldt_reload_needed) {
1853                         load_ldt(ldt_sel);
1854                         load_fs(fs_sel);
1855                         /*
1856                          * If we have to reload gs, we must take care to
1857                          * preserve our gs base.
1858                          */
1859                         local_irq_disable();
1860                         load_gs(gs_sel);
1861 #ifdef CONFIG_X86_64
1862                         wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1863 #endif
1864                         local_irq_enable();
1865
1866                         reload_tss();
1867                 }
1868                 vcpu->launched = 1;
1869                 kvm_run->exit_type = KVM_EXIT_TYPE_VM_EXIT;
1870                 if (kvm_handle_exit(kvm_run, vcpu)) {
1871                         /* Give scheduler a change to reschedule. */
1872                         if (signal_pending(current)) {
1873                                 ++kvm_stat.signal_exits;
1874                                 return -EINTR;
1875                         }
1876                         kvm_resched(vcpu);
1877                         goto again;
1878                 }
1879         }
1880         return 0;
1881 }
1882
1883 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1884 {
1885         vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1886 }
1887
1888 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1889                                   unsigned long addr,
1890                                   u32 err_code)
1891 {
1892         u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1893
1894         ++kvm_stat.pf_guest;
1895
1896         if (is_page_fault(vect_info)) {
1897                 printk(KERN_DEBUG "inject_page_fault: "
1898                        "double fault 0x%lx @ 0x%lx\n",
1899                        addr, vmcs_readl(GUEST_RIP));
1900                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1901                 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1902                              DF_VECTOR |
1903                              INTR_TYPE_EXCEPTION |
1904                              INTR_INFO_DELIEVER_CODE_MASK |
1905                              INTR_INFO_VALID_MASK);
1906                 return;
1907         }
1908         vcpu->cr2 = addr;
1909         vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1910         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1911                      PF_VECTOR |
1912                      INTR_TYPE_EXCEPTION |
1913                      INTR_INFO_DELIEVER_CODE_MASK |
1914                      INTR_INFO_VALID_MASK);
1915
1916 }
1917
1918 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1919 {
1920         if (vcpu->vmcs) {
1921                 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1922                 free_vmcs(vcpu->vmcs);
1923                 vcpu->vmcs = NULL;
1924         }
1925 }
1926
1927 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
1928 {
1929         vmx_free_vmcs(vcpu);
1930 }
1931
1932 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
1933 {
1934         struct vmcs *vmcs;
1935
1936         vmcs = alloc_vmcs();
1937         if (!vmcs)
1938                 return -ENOMEM;
1939         vmcs_clear(vmcs);
1940         vcpu->vmcs = vmcs;
1941         vcpu->launched = 0;
1942         return 0;
1943 }
1944
1945 static struct kvm_arch_ops vmx_arch_ops = {
1946         .cpu_has_kvm_support = cpu_has_kvm_support,
1947         .disabled_by_bios = vmx_disabled_by_bios,
1948         .hardware_setup = hardware_setup,
1949         .hardware_unsetup = hardware_unsetup,
1950         .hardware_enable = hardware_enable,
1951         .hardware_disable = hardware_disable,
1952
1953         .vcpu_create = vmx_create_vcpu,
1954         .vcpu_free = vmx_free_vcpu,
1955
1956         .vcpu_load = vmx_vcpu_load,
1957         .vcpu_put = vmx_vcpu_put,
1958
1959         .set_guest_debug = set_guest_debug,
1960         .get_msr = vmx_get_msr,
1961         .set_msr = vmx_set_msr,
1962         .get_segment_base = vmx_get_segment_base,
1963         .get_segment = vmx_get_segment,
1964         .set_segment = vmx_set_segment,
1965         .is_long_mode = vmx_is_long_mode,
1966         .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
1967         .set_cr0 = vmx_set_cr0,
1968         .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
1969         .set_cr3 = vmx_set_cr3,
1970         .set_cr4 = vmx_set_cr4,
1971 #ifdef CONFIG_X86_64
1972         .set_efer = vmx_set_efer,
1973 #endif
1974         .get_idt = vmx_get_idt,
1975         .set_idt = vmx_set_idt,
1976         .get_gdt = vmx_get_gdt,
1977         .set_gdt = vmx_set_gdt,
1978         .cache_regs = vcpu_load_rsp_rip,
1979         .decache_regs = vcpu_put_rsp_rip,
1980         .get_rflags = vmx_get_rflags,
1981         .set_rflags = vmx_set_rflags,
1982
1983         .tlb_flush = vmx_flush_tlb,
1984         .inject_page_fault = vmx_inject_page_fault,
1985
1986         .inject_gp = vmx_inject_gp,
1987
1988         .run = vmx_vcpu_run,
1989         .skip_emulated_instruction = skip_emulated_instruction,
1990         .vcpu_setup = vmx_vcpu_setup,
1991 };
1992
1993 static int __init vmx_init(void)
1994 {
1995         kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
1996         return 0;
1997 }
1998
1999 static void __exit vmx_exit(void)
2000 {
2001         kvm_exit_arch();
2002 }
2003
2004 module_init(vmx_init)
2005 module_exit(vmx_exit)