256ae8515d2be79909ddce6d76da91c05ff19fd9
[powerpc.git] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/kthread.h>
56
57 #include "cx88.h"
58
59 static unsigned int audio_debug = 0;
60 module_param(audio_debug, int, 0644);
61 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
62
63 static unsigned int always_analog = 0;
64 module_param(always_analog,int,0644);
65 MODULE_PARM_DESC(always_analog,"force analog audio out");
66
67
68 #define dprintk(fmt, arg...)    if (audio_debug) \
69         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
70
71 /* ----------------------------------------------------------- */
72
73 static char *aud_ctl_names[64] = {
74         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
75         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
76         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
77         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
78         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
79         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
80         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
81         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
82         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
83         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
84         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
85         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
86         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
87         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
88         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
89         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
90         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
91         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
92         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
93         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
94         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
95         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
96         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
97 };
98
99 struct rlist {
100         u32 reg;
101         u32 val;
102 };
103
104 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
105 {
106         int i;
107
108         for (i = 0; l[i].reg; i++) {
109                 switch (l[i].reg) {
110                 case AUD_PDF_DDS_CNST_BYTE2:
111                 case AUD_PDF_DDS_CNST_BYTE1:
112                 case AUD_PDF_DDS_CNST_BYTE0:
113                 case AUD_QAM_MODE:
114                 case AUD_PHACC_FREQ_8MSB:
115                 case AUD_PHACC_FREQ_8LSB:
116                         cx_writeb(l[i].reg, l[i].val);
117                         break;
118                 default:
119                         cx_write(l[i].reg, l[i].val);
120                         break;
121                 }
122         }
123 }
124
125 static void set_audio_start(struct cx88_core *core, u32 mode)
126 {
127         /* mute */
128         cx_write(AUD_VOL_CTL, (1 << 6));
129
130         /* start programming */
131         cx_write(AUD_INIT, mode);
132         cx_write(AUD_INIT_LD, 0x0001);
133         cx_write(AUD_SOFT_RESET, 0x0001);
134 }
135
136 static void set_audio_finish(struct cx88_core *core, u32 ctl)
137 {
138         u32 volume;
139
140 #ifndef USING_CX88_ALSA
141         /* restart dma; This avoids buzz in NICAM and is good in others  */
142         cx88_stop_audio_dma(core);
143 #endif
144         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
145 #ifndef USING_CX88_ALSA
146         cx88_start_audio_dma(core);
147 #endif
148
149         if (cx88_boards[core->board].blackbird) {
150                 /* sets sound input from external adc */
151                 switch (core->board) {
152                 case CX88_BOARD_HAUPPAUGE_ROSLYN:
153                 case CX88_BOARD_KWORLD_MCE200_DELUXE:
154                 case CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT:
155                 case CX88_BOARD_PIXELVIEW_PLAYTV_P7000:
156                         cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
157                         break;
158                 default:
159                         cx_set(AUD_CTL, EN_I2SIN_ENABLE);
160                 }
161
162                 cx_write(AUD_I2SINPUTCNTL, 4);
163                 cx_write(AUD_BAUDRATE, 1);
164                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
165                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
166                 cx_write(AUD_I2SOUTPUTCNTL, 1);
167                 cx_write(AUD_I2SCNTL, 0);
168                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
169         }
170         if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
171                 ctl |= EN_DAC_ENABLE;
172                 cx_write(AUD_CTL, ctl);
173         }
174
175         /* finish programming */
176         cx_write(AUD_SOFT_RESET, 0x0000);
177
178         /* unmute */
179         volume = cx_sread(SHADOW_AUD_VOL_CTL);
180         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
181 }
182
183 /* ----------------------------------------------------------- */
184
185 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
186                                     u32 mode)
187 {
188         static const struct rlist btsc[] = {
189                 {AUD_AFE_12DB_EN, 0x00000001},
190                 {AUD_OUT1_SEL, 0x00000013},
191                 {AUD_OUT1_SHIFT, 0x00000000},
192                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
193                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
194                 {AUD_DBX_IN_GAIN, 0x00004734},
195                 {AUD_DBX_WBE_GAIN, 0x00004640},
196                 {AUD_DBX_SE_GAIN, 0x00008d31},
197                 {AUD_DCOC_0_SRC, 0x0000001a},
198                 {AUD_IIR1_4_SEL, 0x00000021},
199                 {AUD_DCOC_PASS_IN, 0x00000003},
200                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
201                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
202                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
203                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
204                 {AUD_DN0_FREQ, 0x0000283b},
205                 {AUD_DN2_SRC_SEL, 0x00000008},
206                 {AUD_DN2_FREQ, 0x00003000},
207                 {AUD_DN2_AFC, 0x00000002},
208                 {AUD_DN2_SHFT, 0x00000000},
209                 {AUD_IIR2_2_SEL, 0x00000020},
210                 {AUD_IIR2_2_SHIFT, 0x00000000},
211                 {AUD_IIR2_3_SEL, 0x0000001f},
212                 {AUD_IIR2_3_SHIFT, 0x00000000},
213                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
214                 {AUD_CRDC1_SHIFT, 0x00000000},
215                 {AUD_CORDIC_SHIFT_1, 0x00000007},
216                 {AUD_DCOC_1_SRC, 0x0000001b},
217                 {AUD_DCOC1_SHIFT, 0x00000000},
218                 {AUD_RDSI_SEL, 0x00000008},
219                 {AUD_RDSQ_SEL, 0x00000008},
220                 {AUD_RDSI_SHIFT, 0x00000000},
221                 {AUD_RDSQ_SHIFT, 0x00000000},
222                 {AUD_POLYPH80SCALEFAC, 0x00000003},
223                 { /* end of list */ },
224         };
225         static const struct rlist btsc_sap[] = {
226                 {AUD_AFE_12DB_EN, 0x00000001},
227                 {AUD_DBX_IN_GAIN, 0x00007200},
228                 {AUD_DBX_WBE_GAIN, 0x00006200},
229                 {AUD_DBX_SE_GAIN, 0x00006200},
230                 {AUD_IIR1_1_SEL, 0x00000000},
231                 {AUD_IIR1_3_SEL, 0x00000001},
232                 {AUD_DN1_SRC_SEL, 0x00000007},
233                 {AUD_IIR1_4_SHIFT, 0x00000006},
234                 {AUD_IIR2_1_SHIFT, 0x00000000},
235                 {AUD_IIR2_2_SHIFT, 0x00000000},
236                 {AUD_IIR3_0_SHIFT, 0x00000000},
237                 {AUD_IIR3_1_SHIFT, 0x00000000},
238                 {AUD_IIR3_0_SEL, 0x0000000d},
239                 {AUD_IIR3_1_SEL, 0x0000000e},
240                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
241                 {AUD_DEEMPH1_SHIFT, 0x00000000},
242                 {AUD_DEEMPH1_G0, 0x00004000},
243                 {AUD_DEEMPH1_A0, 0x00000000},
244                 {AUD_DEEMPH1_B0, 0x00000000},
245                 {AUD_DEEMPH1_A1, 0x00000000},
246                 {AUD_DEEMPH1_B1, 0x00000000},
247                 {AUD_OUT0_SEL, 0x0000003f},
248                 {AUD_OUT1_SEL, 0x0000003f},
249                 {AUD_DN1_AFC, 0x00000002},
250                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
251                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
252                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
253                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
254                 {AUD_IIR1_0_SEL, 0x0000001d},
255                 {AUD_IIR1_2_SEL, 0x0000001e},
256                 {AUD_IIR2_1_SEL, 0x00000002},
257                 {AUD_IIR2_2_SEL, 0x00000004},
258                 {AUD_IIR3_2_SEL, 0x0000000f},
259                 {AUD_DCOC2_SHIFT, 0x00000001},
260                 {AUD_IIR3_2_SHIFT, 0x00000001},
261                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
262                 {AUD_CORDIC_SHIFT_1, 0x00000006},
263                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
264                 {AUD_DMD_RA_DDS, 0x00f696e6},
265                 {AUD_IIR2_3_SEL, 0x00000025},
266                 {AUD_IIR1_4_SEL, 0x00000021},
267                 {AUD_DN1_FREQ, 0x0000c965},
268                 {AUD_DCOC_PASS_IN, 0x00000003},
269                 {AUD_DCOC_0_SRC, 0x0000001a},
270                 {AUD_DCOC_1_SRC, 0x0000001b},
271                 {AUD_DCOC1_SHIFT, 0x00000000},
272                 {AUD_RDSI_SEL, 0x00000009},
273                 {AUD_RDSQ_SEL, 0x00000009},
274                 {AUD_RDSI_SHIFT, 0x00000000},
275                 {AUD_RDSQ_SHIFT, 0x00000000},
276                 {AUD_POLYPH80SCALEFAC, 0x00000003},
277                 { /* end of list */ },
278         };
279
280         mode |= EN_FMRADIO_EN_RDS;
281
282         if (sap) {
283                 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
284                 set_audio_start(core, SEL_SAP);
285                 set_audio_registers(core, btsc_sap);
286                 set_audio_finish(core, mode);
287         } else {
288                 dprintk("%s (status: known-good)\n", __FUNCTION__);
289                 set_audio_start(core, SEL_BTSC);
290                 set_audio_registers(core, btsc);
291                 set_audio_finish(core, mode);
292         }
293 }
294
295 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
296 {
297         static const struct rlist nicam_l[] = {
298                 {AUD_AFE_12DB_EN, 0x00000001},
299                 {AUD_RATE_ADJ1, 0x00000060},
300                 {AUD_RATE_ADJ2, 0x000000F9},
301                 {AUD_RATE_ADJ3, 0x000001CC},
302                 {AUD_RATE_ADJ4, 0x000002B3},
303                 {AUD_RATE_ADJ5, 0x00000726},
304                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
305                 {AUD_DEEMPHDENOM2_R, 0x00000000},
306                 {AUD_ERRLOGPERIOD_R, 0x00000064},
307                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
308                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
309                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
310                 {AUD_POLYPH80SCALEFAC, 0x00000003},
311                 {AUD_DMD_RA_DDS, 0x00C00000},
312                 {AUD_PLL_INT, 0x0000001E},
313                 {AUD_PLL_DDS, 0x00000000},
314                 {AUD_PLL_FRAC, 0x0000E542},
315                 {AUD_START_TIMER, 0x00000000},
316                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
317                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
318                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
319                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
320                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
321                 {AUD_QAM_MODE, 0x05},
322                 {AUD_PHACC_FREQ_8MSB, 0x34},
323                 {AUD_PHACC_FREQ_8LSB, 0x4C},
324                 {AUD_DEEMPHGAIN_R, 0x00006680},
325                 {AUD_RATE_THRES_DMD, 0x000000C0},
326                 { /* end of list */ },
327         };
328
329         static const struct rlist nicam_bgdki_common[] = {
330                 {AUD_AFE_12DB_EN, 0x00000001},
331                 {AUD_RATE_ADJ1, 0x00000010},
332                 {AUD_RATE_ADJ2, 0x00000040},
333                 {AUD_RATE_ADJ3, 0x00000100},
334                 {AUD_RATE_ADJ4, 0x00000400},
335                 {AUD_RATE_ADJ5, 0x00001000},
336                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
337                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
338                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
339                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
340                 {AUD_POLYPH80SCALEFAC, 0x00000003},
341                 {AUD_DEEMPHGAIN_R, 0x000023c2},
342                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
343                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
344                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
345                 {AUD_DEEMPHDENOM2_R, 0x00000000},
346                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
347                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
348                 {AUD_QAM_MODE, 0x05},
349                 { /* end of list */ },
350         };
351
352         static const struct rlist nicam_i[] = {
353                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
354                 {AUD_PHACC_FREQ_8MSB, 0x3a},
355                 {AUD_PHACC_FREQ_8LSB, 0x93},
356                 { /* end of list */ },
357         };
358
359         static const struct rlist nicam_default[] = {
360                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
361                 {AUD_PHACC_FREQ_8MSB, 0x34},
362                 {AUD_PHACC_FREQ_8LSB, 0x4c},
363                 { /* end of list */ },
364         };
365
366         set_audio_start(core,SEL_NICAM);
367         switch (core->tvaudio) {
368         case WW_L:
369                 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
370                 set_audio_registers(core, nicam_l);
371                 break;
372         case WW_I:
373                 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
374                 set_audio_registers(core, nicam_bgdki_common);
375                 set_audio_registers(core, nicam_i);
376                 break;
377         default:
378                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
379                 set_audio_registers(core, nicam_bgdki_common);
380                 set_audio_registers(core, nicam_default);
381                 break;
382         };
383
384         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
385         set_audio_finish(core, mode);
386 }
387
388 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
389 {
390         static const struct rlist a2_bgdk_common[] = {
391                 {AUD_ERRLOGPERIOD_R, 0x00000064},
392                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
393                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
394                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
395                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
396                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
397                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
398                 {AUD_QAM_MODE, 0x05},
399                 {AUD_PHACC_FREQ_8MSB, 0x34},
400                 {AUD_PHACC_FREQ_8LSB, 0x4c},
401                 {AUD_RATE_ADJ1, 0x00000100},
402                 {AUD_RATE_ADJ2, 0x00000200},
403                 {AUD_RATE_ADJ3, 0x00000300},
404                 {AUD_RATE_ADJ4, 0x00000400},
405                 {AUD_RATE_ADJ5, 0x00000500},
406                 {AUD_THR_FR, 0x00000000},
407                 {AAGC_HYST, 0x0000001a},
408                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
409                 {AUD_PILOT_BQD_1_K1, 0x00551340},
410                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
411                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
412                 {AUD_PILOT_BQD_1_K4, 0x00400000},
413                 {AUD_PILOT_BQD_2_K0, 0x00040000},
414                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
415                 {AUD_PILOT_BQD_2_K2, 0x00400000},
416                 {AUD_PILOT_BQD_2_K3, 0x00000000},
417                 {AUD_PILOT_BQD_2_K4, 0x00000000},
418                 {AUD_MODE_CHG_TIMER, 0x00000040},
419                 {AUD_AFE_12DB_EN, 0x00000001},
420                 {AUD_CORDIC_SHIFT_0, 0x00000007},
421                 {AUD_CORDIC_SHIFT_1, 0x00000007},
422                 {AUD_DEEMPH0_G0, 0x00000380},
423                 {AUD_DEEMPH1_G0, 0x00000380},
424                 {AUD_DCOC_0_SRC, 0x0000001a},
425                 {AUD_DCOC0_SHIFT, 0x00000000},
426                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
427                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
428                 {AUD_DCOC_PASS_IN, 0x00000003},
429                 {AUD_IIR3_0_SEL, 0x00000021},
430                 {AUD_DN2_AFC, 0x00000002},
431                 {AUD_DCOC_1_SRC, 0x0000001b},
432                 {AUD_DCOC1_SHIFT, 0x00000000},
433                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
434                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
435                 {AUD_IIR3_1_SEL, 0x00000023},
436                 {AUD_RDSI_SEL, 0x00000017},
437                 {AUD_RDSI_SHIFT, 0x00000000},
438                 {AUD_RDSQ_SEL, 0x00000017},
439                 {AUD_RDSQ_SHIFT, 0x00000000},
440                 {AUD_PLL_INT, 0x0000001e},
441                 {AUD_PLL_DDS, 0x00000000},
442                 {AUD_PLL_FRAC, 0x0000e542},
443                 {AUD_POLYPH80SCALEFAC, 0x00000001},
444                 {AUD_START_TIMER, 0x00000000},
445                 { /* end of list */ },
446         };
447
448         static const struct rlist a2_bg[] = {
449                 {AUD_DMD_RA_DDS, 0x002a4f2f},
450                 {AUD_C1_UP_THR, 0x00007000},
451                 {AUD_C1_LO_THR, 0x00005400},
452                 {AUD_C2_UP_THR, 0x00005400},
453                 {AUD_C2_LO_THR, 0x00003000},
454                 { /* end of list */ },
455         };
456
457         static const struct rlist a2_dk[] = {
458                 {AUD_DMD_RA_DDS, 0x002a4f2f},
459                 {AUD_C1_UP_THR, 0x00007000},
460                 {AUD_C1_LO_THR, 0x00005400},
461                 {AUD_C2_UP_THR, 0x00005400},
462                 {AUD_C2_LO_THR, 0x00003000},
463                 {AUD_DN0_FREQ, 0x00003a1c},
464                 {AUD_DN2_FREQ, 0x0000d2e0},
465                 { /* end of list */ },
466         };
467
468         static const struct rlist a1_i[] = {
469                 {AUD_ERRLOGPERIOD_R, 0x00000064},
470                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
471                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
472                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
473                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
474                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
475                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
476                 {AUD_QAM_MODE, 0x05},
477                 {AUD_PHACC_FREQ_8MSB, 0x3a},
478                 {AUD_PHACC_FREQ_8LSB, 0x93},
479                 {AUD_DMD_RA_DDS, 0x002a4f2f},
480                 {AUD_PLL_INT, 0x0000001e},
481                 {AUD_PLL_DDS, 0x00000004},
482                 {AUD_PLL_FRAC, 0x0000e542},
483                 {AUD_RATE_ADJ1, 0x00000100},
484                 {AUD_RATE_ADJ2, 0x00000200},
485                 {AUD_RATE_ADJ3, 0x00000300},
486                 {AUD_RATE_ADJ4, 0x00000400},
487                 {AUD_RATE_ADJ5, 0x00000500},
488                 {AUD_THR_FR, 0x00000000},
489                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
490                 {AUD_PILOT_BQD_1_K1, 0x00551340},
491                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
492                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
493                 {AUD_PILOT_BQD_1_K4, 0x00400000},
494                 {AUD_PILOT_BQD_2_K0, 0x00040000},
495                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
496                 {AUD_PILOT_BQD_2_K2, 0x00400000},
497                 {AUD_PILOT_BQD_2_K3, 0x00000000},
498                 {AUD_PILOT_BQD_2_K4, 0x00000000},
499                 {AUD_MODE_CHG_TIMER, 0x00000060},
500                 {AUD_AFE_12DB_EN, 0x00000001},
501                 {AAGC_HYST, 0x0000000a},
502                 {AUD_CORDIC_SHIFT_0, 0x00000007},
503                 {AUD_CORDIC_SHIFT_1, 0x00000007},
504                 {AUD_C1_UP_THR, 0x00007000},
505                 {AUD_C1_LO_THR, 0x00005400},
506                 {AUD_C2_UP_THR, 0x00005400},
507                 {AUD_C2_LO_THR, 0x00003000},
508                 {AUD_DCOC_0_SRC, 0x0000001a},
509                 {AUD_DCOC0_SHIFT, 0x00000000},
510                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
511                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
512                 {AUD_DCOC_PASS_IN, 0x00000003},
513                 {AUD_IIR3_0_SEL, 0x00000021},
514                 {AUD_DN2_AFC, 0x00000002},
515                 {AUD_DCOC_1_SRC, 0x0000001b},
516                 {AUD_DCOC1_SHIFT, 0x00000000},
517                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
518                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
519                 {AUD_IIR3_1_SEL, 0x00000023},
520                 {AUD_DN0_FREQ, 0x000035a3},
521                 {AUD_DN2_FREQ, 0x000029c7},
522                 {AUD_CRDC0_SRC_SEL, 0x00000511},
523                 {AUD_IIR1_0_SEL, 0x00000001},
524                 {AUD_IIR1_1_SEL, 0x00000000},
525                 {AUD_IIR3_2_SEL, 0x00000003},
526                 {AUD_IIR3_2_SHIFT, 0x00000000},
527                 {AUD_IIR3_0_SEL, 0x00000002},
528                 {AUD_IIR2_0_SEL, 0x00000021},
529                 {AUD_IIR2_0_SHIFT, 0x00000002},
530                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
531                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
532                 {AUD_POLYPH80SCALEFAC, 0x00000001},
533                 {AUD_START_TIMER, 0x00000000},
534                 { /* end of list */ },
535         };
536
537         static const struct rlist am_l[] = {
538                 {AUD_ERRLOGPERIOD_R, 0x00000064},
539                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
540                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
541                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
542                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
543                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
544                 {AUD_QAM_MODE, 0x00},
545                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
546                 {AUD_PHACC_FREQ_8MSB, 0x3a},
547                 {AUD_PHACC_FREQ_8LSB, 0x4a},
548                 {AUD_DEEMPHGAIN_R, 0x00006680},
549                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
550                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
551                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
552                 {AUD_DEEMPHDENOM2_R, 0x00000000},
553                 {AUD_FM_MODE_ENABLE, 0x00000007},
554                 {AUD_POLYPH80SCALEFAC, 0x00000003},
555                 {AUD_AFE_12DB_EN, 0x00000001},
556                 {AAGC_GAIN, 0x00000000},
557                 {AAGC_HYST, 0x00000018},
558                 {AAGC_DEF, 0x00000020},
559                 {AUD_DN0_FREQ, 0x00000000},
560                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
561                 {AUD_DCOC_0_SRC, 0x00000021},
562                 {AUD_IIR1_0_SEL, 0x00000000},
563                 {AUD_IIR1_0_SHIFT, 0x00000007},
564                 {AUD_IIR1_1_SEL, 0x00000002},
565                 {AUD_IIR1_1_SHIFT, 0x00000000},
566                 {AUD_DCOC_1_SRC, 0x00000003},
567                 {AUD_DCOC1_SHIFT, 0x00000000},
568                 {AUD_DCOC_PASS_IN, 0x00000000},
569                 {AUD_IIR1_2_SEL, 0x00000023},
570                 {AUD_IIR1_2_SHIFT, 0x00000000},
571                 {AUD_IIR1_3_SEL, 0x00000004},
572                 {AUD_IIR1_3_SHIFT, 0x00000007},
573                 {AUD_IIR1_4_SEL, 0x00000005},
574                 {AUD_IIR1_4_SHIFT, 0x00000007},
575                 {AUD_IIR3_0_SEL, 0x00000007},
576                 {AUD_IIR3_0_SHIFT, 0x00000000},
577                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
578                 {AUD_DEEMPH0_SHIFT, 0x00000000},
579                 {AUD_DEEMPH0_G0, 0x00007000},
580                 {AUD_DEEMPH0_A0, 0x00000000},
581                 {AUD_DEEMPH0_B0, 0x00000000},
582                 {AUD_DEEMPH0_A1, 0x00000000},
583                 {AUD_DEEMPH0_B1, 0x00000000},
584                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
585                 {AUD_DEEMPH1_SHIFT, 0x00000000},
586                 {AUD_DEEMPH1_G0, 0x00007000},
587                 {AUD_DEEMPH1_A0, 0x00000000},
588                 {AUD_DEEMPH1_B0, 0x00000000},
589                 {AUD_DEEMPH1_A1, 0x00000000},
590                 {AUD_DEEMPH1_B1, 0x00000000},
591                 {AUD_OUT0_SEL, 0x0000003F},
592                 {AUD_OUT1_SEL, 0x0000003F},
593                 {AUD_DMD_RA_DDS, 0x00F5C285},
594                 {AUD_PLL_INT, 0x0000001E},
595                 {AUD_PLL_DDS, 0x00000000},
596                 {AUD_PLL_FRAC, 0x0000E542},
597                 {AUD_RATE_ADJ1, 0x00000100},
598                 {AUD_RATE_ADJ2, 0x00000200},
599                 {AUD_RATE_ADJ3, 0x00000300},
600                 {AUD_RATE_ADJ4, 0x00000400},
601                 {AUD_RATE_ADJ5, 0x00000500},
602                 {AUD_RATE_THRES_DMD, 0x000000C0},
603                 { /* end of list */ },
604         };
605
606         static const struct rlist a2_deemph50[] = {
607                 {AUD_DEEMPH0_G0, 0x00000380},
608                 {AUD_DEEMPH1_G0, 0x00000380},
609                 {AUD_DEEMPHGAIN_R, 0x000011e1},
610                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
611                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
612                 { /* end of list */ },
613         };
614
615         set_audio_start(core, SEL_A2);
616         switch (core->tvaudio) {
617         case WW_BG:
618                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
619                 set_audio_registers(core, a2_bgdk_common);
620                 set_audio_registers(core, a2_bg);
621                 set_audio_registers(core, a2_deemph50);
622                 break;
623         case WW_DK:
624                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
625                 set_audio_registers(core, a2_bgdk_common);
626                 set_audio_registers(core, a2_dk);
627                 set_audio_registers(core, a2_deemph50);
628                 break;
629         case WW_I:
630                 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
631                 set_audio_registers(core, a1_i);
632                 set_audio_registers(core, a2_deemph50);
633                 break;
634         case WW_L:
635                 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
636                 set_audio_registers(core, am_l);
637                 break;
638         default:
639                 dprintk("%s Warning: wrong value\n", __FUNCTION__);
640                 return;
641                 break;
642         };
643
644         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
645         set_audio_finish(core, mode);
646 }
647
648 static void set_audio_standard_EIAJ(struct cx88_core *core)
649 {
650         static const struct rlist eiaj[] = {
651                 /* TODO: eiaj register settings are not there yet ... */
652
653                 { /* end of list */ },
654         };
655         dprintk("%s (status: unknown)\n", __FUNCTION__);
656
657         set_audio_start(core, SEL_EIAJ);
658         set_audio_registers(core, eiaj);
659         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
660 }
661
662 static void set_audio_standard_FM(struct cx88_core *core,
663                                   enum cx88_deemph_type deemph)
664 {
665         static const struct rlist fm_deemph_50[] = {
666                 {AUD_DEEMPH0_G0, 0x0C45},
667                 {AUD_DEEMPH0_A0, 0x6262},
668                 {AUD_DEEMPH0_B0, 0x1C29},
669                 {AUD_DEEMPH0_A1, 0x3FC66},
670                 {AUD_DEEMPH0_B1, 0x399A},
671
672                 {AUD_DEEMPH1_G0, 0x0D80},
673                 {AUD_DEEMPH1_A0, 0x6262},
674                 {AUD_DEEMPH1_B0, 0x1C29},
675                 {AUD_DEEMPH1_A1, 0x3FC66},
676                 {AUD_DEEMPH1_B1, 0x399A},
677
678                 {AUD_POLYPH80SCALEFAC, 0x0003},
679                 { /* end of list */ },
680         };
681         static const struct rlist fm_deemph_75[] = {
682                 {AUD_DEEMPH0_G0, 0x091B},
683                 {AUD_DEEMPH0_A0, 0x6B68},
684                 {AUD_DEEMPH0_B0, 0x11EC},
685                 {AUD_DEEMPH0_A1, 0x3FC66},
686                 {AUD_DEEMPH0_B1, 0x399A},
687
688                 {AUD_DEEMPH1_G0, 0x0AA0},
689                 {AUD_DEEMPH1_A0, 0x6B68},
690                 {AUD_DEEMPH1_B0, 0x11EC},
691                 {AUD_DEEMPH1_A1, 0x3FC66},
692                 {AUD_DEEMPH1_B1, 0x399A},
693
694                 {AUD_POLYPH80SCALEFAC, 0x0003},
695                 { /* end of list */ },
696         };
697
698         /* It is enough to leave default values? */
699         static const struct rlist fm_no_deemph[] = {
700
701                 {AUD_POLYPH80SCALEFAC, 0x0003},
702                 { /* end of list */ },
703         };
704
705         dprintk("%s (status: unknown)\n", __FUNCTION__);
706         set_audio_start(core, SEL_FMRADIO);
707
708         switch (deemph) {
709         case FM_NO_DEEMPH:
710                 set_audio_registers(core, fm_no_deemph);
711                 break;
712
713         case FM_DEEMPH_50:
714                 set_audio_registers(core, fm_deemph_50);
715                 break;
716
717         case FM_DEEMPH_75:
718                 set_audio_registers(core, fm_deemph_75);
719                 break;
720         }
721
722         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
723 }
724
725 /* ----------------------------------------------------------- */
726
727 int cx88_detect_nicam(struct cx88_core *core)
728 {
729         int i, j = 0;
730
731         dprintk("start nicam autodetect.\n");
732
733         for (i = 0; i < 6; i++) {
734                 /* if bit1=1 then nicam is detected */
735                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
736
737                 if (j == 1) {
738                         dprintk("nicam is detected.\n");
739                         return 1;
740                 }
741
742                 /* wait a little bit for next reading status */
743                 msleep(10);
744         }
745
746         dprintk("nicam is not detected.\n");
747         return 0;
748 }
749
750 void cx88_set_tvaudio(struct cx88_core *core)
751 {
752         switch (core->tvaudio) {
753         case WW_BTSC:
754                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
755                 break;
756         case WW_BG:
757         case WW_DK:
758         case WW_I:
759         case WW_L:
760                 /* prepare all dsp registers */
761                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
762
763                 /* set nicam mode - otherwise
764                    AUD_NICAM_STATUS2 contains wrong values */
765                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
766                 if (0 == cx88_detect_nicam(core)) {
767                         /* fall back to fm / am mono */
768                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
769                         core->use_nicam = 0;
770                 } else {
771                         core->use_nicam = 1;
772                 }
773                 break;
774         case WW_EIAJ:
775                 set_audio_standard_EIAJ(core);
776                 break;
777         case WW_FM:
778                 set_audio_standard_FM(core, FM_NO_DEEMPH);
779                 break;
780         case WW_NONE:
781         default:
782                 printk("%s/0: unknown tv audio mode [%d]\n",
783                        core->name, core->tvaudio);
784                 break;
785         }
786         return;
787 }
788
789 void cx88_newstation(struct cx88_core *core)
790 {
791         core->audiomode_manual = UNSET;
792 }
793
794 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
795 {
796         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
797         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
798         u32 reg, mode, pilot;
799
800         reg = cx_read(AUD_STATUS);
801         mode = reg & 0x03;
802         pilot = (reg >> 2) & 0x03;
803
804         if (core->astat != reg)
805                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
806                         reg, m[mode], p[pilot],
807                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
808         core->astat = reg;
809
810 /* TODO
811        Reading from AUD_STATUS is not enough
812        for auto-detecting sap/dual-fm/nicam.
813        Add some code here later.
814 */
815
816 # if 0
817         t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
818             V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
819         t->rxsubchans = V4L2_TUNER_SUB_MONO;
820         t->audmode = V4L2_TUNER_MODE_MONO;
821
822         switch (core->tvaudio) {
823         case WW_BTSC:
824                 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
825                 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
826                 if (1 == pilot) {
827                         /* SAP */
828                         t->rxsubchans |= V4L2_TUNER_SUB_SAP;
829                 }
830                 break;
831         case WW_A2_BG:
832         case WW_A2_DK:
833         case WW_A2_M:
834                 if (1 == pilot) {
835                         /* stereo */
836                         t->rxsubchans =
837                             V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
838                         if (0 == mode)
839                                 t->audmode = V4L2_TUNER_MODE_STEREO;
840                 }
841                 if (2 == pilot) {
842                         /* dual language -- FIXME */
843                         t->rxsubchans =
844                             V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
845                         t->audmode = V4L2_TUNER_MODE_LANG1;
846                 }
847                 break;
848         case WW_NICAM_BGDKL:
849                 if (0 == mode) {
850                         t->audmode = V4L2_TUNER_MODE_STEREO;
851                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
852                 }
853                 break;
854         case WW_SYSTEM_L_AM:
855                 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
856                         t->audmode = V4L2_TUNER_MODE_STEREO;
857                         t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
858                 }
859                 break;
860         default:
861                 /* nothing */
862                 break;
863         }
864 # endif
865         return;
866 }
867
868 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
869 {
870         u32 ctl = UNSET;
871         u32 mask = UNSET;
872
873         if (manual) {
874                 core->audiomode_manual = mode;
875         } else {
876                 if (UNSET != core->audiomode_manual)
877                         return;
878         }
879         core->audiomode_current = mode;
880
881         switch (core->tvaudio) {
882         case WW_BTSC:
883                 switch (mode) {
884                 case V4L2_TUNER_MODE_MONO:
885                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
886                         break;
887                 case V4L2_TUNER_MODE_LANG1:
888                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
889                         break;
890                 case V4L2_TUNER_MODE_LANG2:
891                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
892                         break;
893                 case V4L2_TUNER_MODE_STEREO:
894                 case V4L2_TUNER_MODE_LANG1_LANG2:
895                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
896                         break;
897                 }
898                 break;
899         case WW_BG:
900         case WW_DK:
901         case WW_I:
902         case WW_L:
903                 if (1 == core->use_nicam) {
904                         switch (mode) {
905                         case V4L2_TUNER_MODE_MONO:
906                         case V4L2_TUNER_MODE_LANG1:
907                                 set_audio_standard_NICAM(core,
908                                                          EN_NICAM_FORCE_MONO1);
909                                 break;
910                         case V4L2_TUNER_MODE_LANG2:
911                                 set_audio_standard_NICAM(core,
912                                                          EN_NICAM_FORCE_MONO2);
913                                 break;
914                         case V4L2_TUNER_MODE_STEREO:
915                         case V4L2_TUNER_MODE_LANG1_LANG2:
916                                 set_audio_standard_NICAM(core,
917                                                          EN_NICAM_FORCE_STEREO);
918                                 break;
919                         }
920                 } else {
921                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
922                                 /* fall back to fm / am mono */
923                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
924                         } else {
925                                 /* TODO: Add A2 autodection */
926                                 switch (mode) {
927                                 case V4L2_TUNER_MODE_MONO:
928                                 case V4L2_TUNER_MODE_LANG1:
929                                         set_audio_standard_A2(core,
930                                                               EN_A2_FORCE_MONO1);
931                                         break;
932                                 case V4L2_TUNER_MODE_LANG2:
933                                         set_audio_standard_A2(core,
934                                                               EN_A2_FORCE_MONO2);
935                                         break;
936                                 case V4L2_TUNER_MODE_STEREO:
937                                 case V4L2_TUNER_MODE_LANG1_LANG2:
938                                         set_audio_standard_A2(core,
939                                                               EN_A2_FORCE_STEREO);
940                                         break;
941                                 }
942                         }
943                 }
944                 break;
945         case WW_FM:
946                 switch (mode) {
947                 case V4L2_TUNER_MODE_MONO:
948                         ctl = EN_FMRADIO_FORCE_MONO;
949                         mask = 0x3f;
950                         break;
951                 case V4L2_TUNER_MODE_STEREO:
952                         ctl = EN_FMRADIO_AUTO_STEREO;
953                         mask = 0x3f;
954                         break;
955                 }
956                 break;
957         }
958
959         if (UNSET != ctl) {
960                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
961                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
962                         mask, ctl, cx_read(AUD_STATUS),
963                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
964                 cx_andor(AUD_CTL, mask, ctl);
965         }
966         return;
967 }
968
969 int cx88_audio_thread(void *data)
970 {
971         struct cx88_core *core = data;
972         struct v4l2_tuner t;
973         u32 mode = 0;
974
975         dprintk("cx88: tvaudio thread started\n");
976         for (;;) {
977                 msleep_interruptible(1000);
978                 if (kthread_should_stop())
979                         break;
980
981                 /* just monitor the audio status for now ... */
982                 memset(&t, 0, sizeof(t));
983                 cx88_get_stereo(core, &t);
984
985                 if (UNSET != core->audiomode_manual)
986                         /* manually set, don't do anything. */
987                         continue;
988
989                 /* monitor signal */
990                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
991                         mode = V4L2_TUNER_MODE_STEREO;
992                 else
993                         mode = V4L2_TUNER_MODE_MONO;
994                 if (mode == core->audiomode_current)
995                         continue;
996
997                 /* automatically switch to best available mode */
998                 cx88_set_stereo(core, mode, 0);
999         }
1000
1001         dprintk("cx88: tvaudio thread exiting\n");
1002         return 0;
1003 }
1004
1005 /* ----------------------------------------------------------- */
1006
1007 EXPORT_SYMBOL(cx88_set_tvaudio);
1008 EXPORT_SYMBOL(cx88_newstation);
1009 EXPORT_SYMBOL(cx88_set_stereo);
1010 EXPORT_SYMBOL(cx88_get_stereo);
1011 EXPORT_SYMBOL(cx88_audio_thread);
1012
1013 /*
1014  * Local variables:
1015  * c-basic-offset: 8
1016  * End:
1017  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1018  */