5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_oobinfo nand_oob_8 = {
56 .useecc = MTD_NANDECC_AUTOPLACE,
59 .oobfree = {{3, 2}, {6, 2}}
62 static struct nand_oobinfo nand_oob_16 = {
63 .useecc = MTD_NANDECC_AUTOPLACE,
65 .eccpos = {0, 1, 2, 3, 6, 7},
69 static struct nand_oobinfo nand_oob_64 = {
70 .useecc = MTD_NANDECC_AUTOPLACE,
73 40, 41, 42, 43, 44, 45, 46, 47,
74 48, 49, 50, 51, 52, 53, 54, 55,
75 56, 57, 58, 59, 60, 61, 62, 63},
79 /* This is used for padding purposes in nand_write_oob */
80 static uint8_t ffchars[] = {
81 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
82 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
83 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
84 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
85 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
86 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
87 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
88 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
92 * NAND low-level MTD interface functions
94 static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
95 static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
96 static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len);
98 static int nand_read(struct mtd_info *mtd, loff_t from, size_t len,
99 size_t *retlen, uint8_t *buf);
100 static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
101 size_t *retlen, uint8_t *buf);
102 static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
103 size_t *retlen, const uint8_t *buf);
104 static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
105 size_t *retlen, const uint8_t *buf);
106 static int nand_erase(struct mtd_info *mtd, struct erase_info *instr);
107 static void nand_sync(struct mtd_info *mtd);
109 /* Some internal functions */
110 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,
111 int page, uint8_t * oob_buf,
112 struct nand_oobinfo *oobsel, int mode);
113 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
114 static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip,
115 int page, int numpages, uint8_t *oob_buf,
116 struct nand_oobinfo *oobsel, int chipnr,
119 #define nand_verify_pages(...) (0)
122 static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd,
126 * For devices which display every fart in the system on a seperate LED. Is
127 * compiled away when LED support is disabled.
129 DEFINE_LED_TRIGGER(nand_led_trigger);
132 * nand_release_device - [GENERIC] release chip
133 * @mtd: MTD device structure
135 * Deselect, release chip lock and wake up anyone waiting on the device
137 static void nand_release_device(struct mtd_info *mtd)
139 struct nand_chip *chip = mtd->priv;
141 /* De-select the NAND device */
142 chip->select_chip(mtd, -1);
144 /* Release the controller and the chip */
145 spin_lock(&chip->controller->lock);
146 chip->controller->active = NULL;
147 chip->state = FL_READY;
148 wake_up(&chip->controller->wq);
149 spin_unlock(&chip->controller->lock);
153 * nand_read_byte - [DEFAULT] read one byte from the chip
154 * @mtd: MTD device structure
156 * Default read function for 8bit buswith
158 static uint8_t nand_read_byte(struct mtd_info *mtd)
160 struct nand_chip *chip = mtd->priv;
161 return readb(chip->IO_ADDR_R);
165 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
166 * @mtd: MTD device structure
168 * Default read function for 16bit buswith with
169 * endianess conversion
171 static uint8_t nand_read_byte16(struct mtd_info *mtd)
173 struct nand_chip *chip = mtd->priv;
174 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R));
178 * nand_read_word - [DEFAULT] read one word from the chip
179 * @mtd: MTD device structure
181 * Default read function for 16bit buswith without
182 * endianess conversion
184 static u16 nand_read_word(struct mtd_info *mtd)
186 struct nand_chip *chip = mtd->priv;
187 return readw(chip->IO_ADDR_R);
191 * nand_select_chip - [DEFAULT] control CE line
192 * @mtd: MTD device structure
193 * @chip: chipnumber to select, -1 for deselect
195 * Default select function for 1 chip devices.
197 static void nand_select_chip(struct mtd_info *mtd, int chipnr)
199 struct nand_chip *chip = mtd->priv;
203 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
206 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
207 NAND_NCE | NAND_CTRL_CHANGE);
216 * nand_write_buf - [DEFAULT] write buffer to chip
217 * @mtd: MTD device structure
219 * @len: number of bytes to write
221 * Default write function for 8bit buswith
223 static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
226 struct nand_chip *chip = mtd->priv;
228 for (i = 0; i < len; i++)
229 writeb(buf[i], chip->IO_ADDR_W);
233 * nand_read_buf - [DEFAULT] read chip data into buffer
234 * @mtd: MTD device structure
235 * @buf: buffer to store date
236 * @len: number of bytes to read
238 * Default read function for 8bit buswith
240 static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
243 struct nand_chip *chip = mtd->priv;
245 for (i = 0; i < len; i++)
246 buf[i] = readb(chip->IO_ADDR_R);
250 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
251 * @mtd: MTD device structure
252 * @buf: buffer containing the data to compare
253 * @len: number of bytes to compare
255 * Default verify function for 8bit buswith
257 static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
260 struct nand_chip *chip = mtd->priv;
262 for (i = 0; i < len; i++)
263 if (buf[i] != readb(chip->IO_ADDR_R))
270 * nand_write_buf16 - [DEFAULT] write buffer to chip
271 * @mtd: MTD device structure
273 * @len: number of bytes to write
275 * Default write function for 16bit buswith
277 static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
280 struct nand_chip *chip = mtd->priv;
281 u16 *p = (u16 *) buf;
284 for (i = 0; i < len; i++)
285 writew(p[i], chip->IO_ADDR_W);
290 * nand_read_buf16 - [DEFAULT] read chip data into buffer
291 * @mtd: MTD device structure
292 * @buf: buffer to store date
293 * @len: number of bytes to read
295 * Default read function for 16bit buswith
297 static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
300 struct nand_chip *chip = mtd->priv;
301 u16 *p = (u16 *) buf;
304 for (i = 0; i < len; i++)
305 p[i] = readw(chip->IO_ADDR_R);
309 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
310 * @mtd: MTD device structure
311 * @buf: buffer containing the data to compare
312 * @len: number of bytes to compare
314 * Default verify function for 16bit buswith
316 static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
319 struct nand_chip *chip = mtd->priv;
320 u16 *p = (u16 *) buf;
323 for (i = 0; i < len; i++)
324 if (p[i] != readw(chip->IO_ADDR_R))
331 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
332 * @mtd: MTD device structure
333 * @ofs: offset from device start
334 * @getchip: 0, if the chip is already selected
336 * Check, if the block is bad.
338 static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
340 int page, chipnr, res = 0;
341 struct nand_chip *chip = mtd->priv;
345 page = (int)(ofs >> chip->page_shift);
346 chipnr = (int)(ofs >> chip->chip_shift);
348 nand_get_device(chip, mtd, FL_READING);
350 /* Select the NAND device */
351 chip->select_chip(mtd, chipnr);
355 if (chip->options & NAND_BUSWIDTH_16) {
356 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE,
357 page & chip->pagemask);
358 bad = cpu_to_le16(chip->read_word(mtd));
359 if (chip->badblockpos & 0x1)
361 if ((bad & 0xFF) != 0xff)
364 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos,
365 page & chip->pagemask);
366 if (chip->read_byte(mtd) != 0xff)
371 nand_release_device(mtd);
377 * nand_default_block_markbad - [DEFAULT] mark a block bad
378 * @mtd: MTD device structure
379 * @ofs: offset from device start
381 * This is the default implementation, which can be overridden by
382 * a hardware specific driver.
384 static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
386 struct nand_chip *chip = mtd->priv;
387 uint8_t buf[2] = { 0, 0 };
391 /* Get block number */
392 block = ((int)ofs) >> chip->bbt_erase_shift;
394 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
396 /* Do we have a flash based bad block table ? */
397 if (chip->options & NAND_USE_FLASH_BBT)
398 return nand_update_bbt(mtd, ofs);
400 /* We write two bytes, so we dont have to mess with 16 bit access */
401 ofs += mtd->oobsize + (chip->badblockpos & ~0x01);
402 return nand_write_oob(mtd, ofs, 2, &retlen, buf);
406 * nand_check_wp - [GENERIC] check if the chip is write protected
407 * @mtd: MTD device structure
408 * Check, if the device is write protected
410 * The function expects, that the device is already selected
412 static int nand_check_wp(struct mtd_info *mtd)
414 struct nand_chip *chip = mtd->priv;
415 /* Check the WP bit */
416 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
417 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
421 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
422 * @mtd: MTD device structure
423 * @ofs: offset from device start
424 * @getchip: 0, if the chip is already selected
425 * @allowbbt: 1, if its allowed to access the bbt area
427 * Check, if the block is bad. Either by reading the bad block table or
428 * calling of the scan function.
430 static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip,
433 struct nand_chip *chip = mtd->priv;
436 return chip->block_bad(mtd, ofs, getchip);
438 /* Return info from the table */
439 return nand_isbad_bbt(mtd, ofs, allowbbt);
443 * Wait for the ready pin, after a command
444 * The timeout is catched later.
446 static void nand_wait_ready(struct mtd_info *mtd)
448 struct nand_chip *chip = mtd->priv;
449 unsigned long timeo = jiffies + 2;
451 led_trigger_event(nand_led_trigger, LED_FULL);
452 /* wait until command is processed or timeout occures */
454 if (chip->dev_ready(mtd))
456 touch_softlockup_watchdog();
457 } while (time_before(jiffies, timeo));
458 led_trigger_event(nand_led_trigger, LED_OFF);
462 * nand_command - [DEFAULT] Send command to NAND device
463 * @mtd: MTD device structure
464 * @command: the command to be sent
465 * @column: the column address for this command, -1 if none
466 * @page_addr: the page address for this command, -1 if none
468 * Send command to NAND device. This function is used for small page
469 * devices (256/512 Bytes per page)
471 static void nand_command(struct mtd_info *mtd, unsigned int command,
472 int column, int page_addr)
474 register struct nand_chip *chip = mtd->priv;
475 int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE;
478 * Write out the command to the device.
480 if (command == NAND_CMD_SEQIN) {
483 if (column >= mtd->writesize) {
485 column -= mtd->writesize;
486 readcmd = NAND_CMD_READOOB;
487 } else if (column < 256) {
488 /* First 256 bytes --> READ0 */
489 readcmd = NAND_CMD_READ0;
492 readcmd = NAND_CMD_READ1;
494 chip->cmd_ctrl(mtd, readcmd, ctrl);
495 ctrl &= ~NAND_CTRL_CHANGE;
497 chip->cmd_ctrl(mtd, command, ctrl);
500 * Address cycle, when necessary
502 ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE;
503 /* Serially input address */
505 /* Adjust columns for 16 bit buswidth */
506 if (chip->options & NAND_BUSWIDTH_16)
508 chip->cmd_ctrl(mtd, column, ctrl);
509 ctrl &= ~NAND_CTRL_CHANGE;
511 if (page_addr != -1) {
512 chip->cmd_ctrl(mtd, page_addr, ctrl);
513 ctrl &= ~NAND_CTRL_CHANGE;
514 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl);
515 /* One more address cycle for devices > 32MiB */
516 if (chip->chipsize > (32 << 20))
517 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl);
519 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
522 * program and erase have their own busy handlers
523 * status and sequential in needs no delay
527 case NAND_CMD_PAGEPROG:
528 case NAND_CMD_ERASE1:
529 case NAND_CMD_ERASE2:
531 case NAND_CMD_STATUS:
532 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE);
538 udelay(chip->chip_delay);
539 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
540 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
542 NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
543 while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ;
546 /* This applies to read commands */
549 * If we don't have access to the busy pin, we apply the given
552 if (!chip->dev_ready) {
553 udelay(chip->chip_delay);
557 /* Apply this short delay always to ensure that we do wait tWB in
558 * any case on any machine. */
561 nand_wait_ready(mtd);
565 * nand_command_lp - [DEFAULT] Send command to NAND large page device
566 * @mtd: MTD device structure
567 * @command: the command to be sent
568 * @column: the column address for this command, -1 if none
569 * @page_addr: the page address for this command, -1 if none
571 * Send command to NAND device. This is the version for the new large page
572 * devices We dont have the separate regions as we have in the small page
573 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
576 static void nand_command_lp(struct mtd_info *mtd, unsigned int command,
577 int column, int page_addr)
579 register struct nand_chip *chip = mtd->priv;
581 /* Emulate NAND_CMD_READOOB */
582 if (command == NAND_CMD_READOOB) {
583 column += mtd->writesize;
584 command = NAND_CMD_READ0;
587 /* Command latch cycle */
588 chip->cmd_ctrl(mtd, command & 0xff,
589 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
591 if (column != -1 || page_addr != -1) {
592 int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE;
594 /* Serially input address */
596 /* Adjust columns for 16 bit buswidth */
597 if (chip->options & NAND_BUSWIDTH_16)
599 chip->cmd_ctrl(mtd, column, ctrl);
600 ctrl &= ~NAND_CTRL_CHANGE;
601 chip->cmd_ctrl(mtd, column >> 8, ctrl);
603 if (page_addr != -1) {
604 chip->cmd_ctrl(mtd, page_addr, ctrl);
605 chip->cmd_ctrl(mtd, page_addr >> 8,
606 NAND_NCE | NAND_ALE);
607 /* One more address cycle for devices > 128MiB */
608 if (chip->chipsize > (128 << 20))
609 chip->cmd_ctrl(mtd, page_addr >> 16,
610 NAND_NCE | NAND_ALE);
613 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
616 * program and erase have their own busy handlers
617 * status, sequential in, and deplete1 need no delay
621 case NAND_CMD_CACHEDPROG:
622 case NAND_CMD_PAGEPROG:
623 case NAND_CMD_ERASE1:
624 case NAND_CMD_ERASE2:
626 case NAND_CMD_STATUS:
627 case NAND_CMD_DEPLETE1:
631 * read error status commands require only a short delay
633 case NAND_CMD_STATUS_ERROR:
634 case NAND_CMD_STATUS_ERROR0:
635 case NAND_CMD_STATUS_ERROR1:
636 case NAND_CMD_STATUS_ERROR2:
637 case NAND_CMD_STATUS_ERROR3:
638 udelay(chip->chip_delay);
644 udelay(chip->chip_delay);
645 chip->cmd_ctrl(mtd, NAND_CMD_STATUS,
646 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
647 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
648 NAND_NCE | NAND_CTRL_CHANGE);
649 while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ;
653 chip->cmd_ctrl(mtd, NAND_CMD_READSTART,
654 NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE);
655 chip->cmd_ctrl(mtd, NAND_CMD_NONE,
656 NAND_NCE | NAND_CTRL_CHANGE);
658 /* This applies to read commands */
661 * If we don't have access to the busy pin, we apply the given
664 if (!chip->dev_ready) {
665 udelay(chip->chip_delay);
670 /* Apply this short delay always to ensure that we do wait tWB in
671 * any case on any machine. */
674 nand_wait_ready(mtd);
678 * nand_get_device - [GENERIC] Get chip for selected access
679 * @this: the nand chip descriptor
680 * @mtd: MTD device structure
681 * @new_state: the state which is requested
683 * Get the device and lock it for exclusive access
686 nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state)
688 spinlock_t *lock = &chip->controller->lock;
689 wait_queue_head_t *wq = &chip->controller->wq;
690 DECLARE_WAITQUEUE(wait, current);
694 /* Hardware controller shared among independend devices */
695 /* Hardware controller shared among independend devices */
696 if (!chip->controller->active)
697 chip->controller->active = chip;
699 if (chip->controller->active == chip && chip->state == FL_READY) {
700 chip->state = new_state;
704 if (new_state == FL_PM_SUSPENDED) {
706 return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
708 set_current_state(TASK_UNINTERRUPTIBLE);
709 add_wait_queue(wq, &wait);
712 remove_wait_queue(wq, &wait);
717 * nand_wait - [DEFAULT] wait until the command is done
718 * @mtd: MTD device structure
719 * @this: NAND chip structure
720 * @state: state to select the max. timeout value
722 * Wait for command done. This applies to erase and program only
723 * Erase can take up to 400ms and program up to 20ms according to
724 * general NAND and SmartMedia specs
727 static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state)
730 unsigned long timeo = jiffies;
733 if (state == FL_ERASING)
734 timeo += (HZ * 400) / 1000;
736 timeo += (HZ * 20) / 1000;
738 led_trigger_event(nand_led_trigger, LED_FULL);
740 /* Apply this short delay always to ensure that we do wait tWB in
741 * any case on any machine. */
744 if ((state == FL_ERASING) && (chip->options & NAND_IS_AND))
745 chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1);
747 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
749 while (time_before(jiffies, timeo)) {
750 /* Check, if we were interrupted */
751 if (chip->state != state)
754 if (chip->dev_ready) {
755 if (chip->dev_ready(mtd))
758 if (chip->read_byte(mtd) & NAND_STATUS_READY)
763 led_trigger_event(nand_led_trigger, LED_OFF);
765 status = (int)chip->read_byte(mtd);
770 * nand_write_page - [GENERIC] write one page
771 * @mtd: MTD device structure
772 * @this: NAND chip structure
773 * @page: startpage inside the chip, must be called with (page & chip->pagemask)
774 * @oob_buf: out of band data buffer
775 * @oobsel: out of band selecttion structre
776 * @cached: 1 = enable cached programming if supported by chip
778 * Nand_page_program function is used for write and writev !
779 * This function will always program a full page of data
780 * If you call it with a non page aligned buffer, you're lost :)
782 * Cached programming is not supported yet.
784 static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, int page,
785 uint8_t *oob_buf, struct nand_oobinfo *oobsel, int cached)
788 uint8_t ecc_code[32];
789 int eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE;
790 int *oob_config = oobsel->eccpos;
791 int datidx = 0, eccidx = 0, eccsteps = chip->ecc.steps;
794 /* FIXME: Enable cached programming */
797 /* Send command to begin auto page programming */
798 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
800 /* Write out complete page of data, take care of eccmode */
802 /* No ecc, write all */
804 printk(KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
805 chip->write_buf(mtd, chip->data_poi, mtd->writesize);
808 /* Software ecc 3/256, write all */
810 for (; eccsteps; eccsteps--) {
811 chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code);
812 for (i = 0; i < 3; i++, eccidx++)
813 oob_buf[oob_config[eccidx]] = ecc_code[i];
814 datidx += chip->ecc.size;
816 chip->write_buf(mtd, chip->data_poi, mtd->writesize);
819 eccbytes = chip->ecc.bytes;
820 for (; eccsteps; eccsteps--) {
821 /* enable hardware ecc logic for write */
822 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
823 chip->write_buf(mtd, &chip->data_poi[datidx], chip->ecc.size);
824 chip->ecc.calculate(mtd, &chip->data_poi[datidx], ecc_code);
825 for (i = 0; i < eccbytes; i++, eccidx++)
826 oob_buf[oob_config[eccidx]] = ecc_code[i];
827 /* If the hardware ecc provides syndromes then
828 * the ecc code must be written immidiately after
829 * the data bytes (words) */
830 if (chip->options & NAND_HWECC_SYNDROME)
831 chip->write_buf(mtd, ecc_code, eccbytes);
832 datidx += chip->ecc.size;
837 /* Write out OOB data */
838 if (chip->options & NAND_HWECC_SYNDROME)
839 chip->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
841 chip->write_buf(mtd, oob_buf, mtd->oobsize);
843 /* Send command to actually program the data */
844 chip->cmdfunc(mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
847 /* call wait ready function */
848 status = chip->waitfunc(mtd, chip, FL_WRITING);
850 /* See if operation failed and additional status checks are available */
851 if ((status & NAND_STATUS_FAIL) && (chip->errstat)) {
852 status = chip->errstat(mtd, chip, FL_WRITING, status, page);
855 /* See if device thinks it succeeded */
856 if (status & NAND_STATUS_FAIL) {
857 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
861 /* FIXME: Implement cached programming ! */
862 /* wait until cache is ready */
863 // status = chip->waitfunc (mtd, this, FL_CACHEDRPG);
868 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
870 * nand_verify_pages - [GENERIC] verify the chip contents after a write
871 * @mtd: MTD device structure
872 * @this: NAND chip structure
873 * @page: startpage inside the chip, must be called with (page & chip->pagemask)
874 * @numpages: number of pages to verify
875 * @oob_buf: out of band data buffer
876 * @oobsel: out of band selecttion structre
877 * @chipnr: number of the current chip
878 * @oobmode: 1 = full buffer verify, 0 = ecc only
880 * The NAND device assumes that it is always writing to a cleanly erased page.
881 * Hence, it performs its internal write verification only on bits that
882 * transitioned from 1 to 0. The device does NOT verify the whole page on a
883 * byte by byte basis. It is possible that the page was not completely erased
884 * or the page is becoming unusable due to wear. The read with ECC would catch
885 * the error later when the ECC page check fails, but we would rather catch
886 * it early in the page write stage. Better to write no data than invalid data.
888 static int nand_verify_pages(struct mtd_info *mtd, struct nand_chip *chip, int page, int numpages,
889 uint8_t *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
891 int i, j, datidx = 0, oobofs = 0, res = -EIO;
892 int eccsteps = chip->eccsteps;
896 hweccbytes = (chip->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
898 /* Send command to read back the first page */
899 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
902 for (j = 0; j < eccsteps; j++) {
903 /* Loop through and verify the data */
904 if (chip->verify_buf(mtd, &chip->data_poi[datidx], mtd->eccsize)) {
905 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
908 datidx += mtd->eccsize;
909 /* Have we a hw generator layout ? */
912 if (chip->verify_buf(mtd, &chip->oob_buf[oobofs], hweccbytes)) {
913 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
916 oobofs += hweccbytes;
919 /* check, if we must compare all data or if we just have to
920 * compare the ecc bytes
923 if (chip->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
924 DEBUG(MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
928 /* Read always, else autoincrement fails */
929 chip->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
931 if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
932 int ecccnt = oobsel->eccbytes;
934 for (i = 0; i < ecccnt; i++) {
935 int idx = oobsel->eccpos[i];
936 if (oobdata[idx] != oob_buf[oobofs + idx]) {
937 DEBUG(MTD_DEBUG_LEVEL0, "%s: Failed ECC write verify, page 0x%08x, %6i bytes were succesful\n",
938 __FUNCTION__, page, i);
944 oobofs += mtd->oobsize - hweccbytes * eccsteps;
948 /* Apply delay or wait for ready/busy pin
949 * Do this before the AUTOINCR check, so no problems
950 * arise if a chip which does auto increment
951 * is marked as NOAUTOINCR by the board driver.
952 * Do this also before returning, so the chip is
953 * ready for the next command.
955 if (!chip->dev_ready)
956 udelay(chip->chip_delay);
958 nand_wait_ready(mtd);
960 /* All done, return happy */
964 /* Check, if the chip supports auto page increment */
965 if (!NAND_CANAUTOINCR(this))
966 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
969 * Terminate the read command. We come here in case of an error
970 * So we must issue a reset command.
973 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
979 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
980 * @mtd: MTD device structure
981 * @from: offset to read from
982 * @len: number of bytes to read
983 * @retlen: pointer to variable to store the number of read bytes
984 * @buf: the databuffer to put data
986 * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
989 static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf)
991 return nand_do_read_ecc(mtd, from, len, retlen, buf, NULL, &mtd->oobinfo, 0xff);
995 * nand_do_read_ecc - [MTD Interface] Read data with ECC
996 * @mtd: MTD device structure
997 * @from: offset to read from
998 * @len: number of bytes to read
999 * @retlen: pointer to variable to store the number of read bytes
1000 * @buf: the databuffer to put data
1001 * @oob_buf: filesystem supplied oob data buffer (can be NULL)
1002 * @oobsel: oob selection structure
1003 * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
1004 * and how many corrected error bits are acceptable:
1005 * bits 0..7 - number of tolerable errors
1006 * bit 8 - 0 == do not get/release chip, 1 == get/release chip
1008 * NAND read with ECC
1010 int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
1011 size_t *retlen, uint8_t *buf, uint8_t *oob_buf, struct nand_oobinfo *oobsel, int flags)
1014 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
1015 int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
1016 struct nand_chip *chip = mtd->priv;
1017 uint8_t *data_poi, *oob_data = oob_buf;
1018 uint8_t ecc_calc[32];
1019 uint8_t ecc_code[32];
1020 int eccmode, eccsteps;
1021 int *oob_config, datidx;
1022 int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1027 DEBUG(MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
1029 /* Do not allow reads past end of device */
1030 if ((from + len) > mtd->size) {
1031 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
1036 /* Grab the lock and see if the device is available */
1037 if (flags & NAND_GET_DEVICE)
1038 nand_get_device(chip, mtd, FL_READING);
1040 /* Autoplace of oob data ? Use the default placement scheme */
1041 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1042 oobsel = chip->autooob;
1044 eccmode = oobsel->useecc ? chip->ecc.mode : NAND_ECC_NONE;
1045 oob_config = oobsel->eccpos;
1047 /* Select the NAND device */
1048 chipnr = (int)(from >> chip->chip_shift);
1049 chip->select_chip(mtd, chipnr);
1051 /* First we calculate the starting page */
1052 realpage = (int)(from >> chip->page_shift);
1053 page = realpage & chip->pagemask;
1055 /* Get raw starting column */
1056 col = from & (mtd->writesize - 1);
1058 end = mtd->writesize;
1059 ecc = chip->ecc.size;
1060 eccbytes = chip->ecc.bytes;
1062 if ((eccmode == NAND_ECC_NONE) || (chip->options & NAND_HWECC_SYNDROME))
1065 oobreadlen = mtd->oobsize;
1066 if (chip->options & NAND_HWECC_SYNDROME)
1067 oobreadlen -= oobsel->eccbytes;
1069 /* Loop until all data read */
1070 while (read < len) {
1072 int aligned = (!col && (len - read) >= end);
1074 * If the read is not page aligned, we have to read into data buffer
1075 * due to ecc, else we read into return buffer direct
1078 data_poi = &buf[read];
1080 data_poi = chip->data_buf;
1082 /* Check, if we have this page in the buffer
1084 * FIXME: Make it work when we must provide oob data too,
1085 * check the usage of data_buf oob field
1087 if (realpage == chip->pagebuf && !oob_buf) {
1088 /* aligned read ? */
1090 memcpy(data_poi, chip->data_buf, end);
1094 /* Check, if we must send the read command */
1096 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
1100 /* get oob area, if we have no oob buffer from fs-driver */
1101 if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
1102 oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
1103 oob_data = &chip->data_buf[end];
1105 eccsteps = chip->ecc.steps;
1108 case NAND_ECC_NONE:{
1109 /* No ECC, Read in a page */
1110 static unsigned long lastwhinge = 0;
1111 if ((lastwhinge / HZ) != (jiffies / HZ)) {
1113 "Reading data from NAND FLASH without ECC is not recommended\n");
1114 lastwhinge = jiffies;
1116 chip->read_buf(mtd, data_poi, end);
1120 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
1121 chip->read_buf(mtd, data_poi, end);
1122 for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc)
1123 chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
1127 for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) {
1128 chip->ecc.hwctl(mtd, NAND_ECC_READ);
1129 chip->read_buf(mtd, &data_poi[datidx], ecc);
1131 /* HW ecc with syndrome calculation must read the
1132 * syndrome from flash immidiately after the data */
1134 /* Some hw ecc generators need to know when the
1135 * syndrome is read from flash */
1136 chip->ecc.hwctl(mtd, NAND_ECC_READSYN);
1137 chip->read_buf(mtd, &oob_data[i], eccbytes);
1138 /* We calc error correction directly, it checks the hw
1139 * generator for an error, reads back the syndrome and
1140 * does the error correction on the fly */
1141 ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
1142 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1143 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: "
1144 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
1148 chip->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
1155 chip->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
1157 /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
1161 /* Pick the ECC bytes out of the oob data */
1162 for (j = 0; j < oobsel->eccbytes; j++)
1163 ecc_code[j] = oob_data[oob_config[j]];
1165 /* correct data, if necessary */
1166 for (i = 0, j = 0, datidx = 0; i < chip->ecc.steps; i++, datidx += ecc) {
1167 ecc_status = chip->ecc.correct(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
1169 /* Get next chunk of ecc bytes */
1172 /* Check, if we have a fs supplied oob-buffer,
1173 * This is the legacy mode. Used by YAFFS1
1174 * Should go away some day
1176 if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
1177 int *p = (int *)(&oob_data[mtd->oobsize]);
1181 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1182 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
1188 /* check, if we have a fs supplied oob-buffer */
1190 /* without autoplace. Legacy mode used by YAFFS1 */
1191 switch (oobsel->useecc) {
1192 case MTD_NANDECC_AUTOPLACE:
1193 case MTD_NANDECC_AUTOPL_USR:
1194 /* Walk through the autoplace chunks */
1195 for (i = 0; oobsel->oobfree[i][1]; i++) {
1196 int from = oobsel->oobfree[i][0];
1197 int num = oobsel->oobfree[i][1];
1198 memcpy(&oob_buf[oob], &oob_data[from], num);
1202 case MTD_NANDECC_PLACE:
1203 /* YAFFS1 legacy mode */
1204 oob_data += chip->ecc.steps * sizeof(int);
1206 oob_data += mtd->oobsize;
1210 /* Partial page read, transfer data into fs buffer */
1212 for (j = col; j < end && read < len; j++)
1213 buf[read++] = data_poi[j];
1214 chip->pagebuf = realpage;
1216 read += mtd->writesize;
1218 /* Apply delay or wait for ready/busy pin
1219 * Do this before the AUTOINCR check, so no problems
1220 * arise if a chip which does auto increment
1221 * is marked as NOAUTOINCR by the board driver.
1223 if (!chip->dev_ready)
1224 udelay(chip->chip_delay);
1226 nand_wait_ready(mtd);
1231 /* For subsequent reads align to page boundary. */
1233 /* Increment page address */
1236 page = realpage & chip->pagemask;
1237 /* Check, if we cross a chip boundary */
1240 chip->select_chip(mtd, -1);
1241 chip->select_chip(mtd, chipnr);
1243 /* Check, if the chip supports auto page increment
1244 * or if we have hit a block boundary.
1246 if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck))
1250 /* Deselect and wake up anyone waiting on the device */
1251 if (flags & NAND_GET_DEVICE)
1252 nand_release_device(mtd);
1255 * Return success, if no ECC failures, else -EBADMSG
1256 * fs driver will take care of that, because
1257 * retlen == desired len and result == -EBADMSG
1260 return ecc_failed ? -EBADMSG : 0;
1264 * nand_read_oob - [MTD Interface] NAND read out-of-band
1265 * @mtd: MTD device structure
1266 * @from: offset to read from
1267 * @len: number of bytes to read
1268 * @retlen: pointer to variable to store the number of read bytes
1269 * @buf: the databuffer to put data
1271 * NAND read out-of-band data from the spare area
1273 static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, uint8_t *buf)
1275 int i, col, page, chipnr;
1276 struct nand_chip *chip = mtd->priv;
1277 int blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1279 DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int)from, (int)len);
1281 /* Shift to get page */
1282 page = (int)(from >> chip->page_shift);
1283 chipnr = (int)(from >> chip->chip_shift);
1285 /* Mask to get column */
1286 col = from & (mtd->oobsize - 1);
1288 /* Initialize return length value */
1291 /* Do not allow reads past end of device */
1292 if ((from + len) > mtd->size) {
1293 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
1298 /* Grab the lock and see if the device is available */
1299 nand_get_device(chip, mtd, FL_READING);
1301 /* Select the NAND device */
1302 chip->select_chip(mtd, chipnr);
1304 /* Send the read command */
1305 chip->cmdfunc(mtd, NAND_CMD_READOOB, col, page & chip->pagemask);
1307 * Read the data, if we read more than one page
1308 * oob data, let the device transfer the data !
1312 int thislen = mtd->oobsize - col;
1313 thislen = min_t(int, thislen, len);
1314 chip->read_buf(mtd, &buf[i], thislen);
1322 /* Check, if we cross a chip boundary */
1323 if (!(page & chip->pagemask)) {
1325 chip->select_chip(mtd, -1);
1326 chip->select_chip(mtd, chipnr);
1329 /* Apply delay or wait for ready/busy pin
1330 * Do this before the AUTOINCR check, so no problems
1331 * arise if a chip which does auto increment
1332 * is marked as NOAUTOINCR by the board driver.
1334 if (!chip->dev_ready)
1335 udelay(chip->chip_delay);
1337 nand_wait_ready(mtd);
1339 /* Check, if the chip supports auto page increment
1340 * or if we have hit a block boundary.
1342 if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) {
1343 /* For subsequent page reads set offset to 0 */
1344 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0x0, page & chip->pagemask);
1349 /* Deselect and wake up anyone waiting on the device */
1350 nand_release_device(mtd);
1358 * nand_read_raw - [GENERIC] Read raw data including oob into buffer
1359 * @mtd: MTD device structure
1360 * @buf: temporary buffer
1361 * @from: offset to read from
1362 * @len: number of bytes to read
1363 * @ooblen: number of oob data bytes to read
1365 * Read raw data including oob into buffer
1367 int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len,
1370 struct nand_chip *chip = mtd->priv;
1371 int page = (int)(from >> chip->page_shift);
1372 int chipnr = (int)(from >> chip->chip_shift);
1375 int pagesize = mtd->writesize + mtd->oobsize;
1378 /* Do not allow reads past end of device */
1379 if ((from + len) > mtd->size) {
1380 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: "
1381 "Attempt read beyond end of device\n");
1385 /* Grab the lock and see if the device is available */
1386 nand_get_device(chip, mtd, FL_READING);
1388 chip->select_chip(mtd, chipnr);
1390 /* Add requested oob length */
1392 blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1;
1396 chip->cmdfunc(mtd, NAND_CMD_READ0, 0,
1397 page & chip->pagemask);
1400 chip->read_buf(mtd, &buf[cnt], pagesize);
1406 if (!chip->dev_ready)
1407 udelay(chip->chip_delay);
1409 nand_wait_ready(mtd);
1412 * Check, if the chip supports auto page increment or if we
1413 * cross a block boundary.
1415 if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck))
1419 /* Deselect and wake up anyone waiting on the device */
1420 nand_release_device(mtd);
1425 * nand_write_raw - [GENERIC] Write raw data including oob
1426 * @mtd: MTD device structure
1427 * @buf: source buffer
1428 * @to: offset to write to
1429 * @len: number of bytes to write
1430 * @buf: source buffer
1433 * Write raw data including oob
1435 int nand_write_raw(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
1436 uint8_t *buf, uint8_t *oob)
1438 struct nand_chip *chip = mtd->priv;
1439 int page = (int)(to >> chip->page_shift);
1440 int chipnr = (int)(to >> chip->chip_shift);
1445 /* Do not allow writes past end of device */
1446 if ((to + len) > mtd->size) {
1447 DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt write "
1448 "beyond end of device\n");
1452 /* Grab the lock and see if the device is available */
1453 nand_get_device(chip, mtd, FL_WRITING);
1455 chip->select_chip(mtd, chipnr);
1456 chip->data_poi = buf;
1458 while (len != *retlen) {
1459 ret = nand_write_page(mtd, chip, page, oob, &mtd->oobinfo, 0);
1463 *retlen += mtd->writesize;
1464 chip->data_poi += mtd->writesize;
1465 oob += mtd->oobsize;
1468 /* Deselect and wake up anyone waiting on the device */
1469 nand_release_device(mtd);
1472 EXPORT_SYMBOL_GPL(nand_write_raw);
1475 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
1476 * @mtd: MTD device structure
1477 * @fsbuf: buffer given by fs driver
1478 * @oobsel: out of band selection structre
1479 * @autoplace: 1 = place given buffer into the oob bytes
1480 * @numpages: number of pages to prepare
1483 * 1. Filesystem buffer available and autoplacement is off,
1484 * return filesystem buffer
1485 * 2. No filesystem buffer or autoplace is off, return internal
1487 * 3. Filesystem buffer is given and autoplace selected
1488 * put data from fs buffer into internal buffer and
1489 * retrun internal buffer
1491 * Note: The internal buffer is filled with 0xff. This must
1492 * be done only once, when no autoplacement happens
1493 * Autoplacement sets the buffer dirty flag, which
1494 * forces the 0xff fill before using the buffer again.
1497 static uint8_t *nand_prepare_oobbuf(struct mtd_info *mtd, uint8_t *fsbuf, struct nand_oobinfo *oobsel,
1498 int autoplace, int numpages)
1500 struct nand_chip *chip = mtd->priv;
1503 /* Zero copy fs supplied buffer */
1504 if (fsbuf && !autoplace)
1507 /* Check, if the buffer must be filled with ff again */
1508 if (chip->oobdirty) {
1509 memset(chip->oob_buf, 0xff, mtd->oobsize << (chip->phys_erase_shift - chip->page_shift));
1513 /* If we have no autoplacement or no fs buffer use the internal one */
1514 if (!autoplace || !fsbuf)
1515 return chip->oob_buf;
1517 /* Walk through the pages and place the data */
1520 while (numpages--) {
1521 for (i = 0, len = 0; len < mtd->oobavail; i++) {
1522 int to = ofs + oobsel->oobfree[i][0];
1523 int num = oobsel->oobfree[i][1];
1524 memcpy(&chip->oob_buf[to], fsbuf, num);
1528 ofs += mtd->oobavail;
1530 return chip->oob_buf;
1533 #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
1536 * nand_write - [MTD Interface] NAND write with ECC
1537 * @mtd: MTD device structure
1538 * @to: offset to write to
1539 * @len: number of bytes to write
1540 * @retlen: pointer to variable to store the number of written bytes
1541 * @buf: the data to write
1543 * NAND write with ECC
1545 static int nand_write(struct mtd_info *mtd, loff_t to, size_t len,
1546 size_t *retlen, const uint8_t *buf)
1548 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
1549 int autoplace = 0, numpages, totalpages;
1550 struct nand_chip *chip = mtd->priv;
1551 uint8_t *oobbuf, *bufstart, *eccbuf = NULL;
1552 int ppblock = (1 << (chip->phys_erase_shift - chip->page_shift));
1553 struct nand_oobinfo *oobsel = &mtd->oobinfo;
1555 DEBUG(MTD_DEBUG_LEVEL3, "nand_write: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
1557 /* Initialize retlen, in case of early exit */
1560 /* Do not allow write past end of device */
1561 if ((to + len) > mtd->size) {
1562 DEBUG(MTD_DEBUG_LEVEL0, "nand_write: Attempt to write past end of page\n");
1566 /* reject writes, which are not page aligned */
1567 if (NOTALIGNED(to) || NOTALIGNED(len)) {
1568 printk(KERN_NOTICE "nand_write: Attempt to write not page aligned data\n");
1572 /* Grab the lock and see if the device is available */
1573 nand_get_device(chip, mtd, FL_WRITING);
1575 /* Calculate chipnr */
1576 chipnr = (int)(to >> chip->chip_shift);
1577 /* Select the NAND device */
1578 chip->select_chip(mtd, chipnr);
1580 /* Check, if it is write protected */
1581 if (nand_check_wp(mtd))
1584 /* Autoplace of oob data ? Use the default placement scheme */
1585 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1586 oobsel = chip->autooob;
1589 if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
1592 /* Setup variables and oob buffer */
1593 totalpages = len >> chip->page_shift;
1594 page = (int)(to >> chip->page_shift);
1595 /* Invalidate the page cache, if we write to the cached page */
1596 if (page <= chip->pagebuf && chip->pagebuf < (page + totalpages))
1599 /* Set it relative to chip */
1600 page &= chip->pagemask;
1602 /* Calc number of pages we can write in one go */
1603 numpages = min(ppblock - (startpage & (ppblock - 1)), totalpages);
1604 oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
1605 bufstart = (uint8_t *) buf;
1607 /* Loop until all data is written */
1608 while (written < len) {
1610 chip->data_poi = (uint8_t *) &buf[written];
1611 /* Write one page. If this is the last page to write
1612 * or the last page in this block, then use the
1613 * real pageprogram command, else select cached programming
1614 * if supported by the chip.
1616 ret = nand_write_page(mtd, chip, page, &oobbuf[oob], oobsel, (--numpages > 0));
1618 DEBUG(MTD_DEBUG_LEVEL0, "nand_write: write_page failed %d\n", ret);
1622 oob += mtd->oobsize;
1623 /* Update written bytes count */
1624 written += mtd->writesize;
1628 /* Increment page address */
1631 /* Have we hit a block boundary ? Then we have to verify and
1632 * if verify is ok, we have to setup the oob buffer for
1635 if (!(page & (ppblock - 1))) {
1637 chip->data_poi = bufstart;
1638 ret = nand_verify_pages(mtd, this, startpage, page - startpage,
1639 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1641 DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret);
1646 ofs = autoplace ? mtd->oobavail : mtd->oobsize;
1648 eccbuf += (page - startpage) * ofs;
1649 totalpages -= page - startpage;
1650 numpages = min(totalpages, ppblock);
1651 page &= chip->pagemask;
1653 oobbuf = nand_prepare_oobbuf(mtd, eccbuf, oobsel, autoplace, numpages);
1655 /* Check, if we cross a chip boundary */
1658 chip->select_chip(mtd, -1);
1659 chip->select_chip(mtd, chipnr);
1663 /* Verify the remaining pages */
1665 chip->data_poi = bufstart;
1666 ret = nand_verify_pages(mtd, this, startpage, totalpages, oobbuf, oobsel, chipnr, (eccbuf != NULL));
1670 DEBUG(MTD_DEBUG_LEVEL0, "nand_write: verify_pages failed %d\n", ret);
1673 /* Deselect and wake up anyone waiting on the device */
1674 nand_release_device(mtd);
1680 * nand_write_oob - [MTD Interface] NAND write out-of-band
1681 * @mtd: MTD device structure
1682 * @to: offset to write to
1683 * @len: number of bytes to write
1684 * @retlen: pointer to variable to store the number of written bytes
1685 * @buf: the data to write
1687 * NAND write out-of-band
1689 static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const uint8_t *buf)
1691 int column, page, status, ret = -EIO, chipnr;
1692 struct nand_chip *chip = mtd->priv;
1694 DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int)to, (int)len);
1696 /* Shift to get page */
1697 page = (int)(to >> chip->page_shift);
1698 chipnr = (int)(to >> chip->chip_shift);
1700 /* Mask to get column */
1701 column = to & (mtd->oobsize - 1);
1703 /* Initialize return length value */
1706 /* Do not allow write past end of page */
1707 if ((column + len) > mtd->oobsize) {
1708 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
1712 /* Grab the lock and see if the device is available */
1713 nand_get_device(chip, mtd, FL_WRITING);
1715 /* Select the NAND device */
1716 chip->select_chip(mtd, chipnr);
1718 /* Reset the chip. Some chips (like the Toshiba TC5832DC found
1719 in one of my DiskOnChip 2000 test units) will clear the whole
1720 data page too if we don't do this. I have no clue why, but
1721 I seem to have 'fixed' it in the doc2000 driver in
1722 August 1999. dwmw2. */
1723 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1725 /* Check, if it is write protected */
1726 if (nand_check_wp(mtd))
1729 /* Invalidate the page cache, if we write to the cached page */
1730 if (page == chip->pagebuf)
1733 if (NAND_MUST_PAD(chip)) {
1734 /* Write out desired data */
1735 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page & chip->pagemask);
1736 /* prepad 0xff for partial programming */
1737 chip->write_buf(mtd, ffchars, column);
1739 chip->write_buf(mtd, buf, len);
1740 /* postpad 0xff for partial programming */
1741 chip->write_buf(mtd, ffchars, mtd->oobsize - (len + column));
1743 /* Write out desired data */
1744 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + column, page & chip->pagemask);
1746 chip->write_buf(mtd, buf, len);
1748 /* Send command to program the OOB data */
1749 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1751 status = chip->waitfunc(mtd, chip, FL_WRITING);
1753 /* See if device thinks it succeeded */
1754 if (status & NAND_STATUS_FAIL) {
1755 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
1762 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1763 /* Send command to read back the data */
1764 chip->cmdfunc(mtd, NAND_CMD_READOOB, column, page & chip->pagemask);
1766 if (chip->verify_buf(mtd, buf, len)) {
1767 DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
1774 /* Deselect and wake up anyone waiting on the device */
1775 nand_release_device(mtd);
1781 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1782 * @mtd: MTD device structure
1783 * @page: the page address of the block which will be erased
1785 * Standard erase command for NAND chips
1787 static void single_erase_cmd(struct mtd_info *mtd, int page)
1789 struct nand_chip *chip = mtd->priv;
1790 /* Send commands to erase a block */
1791 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1792 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1796 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1797 * @mtd: MTD device structure
1798 * @page: the page address of the block which will be erased
1800 * AND multi block erase command function
1801 * Erase 4 consecutive blocks
1803 static void multi_erase_cmd(struct mtd_info *mtd, int page)
1805 struct nand_chip *chip = mtd->priv;
1806 /* Send commands to erase a block */
1807 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
1808 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
1809 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++);
1810 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1811 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1815 * nand_erase - [MTD Interface] erase block(s)
1816 * @mtd: MTD device structure
1817 * @instr: erase instruction
1819 * Erase one ore more blocks
1821 static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
1823 return nand_erase_nand(mtd, instr, 0);
1826 #define BBT_PAGE_MASK 0xffffff3f
1828 * nand_erase_nand - [Internal] erase block(s)
1829 * @mtd: MTD device structure
1830 * @instr: erase instruction
1831 * @allowbbt: allow erasing the bbt area
1833 * Erase one ore more blocks
1835 int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
1838 int page, len, status, pages_per_block, ret, chipnr;
1839 struct nand_chip *chip = mtd->priv;
1840 int rewrite_bbt[NAND_MAX_CHIPS]={0};
1841 unsigned int bbt_masked_page = 0xffffffff;
1843 DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n",
1844 (unsigned int)instr->addr, (unsigned int)instr->len);
1846 /* Start address must align on block boundary */
1847 if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) {
1848 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
1852 /* Length must align on block boundary */
1853 if (instr->len & ((1 << chip->phys_erase_shift) - 1)) {
1854 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: "
1855 "Length not block aligned\n");
1859 /* Do not allow erase past end of device */
1860 if ((instr->len + instr->addr) > mtd->size) {
1861 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: "
1862 "Erase past end of device\n");
1866 instr->fail_addr = 0xffffffff;
1868 /* Grab the lock and see if the device is available */
1869 nand_get_device(chip, mtd, FL_ERASING);
1871 /* Shift to get first page */
1872 page = (int)(instr->addr >> chip->page_shift);
1873 chipnr = (int)(instr->addr >> chip->chip_shift);
1875 /* Calculate pages in each block */
1876 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift);
1878 /* Select the NAND device */
1879 chip->select_chip(mtd, chipnr);
1881 /* Check, if it is write protected */
1882 if (nand_check_wp(mtd)) {
1883 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: "
1884 "Device is write protected!!!\n");
1885 instr->state = MTD_ERASE_FAILED;
1890 * If BBT requires refresh, set the BBT page mask to see if the BBT
1891 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1892 * can not be matched. This is also done when the bbt is actually
1893 * erased to avoid recusrsive updates
1895 if (chip->options & BBT_AUTO_REFRESH && !allowbbt)
1896 bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
1898 /* Loop through the pages */
1901 instr->state = MTD_ERASING;
1905 * heck if we have a bad block, we do not erase bad blocks !
1907 if (nand_block_checkbad(mtd, ((loff_t) page) <<
1908 chip->page_shift, 0, allowbbt)) {
1909 printk(KERN_WARNING "nand_erase: attempt to erase a "
1910 "bad block at page 0x%08x\n", page);
1911 instr->state = MTD_ERASE_FAILED;
1916 * Invalidate the page cache, if we erase the block which
1917 * contains the current cached page
1919 if (page <= chip->pagebuf && chip->pagebuf <
1920 (page + pages_per_block))
1923 chip->erase_cmd(mtd, page & chip->pagemask);
1925 status = chip->waitfunc(mtd, chip, FL_ERASING);
1928 * See if operation failed and additional status checks are
1931 if ((status & NAND_STATUS_FAIL) && (chip->errstat))
1932 status = chip->errstat(mtd, chip, FL_ERASING,
1935 /* See if block erase succeeded */
1936 if (status & NAND_STATUS_FAIL) {
1937 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: "
1938 "Failed erase, page 0x%08x\n", page);
1939 instr->state = MTD_ERASE_FAILED;
1940 instr->fail_addr = (page << chip->page_shift);
1945 * If BBT requires refresh, set the BBT rewrite flag to the
1948 if (bbt_masked_page != 0xffffffff &&
1949 (page & BBT_PAGE_MASK) == bbt_masked_page)
1950 rewrite_bbt[chipnr] = (page << chip->page_shift);
1952 /* Increment page address and decrement length */
1953 len -= (1 << chip->phys_erase_shift);
1954 page += pages_per_block;
1956 /* Check, if we cross a chip boundary */
1957 if (len && !(page & chip->pagemask)) {
1959 chip->select_chip(mtd, -1);
1960 chip->select_chip(mtd, chipnr);
1963 * If BBT requires refresh and BBT-PERCHIP, set the BBT
1964 * page mask to see if this BBT should be rewritten
1966 if (bbt_masked_page != 0xffffffff &&
1967 (chip->bbt_td->options & NAND_BBT_PERCHIP))
1968 bbt_masked_page = chip->bbt_td->pages[chipnr] &
1972 instr->state = MTD_ERASE_DONE;
1976 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1977 /* Do call back function */
1979 mtd_erase_callback(instr);
1981 /* Deselect and wake up anyone waiting on the device */
1982 nand_release_device(mtd);
1985 * If BBT requires refresh and erase was successful, rewrite any
1986 * selected bad block tables
1988 if (bbt_masked_page == 0xffffffff || ret)
1991 for (chipnr = 0; chipnr < chip->numchips; chipnr++) {
1992 if (!rewrite_bbt[chipnr])
1994 /* update the BBT for chip */
1995 DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
1996 "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
1997 chip->bbt_td->pages[chipnr]);
1998 nand_update_bbt(mtd, rewrite_bbt[chipnr]);
2001 /* Return more or less happy */
2006 * nand_sync - [MTD Interface] sync
2007 * @mtd: MTD device structure
2009 * Sync is actually a wait for chip ready function
2011 static void nand_sync(struct mtd_info *mtd)
2013 struct nand_chip *chip = mtd->priv;
2015 DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n");
2017 /* Grab the lock and see if the device is available */
2018 nand_get_device(chip, mtd, FL_SYNCING);
2019 /* Release it and go back */
2020 nand_release_device(mtd);
2024 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2025 * @mtd: MTD device structure
2026 * @ofs: offset relative to mtd start
2028 static int nand_block_isbad(struct mtd_info *mtd, loff_t offs)
2030 /* Check for invalid offset */
2031 if (offs > mtd->size)
2034 return nand_block_checkbad(mtd, offs, 1, 0);
2038 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2039 * @mtd: MTD device structure
2040 * @ofs: offset relative to mtd start
2042 static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2044 struct nand_chip *chip = mtd->priv;
2047 if ((ret = nand_block_isbad(mtd, ofs))) {
2048 /* If it was bad already, return success and do nothing. */
2054 return chip->block_markbad(mtd, ofs);
2058 * nand_suspend - [MTD Interface] Suspend the NAND flash
2059 * @mtd: MTD device structure
2061 static int nand_suspend(struct mtd_info *mtd)
2063 struct nand_chip *chip = mtd->priv;
2065 return nand_get_device(chip, mtd, FL_PM_SUSPENDED);
2069 * nand_resume - [MTD Interface] Resume the NAND flash
2070 * @mtd: MTD device structure
2072 static void nand_resume(struct mtd_info *mtd)
2074 struct nand_chip *chip = mtd->priv;
2076 if (chip->state == FL_PM_SUSPENDED)
2077 nand_release_device(mtd);
2079 printk(KERN_ERR "nand_resume() called for a chip which is not "
2080 "in suspended state\n");
2084 * Free allocated data structures
2086 static void nand_free_kmem(struct nand_chip *chip)
2088 /* Buffer allocated by nand_scan ? */
2089 if (chip->options & NAND_OOBBUF_ALLOC)
2090 kfree(chip->oob_buf);
2091 /* Buffer allocated by nand_scan ? */
2092 if (chip->options & NAND_DATABUF_ALLOC)
2093 kfree(chip->data_buf);
2094 /* Controller allocated by nand_scan ? */
2095 if (chip->options & NAND_CONTROLLER_ALLOC)
2096 kfree(chip->controller);
2100 * Allocate buffers and data structures
2102 static int nand_allocate_kmem(struct mtd_info *mtd, struct nand_chip *chip)
2106 if (!chip->oob_buf) {
2107 len = mtd->oobsize <<
2108 (chip->phys_erase_shift - chip->page_shift);
2109 chip->oob_buf = kmalloc(len, GFP_KERNEL);
2112 chip->options |= NAND_OOBBUF_ALLOC;
2115 if (!chip->data_buf) {
2116 len = mtd->writesize + mtd->oobsize;
2117 chip->data_buf = kmalloc(len, GFP_KERNEL);
2118 if (!chip->data_buf)
2120 chip->options |= NAND_DATABUF_ALLOC;
2123 if (!chip->controller) {
2124 chip->controller = kzalloc(sizeof(struct nand_hw_control),
2126 if (!chip->controller)
2128 chip->options |= NAND_CONTROLLER_ALLOC;
2133 printk(KERN_ERR "nand_scan(): Cannot allocate buffers\n");
2134 nand_free_kmem(chip);
2139 * Set default functions
2141 static void nand_set_defaults(struct nand_chip *chip, int busw)
2143 /* check for proper chip_delay setup, set 20us if not */
2144 if (!chip->chip_delay)
2145 chip->chip_delay = 20;
2147 /* check, if a user supplied command function given */
2148 if (chip->cmdfunc == NULL)
2149 chip->cmdfunc = nand_command;
2151 /* check, if a user supplied wait function given */
2152 if (chip->waitfunc == NULL)
2153 chip->waitfunc = nand_wait;
2155 if (!chip->select_chip)
2156 chip->select_chip = nand_select_chip;
2157 if (!chip->read_byte)
2158 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2159 if (!chip->read_word)
2160 chip->read_word = nand_read_word;
2161 if (!chip->block_bad)
2162 chip->block_bad = nand_block_bad;
2163 if (!chip->block_markbad)
2164 chip->block_markbad = nand_default_block_markbad;
2165 if (!chip->write_buf)
2166 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2167 if (!chip->read_buf)
2168 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2169 if (!chip->verify_buf)
2170 chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2171 if (!chip->scan_bbt)
2172 chip->scan_bbt = nand_default_bbt;
2176 * Get the flash and manufacturer id and lookup if the type is supported
2178 static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
2179 struct nand_chip *chip,
2180 int busw, int *maf_id)
2182 struct nand_flash_dev *type = NULL;
2183 int i, dev_id, maf_idx;
2185 /* Select the device */
2186 chip->select_chip(mtd, 0);
2188 /* Send the command for reading device ID */
2189 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2191 /* Read manufacturer and device IDs */
2192 *maf_id = chip->read_byte(mtd);
2193 dev_id = chip->read_byte(mtd);
2195 /* Lookup the flash id */
2196 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
2197 if (dev_id == nand_flash_ids[i].id) {
2198 type = &nand_flash_ids[i];
2204 return ERR_PTR(-ENODEV);
2206 chip->chipsize = nand_flash_ids[i].chipsize << 20;
2208 /* Newer devices have all the information in additional id bytes */
2209 if (!nand_flash_ids[i].pagesize) {
2211 /* The 3rd id byte contains non relevant data ATM */
2212 extid = chip->read_byte(mtd);
2213 /* The 4th id byte is the important one */
2214 extid = chip->read_byte(mtd);
2216 mtd->writesize = 1024 << (extid & 0x3);
2219 mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9);
2221 /* Calc blocksize. Blocksize is multiples of 64KiB */
2222 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2224 /* Get buswidth information */
2225 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2229 * Old devices have chip data hardcoded in the device id table
2231 mtd->erasesize = nand_flash_ids[i].erasesize;
2232 mtd->writesize = nand_flash_ids[i].pagesize;
2233 mtd->oobsize = mtd->writesize / 32;
2234 busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
2237 /* Try to identify manufacturer */
2238 for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) {
2239 if (nand_manuf_ids[maf_idx].id == *maf_id)
2244 * Check, if buswidth is correct. Hardware drivers should set
2247 if (busw != (chip->options & NAND_BUSWIDTH_16)) {
2248 printk(KERN_INFO "NAND device: Manufacturer ID:"
2249 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id,
2250 dev_id, nand_manuf_ids[maf_idx].name, mtd->name);
2251 printk(KERN_WARNING "NAND bus width %d instead %d bit\n",
2252 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8,
2254 return ERR_PTR(-EINVAL);
2257 /* Calculate the address shift from the page size */
2258 chip->page_shift = ffs(mtd->writesize) - 1;
2259 /* Convert chipsize to number of pages per chip -1. */
2260 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2262 chip->bbt_erase_shift = chip->phys_erase_shift =
2263 ffs(mtd->erasesize) - 1;
2264 chip->chip_shift = ffs(chip->chipsize) - 1;
2266 /* Set the bad block position */
2267 chip->badblockpos = mtd->writesize > 512 ?
2268 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2270 /* Get chip options, preserve non chip based options */
2271 chip->options &= ~NAND_CHIPOPTIONS_MSK;
2272 chip->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
2275 * Set chip as a default. Board drivers can override it, if necessary
2277 chip->options |= NAND_NO_AUTOINCR;
2279 /* Check if chip is a not a samsung device. Do not clear the
2280 * options for chips which are not having an extended id.
2282 if (*maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
2283 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2285 /* Check for AND chips with 4 page planes */
2286 if (chip->options & NAND_4PAGE_ARRAY)
2287 chip->erase_cmd = multi_erase_cmd;
2289 chip->erase_cmd = single_erase_cmd;
2291 /* Do not replace user supplied command function ! */
2292 if (mtd->writesize > 512 && chip->cmdfunc == nand_command)
2293 chip->cmdfunc = nand_command_lp;
2295 printk(KERN_INFO "NAND device: Manufacturer ID:"
2296 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id,
2297 nand_manuf_ids[maf_idx].name, type->name);
2302 /* module_text_address() isn't exported, and it's mostly a pointless
2303 test if this is a module _anyway_ -- they'd have to try _really_ hard
2304 to call us from in-kernel code if the core NAND support is modular. */
2306 #define caller_is_module() (1)
2308 #define caller_is_module() \
2309 module_text_address((unsigned long)__builtin_return_address(0))
2313 * nand_scan - [NAND Interface] Scan for the NAND device
2314 * @mtd: MTD device structure
2315 * @maxchips: Number of chips to scan for
2317 * This fills out all the uninitialized function pointers
2318 * with the defaults.
2319 * The flash ID is read and the mtd/chip structures are
2320 * filled with the appropriate values. Buffers are allocated if
2321 * they are not provided by the board driver
2322 * The mtd->owner field must be set to the module of the caller
2325 int nand_scan(struct mtd_info *mtd, int maxchips)
2327 int i, busw, nand_maf_id;
2328 struct nand_chip *chip = mtd->priv;
2329 struct nand_flash_dev *type;
2331 /* Many callers got this wrong, so check for it for a while... */
2332 if (!mtd->owner && caller_is_module()) {
2333 printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n");
2337 /* Get buswidth to select the correct functions */
2338 busw = chip->options & NAND_BUSWIDTH_16;
2339 /* Set the default functions */
2340 nand_set_defaults(chip, busw);
2342 /* Read the flash type */
2343 type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id);
2346 printk(KERN_WARNING "No NAND device found!!!\n");
2347 chip->select_chip(mtd, -1);
2348 return PTR_ERR(type);
2351 /* Check for a chip array */
2352 for (i = 1; i < maxchips; i++) {
2353 chip->select_chip(mtd, i);
2354 /* Send the command for reading device ID */
2355 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
2356 /* Read manufacturer and device IDs */
2357 if (nand_maf_id != chip->read_byte(mtd) ||
2358 type->id != chip->read_byte(mtd))
2362 printk(KERN_INFO "%d NAND chips detected\n", i);
2364 /* Store the number of chips and calc total size for mtd */
2366 mtd->size = i * chip->chipsize;
2368 /* Allocate buffers and data structures */
2369 if (nand_allocate_kmem(mtd, chip))
2372 /* Preset the internal oob buffer */
2373 memset(chip->oob_buf, 0xff,
2374 mtd->oobsize << (chip->phys_erase_shift - chip->page_shift));
2377 * If no default placement scheme is given, select an appropriate one
2379 if (!chip->autooob) {
2380 switch (mtd->oobsize) {
2382 chip->autooob = &nand_oob_8;
2385 chip->autooob = &nand_oob_16;
2388 chip->autooob = &nand_oob_64;
2391 printk(KERN_WARNING "No oob scheme defined for "
2392 "oobsize %d\n", mtd->oobsize);
2398 * The number of bytes available for the filesystem to place fs
2399 * dependend oob data
2402 for (i = 0; chip->autooob->oobfree[i][1]; i++)
2403 mtd->oobavail += chip->autooob->oobfree[i][1];
2406 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2407 * selected and we have 256 byte pagesize fallback to software ECC
2409 switch (chip->ecc.mode) {
2411 case NAND_ECC_HW_SYNDROME:
2412 if (!chip->ecc.calculate || !chip->ecc.correct ||
2414 printk(KERN_WARNING "No ECC functions supplied, "
2415 "Hardware ECC not possible\n");
2418 if (mtd->writesize >= chip->ecc.size)
2420 printk(KERN_WARNING "%d byte HW ECC not possible on "
2421 "%d byte page size, fallback to SW ECC\n",
2422 chip->ecc.size, mtd->writesize);
2423 chip->ecc.mode = NAND_ECC_SOFT;
2426 chip->ecc.calculate = nand_calculate_ecc;
2427 chip->ecc.correct = nand_correct_data;
2428 chip->ecc.size = 256;
2429 chip->ecc.bytes = 3;
2433 printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
2434 "This is not recommended !!\n");
2435 chip->ecc.size = mtd->writesize;
2436 chip->ecc.bytes = 0;
2439 printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
2445 * Set the number of read / write steps for one page depending on ECC
2448 chip->ecc.steps = mtd->writesize / chip->ecc.size;
2449 if(chip->ecc.steps * chip->ecc.size != mtd->writesize) {
2450 printk(KERN_WARNING "Invalid ecc parameters\n");
2454 /* Initialize state, waitqueue and spinlock */
2455 chip->state = FL_READY;
2456 init_waitqueue_head(&chip->controller->wq);
2457 spin_lock_init(&chip->controller->lock);
2459 /* De-select the device */
2460 chip->select_chip(mtd, -1);
2462 /* Invalidate the pagebuffer reference */
2465 /* Fill in remaining MTD driver data */
2466 mtd->type = MTD_NANDFLASH;
2467 mtd->flags = MTD_CAP_NANDFLASH;
2468 mtd->ecctype = MTD_ECC_SW;
2469 mtd->erase = nand_erase;
2471 mtd->unpoint = NULL;
2472 mtd->read = nand_read;
2473 mtd->write = nand_write;
2474 mtd->read_oob = nand_read_oob;
2475 mtd->write_oob = nand_write_oob;
2476 mtd->sync = nand_sync;
2479 mtd->suspend = nand_suspend;
2480 mtd->resume = nand_resume;
2481 mtd->block_isbad = nand_block_isbad;
2482 mtd->block_markbad = nand_block_markbad;
2484 /* and make the autooob the default one */
2485 memcpy(&mtd->oobinfo, chip->autooob, sizeof(mtd->oobinfo));
2487 /* Check, if we should skip the bad block table scan */
2488 if (chip->options & NAND_SKIP_BBTSCAN)
2491 /* Build bad block table */
2492 return chip->scan_bbt(mtd);
2496 * nand_release - [NAND Interface] Free resources held by the NAND device
2497 * @mtd: MTD device structure
2499 void nand_release(struct mtd_info *mtd)
2501 struct nand_chip *chip = mtd->priv;
2503 #ifdef CONFIG_MTD_PARTITIONS
2504 /* Deregister partitions */
2505 del_mtd_partitions(mtd);
2507 /* Deregister the device */
2508 del_mtd_device(mtd);
2510 /* Free bad block table memory */
2513 nand_free_kmem(chip);
2516 EXPORT_SYMBOL_GPL(nand_scan);
2517 EXPORT_SYMBOL_GPL(nand_release);
2519 static int __init nand_base_init(void)
2521 led_trigger_register_simple("nand-disk", &nand_led_trigger);
2525 static void __exit nand_base_exit(void)
2527 led_trigger_unregister_simple(nand_led_trigger);
2530 module_init(nand_base_init);
2531 module_exit(nand_base_exit);
2533 MODULE_LICENSE("GPL");
2534 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2535 MODULE_DESCRIPTION("Generic NAND flash driver code");