drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2006 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0, block_cmd = 0;
 194         int block, page;
 195
 196         /* Address translation */
 197         switch (cmd) {
 198         case ONENAND_CMD_UNLOCK:
 199         case ONENAND_CMD_LOCK:
 200         case ONENAND_CMD_LOCK_TIGHT:
 201         case ONENAND_CMD_UNLOCK_ALL:
 202                 block = -1;
 203                 page = -1;
 204                 break;
 205
 206         case ONENAND_CMD_ERASE:
 207         case ONENAND_CMD_BUFFERRAM:
 208         case ONENAND_CMD_OTP_ACCESS:
 209                 block_cmd = 1;
 210                 block = (int) (addr >> this->erase_shift);
 211                 page = -1;
 212                 break;
 213
 214         default:
 215                 block = (int) (addr >> this->erase_shift);
 216                 page = (int) (addr >> this->page_shift);
 217                 page &= this->page_mask;
 218                 break;
 219         }
 220
 221         /* NOTE: The setting order of the registers is very important! */
 222         if (cmd == ONENAND_CMD_BUFFERRAM) {
 223                 /* Select DataRAM for DDP */
 224                 value = onenand_bufferram_address(this, block);
 225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 226
 227                 /* Switch to the next data buffer */
 228                 ONENAND_SET_NEXT_BUFFERRAM(this);
 229
 230                 return 0;
 231         }
 232
 233         if (block != -1) {
 234                 /* Write 'DFS, FBA' of Flash */
 235                 value = onenand_block_address(this, block);
 236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 237
 238                 if (block_cmd) {
 239                         /* Select DataRAM for DDP */
 240                         value = onenand_bufferram_address(this, block);
 241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 242                 }
 243         }
 244
 245         if (page != -1) {
 246                 /* Now we use page size operation */
 247                 int sectors = 4, count = 4;
 248                 int dataram;
 249
 250                 switch (cmd) {
 251                 case ONENAND_CMD_READ:
 252                 case ONENAND_CMD_READOOB:
 253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 254                         readcmd = 1;
 255                         break;
 256
 257                 default:
 258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 259                         break;
 260                 }
 261
 262                 /* Write 'FPA, FSA' of Flash */
 263                 value = onenand_page_address(page, sectors);
 264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 265
 266                 /* Write 'BSA, BSC' of DataRAM */
 267                 value = onenand_buffer_address(dataram, sectors, count);
 268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 269
 270                 if (readcmd) {
 271                         /* Select DataRAM for DDP */
 272                         value = onenand_bufferram_address(this, block);
 273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 274                 }
 275         }
 276
 277         /* Interrupt clear */
 278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 279
 280         /* Write command */
 281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * onenand_wait - [DEFAULT] wait until the command is done
 288  * @param mtd           MTD device structure
 289  * @param state         state to select the max. timeout value
 290  *
 291  * Wait for command done. This applies to all OneNAND command
 292  * Read can take up to 30us, erase up to 2ms and program up to 350us
 293  * according to general OneNAND specs
 294  */
 295 static int onenand_wait(struct mtd_info *mtd, int state)
 296 {
 297         struct onenand_chip * this = mtd->priv;
 298         unsigned long timeout;
 299         unsigned int flags = ONENAND_INT_MASTER;
 300         unsigned int interrupt = 0;
 301         unsigned int ctrl;
 302
 303         /* The 20 msec is enough */
 304         timeout = jiffies + msecs_to_jiffies(20);
 305         while (time_before(jiffies, timeout)) {
 306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308                 if (interrupt & flags)
 309                         break;
 310
 311                 if (state != FL_READING)
 312                         cond_resched();
 313         }
 314         /* To get correct interrupt status in timeout case */
 315         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 316
 317         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 318
 319         if (ctrl & ONENAND_CTRL_ERROR) {
 320                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 321                 if (ctrl & ONENAND_CTRL_LOCK)
 322                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 323                 return ctrl;
 324         }
 325
 326         if (interrupt & ONENAND_INT_READ) {
 327                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 328                 if (ecc) {
 329                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 330                         if (ecc & ONENAND_ECC_2BIT_ALL)
 331                                 mtd->ecc_stats.failed++;
 332                         else if (ecc & ONENAND_ECC_1BIT_ALL)
 333                                 mtd->ecc_stats.corrected++;
 334                 }
 335                 return ecc;
 336         }
 337
 338         return 0;
 339 }
 340
 341 /*
 342  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 343  * @param irq           onenand interrupt number
 344  * @param dev_id        interrupt data
 345  *
 346  * complete the work
 347  */
 348 static irqreturn_t onenand_interrupt(int irq, void *data)
 349 {
 350         struct onenand_chip *this = (struct onenand_chip *) data;
 351
 352         /* To handle shared interrupt */
 353         if (!this->complete.done)
 354                 complete(&this->complete);
 355
 356         return IRQ_HANDLED;
 357 }
 358
 359 /*
 360  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 361  * @param mtd           MTD device structure
 362  * @param state         state to select the max. timeout value
 363  *
 364  * Wait for command done.
 365  */
 366 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 367 {
 368         struct onenand_chip *this = mtd->priv;
 369
 370         wait_for_completion(&this->complete);
 371
 372         return onenand_wait(mtd, state);
 373 }
 374
 375 /*
 376  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 377  * @param mtd           MTD device structure
 378  * @param state         state to select the max. timeout value
 379  *
 380  * Try interrupt based wait (It is used one-time)
 381  */
 382 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 383 {
 384         struct onenand_chip *this = mtd->priv;
 385         unsigned long remain, timeout;
 386
 387         /* We use interrupt wait first */
 388         this->wait = onenand_interrupt_wait;
 389
 390         timeout = msecs_to_jiffies(100);
 391         remain = wait_for_completion_timeout(&this->complete, timeout);
 392         if (!remain) {
 393                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 394                                 "We use the normal wait\n");
 395
 396                 /* Release the irq */
 397                 free_irq(this->irq, this);
 398
 399                 this->wait = onenand_wait;
 400         }
 401
 402         return onenand_wait(mtd, state);
 403 }
 404
 405 /*
 406  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 407  * @param mtd           MTD device structure
 408  *
 409  * There's two method to wait onenand work
 410  * 1. polling - read interrupt status register
 411  * 2. interrupt - use the kernel interrupt method
 412  */
 413 static void onenand_setup_wait(struct mtd_info *mtd)
 414 {
 415         struct onenand_chip *this = mtd->priv;
 416         int syscfg;
 417
 418         init_completion(&this->complete);
 419
 420         if (this->irq <= 0) {
 421                 this->wait = onenand_wait;
 422                 return;
 423         }
 424
 425         if (request_irq(this->irq, &onenand_interrupt,
 426                                 IRQF_SHARED, "onenand", this)) {
 427                 /* If we can't get irq, use the normal wait */
 428                 this->wait = onenand_wait;
 429                 return;
 430         }
 431
 432         /* Enable interrupt */
 433         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 434         syscfg |= ONENAND_SYS_CFG1_IOBE;
 435         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 436
 437         this->wait = onenand_try_interrupt_wait;
 438 }
 439
 440 /**
 441  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 442  * @param mtd           MTD data structure
 443  * @param area          BufferRAM area
 444  * @return              offset given area
 445  *
 446  * Return BufferRAM offset given area
 447  */
 448 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 449 {
 450         struct onenand_chip *this = mtd->priv;
 451
 452         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 453                 if (area == ONENAND_DATARAM)
 454                         return mtd->writesize;
 455                 if (area == ONENAND_SPARERAM)
 456                         return mtd->oobsize;
 457         }
 458
 459         return 0;
 460 }
 461
 462 /**
 463  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 464  * @param mtd           MTD data structure
 465  * @param area          BufferRAM area
 466  * @param buffer        the databuffer to put/get data
 467  * @param offset        offset to read from or write to
 468  * @param count         number of bytes to read/write
 469  *
 470  * Read the BufferRAM area
 471  */
 472 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 473                 unsigned char *buffer, int offset, size_t count)
 474 {
 475         struct onenand_chip *this = mtd->priv;
 476         void __iomem *bufferram;
 477
 478         bufferram = this->base + area;
 479
 480         bufferram += onenand_bufferram_offset(mtd, area);
 481
 482         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 483                 unsigned short word;
 484
 485                 /* Align with word(16-bit) size */
 486                 count--;
 487
 488                 /* Read word and save byte */
 489                 word = this->read_word(bufferram + offset + count);
 490                 buffer[count] = (word & 0xff);
 491         }
 492
 493         memcpy(buffer, bufferram + offset, count);
 494
 495         return 0;
 496 }
 497
 498 /**
 499  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 500  * @param mtd           MTD data structure
 501  * @param area          BufferRAM area
 502  * @param buffer        the databuffer to put/get data
 503  * @param offset        offset to read from or write to
 504  * @param count         number of bytes to read/write
 505  *
 506  * Read the BufferRAM area with Sync. Burst Mode
 507  */
 508 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 509                 unsigned char *buffer, int offset, size_t count)
 510 {
 511         struct onenand_chip *this = mtd->priv;
 512         void __iomem *bufferram;
 513
 514         bufferram = this->base + area;
 515
 516         bufferram += onenand_bufferram_offset(mtd, area);
 517
 518         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 519
 520         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 521                 unsigned short word;
 522
 523                 /* Align with word(16-bit) size */
 524                 count--;
 525
 526                 /* Read word and save byte */
 527                 word = this->read_word(bufferram + offset + count);
 528                 buffer[count] = (word & 0xff);
 529         }
 530
 531         memcpy(buffer, bufferram + offset, count);
 532
 533         this->mmcontrol(mtd, 0);
 534
 535         return 0;
 536 }
 537
 538 /**
 539  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 540  * @param mtd           MTD data structure
 541  * @param area          BufferRAM area
 542  * @param buffer        the databuffer to put/get data
 543  * @param offset        offset to read from or write to
 544  * @param count         number of bytes to read/write
 545  *
 546  * Write the BufferRAM area
 547  */
 548 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 549                 const unsigned char *buffer, int offset, size_t count)
 550 {
 551         struct onenand_chip *this = mtd->priv;
 552         void __iomem *bufferram;
 553
 554         bufferram = this->base + area;
 555
 556         bufferram += onenand_bufferram_offset(mtd, area);
 557
 558         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 559                 unsigned short word;
 560                 int byte_offset;
 561
 562                 /* Align with word(16-bit) size */
 563                 count--;
 564
 565                 /* Calculate byte access offset */
 566                 byte_offset = offset + count;
 567
 568                 /* Read word and save byte */
 569                 word = this->read_word(bufferram + byte_offset);
 570                 word = (word & ~0xff) | buffer[count];
 571                 this->write_word(word, bufferram + byte_offset);
 572         }
 573
 574         memcpy(bufferram + offset, buffer, count);
 575
 576         return 0;
 577 }
 578
 579 /**
 580  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 581  * @param mtd           MTD data structure
 582  * @param addr          address to check
 583  * @return              1 if there are valid data, otherwise 0
 584  *
 585  * Check bufferram if there is data we required
 586  */
 587 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 588 {
 589         struct onenand_chip *this = mtd->priv;
 590         int block, page;
 591         int i;
 592
 593         block = (int) (addr >> this->erase_shift);
 594         page = (int) (addr >> this->page_shift);
 595         page &= this->page_mask;
 596
 597         i = ONENAND_CURRENT_BUFFERRAM(this);
 598
 599         /* Is there valid data? */
 600         if (this->bufferram[i].block == block &&
 601             this->bufferram[i].page == page &&
 602             this->bufferram[i].valid)
 603                 return 1;
 604
 605         return 0;
 606 }
 607
 608 /**
 609  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 610  * @param mtd           MTD data structure
 611  * @param addr          address to update
 612  * @param valid         valid flag
 613  *
 614  * Update BufferRAM information
 615  */
 616 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 617                 int valid)
 618 {
 619         struct onenand_chip *this = mtd->priv;
 620         int block, page;
 621         int i;
 622
 623         block = (int) (addr >> this->erase_shift);
 624         page = (int) (addr >> this->page_shift);
 625         page &= this->page_mask;
 626
 627         /* Invalidate BufferRAM */
 628         for (i = 0; i < MAX_BUFFERRAM; i++) {
 629                 if (this->bufferram[i].block == block &&
 630                     this->bufferram[i].page == page)
 631                         this->bufferram[i].valid = 0;
 632         }
 633
 634         /* Update BufferRAM */
 635         i = ONENAND_CURRENT_BUFFERRAM(this);
 636         this->bufferram[i].block = block;
 637         this->bufferram[i].page = page;
 638         this->bufferram[i].valid = valid;
 639
 640         return 0;
 641 }
 642
 643 /**
 644  * onenand_get_device - [GENERIC] Get chip for selected access
 645  * @param mtd           MTD device structure
 646  * @param new_state     the state which is requested
 647  *
 648  * Get the device and lock it for exclusive access
 649  */
 650 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 651 {
 652         struct onenand_chip *this = mtd->priv;
 653         DECLARE_WAITQUEUE(wait, current);
 654
 655         /*
 656          * Grab the lock and see if the device is available
 657          */
 658         while (1) {
 659                 spin_lock(&this->chip_lock);
 660                 if (this->state == FL_READY) {
 661                         this->state = new_state;
 662                         spin_unlock(&this->chip_lock);
 663                         break;
 664                 }
 665                 if (new_state == FL_PM_SUSPENDED) {
 666                         spin_unlock(&this->chip_lock);
 667                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 668                 }
 669                 set_current_state(TASK_UNINTERRUPTIBLE);
 670                 add_wait_queue(&this->wq, &wait);
 671                 spin_unlock(&this->chip_lock);
 672                 schedule();
 673                 remove_wait_queue(&this->wq, &wait);
 674         }
 675
 676         return 0;
 677 }
 678
 679 /**
 680  * onenand_release_device - [GENERIC] release chip
 681  * @param mtd           MTD device structure
 682  *
 683  * Deselect, release chip lock and wake up anyone waiting on the device
 684  */
 685 static void onenand_release_device(struct mtd_info *mtd)
 686 {
 687         struct onenand_chip *this = mtd->priv;
 688
 689         /* Release the chip */
 690         spin_lock(&this->chip_lock);
 691         this->state = FL_READY;
 692         wake_up(&this->wq);
 693         spin_unlock(&this->chip_lock);
 694 }
 695
 696 /**
 697  * onenand_read - [MTD Interface] Read data from flash
 698  * @param mtd           MTD device structure
 699  * @param from          offset to read from
 700  * @param len           number of bytes to read
 701  * @param retlen        pointer to variable to store the number of read bytes
 702  * @param buf           the databuffer to put data
 703  *
 704  * Read with ecc
 705 */
 706 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 707         size_t *retlen, u_char *buf)
 708 {
 709         struct onenand_chip *this = mtd->priv;
 710         struct mtd_ecc_stats stats;
 711         int read = 0, column;
 712         int thislen;
 713         int ret = 0;
 714
 715         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 716
 717         /* Do not allow reads past end of device */
 718         if ((from + len) > mtd->size) {
 719                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 720                 *retlen = 0;
 721                 return -EINVAL;
 722         }
 723
 724         /* Grab the lock and see if the device is available */
 725         onenand_get_device(mtd, FL_READING);
 726
 727         /* TODO handling oob */
 728
 729         stats = mtd->ecc_stats;
 730
 731         /* Read-while-load method */
 732
 733         /* Do first load to bufferRAM */
 734         if (read < len) {
 735                 if (!onenand_check_bufferram(mtd, from)) {
 736                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 737                         ret = this->wait(mtd, FL_READING);
 738                         onenand_update_bufferram(mtd, from, !ret);
 739                 }
 740         }
 741
 742         thislen = min_t(int, mtd->writesize, len - read);
 743         column = from & (mtd->writesize - 1);
 744         if (column + thislen > mtd->writesize)
 745                 thislen = mtd->writesize - column;
 746
 747         while (!ret) {
 748                 /* If there is more to load then start next load */
 749                 from += thislen;
 750                 if (read + thislen < len) {
 751                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 752                         ONENAND_SET_PREV_BUFFERRAM(this);
 753                 }
 754                 /* While load is going, read from last bufferRAM */
 755                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 756                 /* See if we are done */
 757                 read += thislen;
 758                 if (read == len)
 759                         break;
 760                 /* Set up for next read from bufferRAM */
 761                 ONENAND_SET_NEXT_BUFFERRAM(this);
 762                 buf += thislen;
 763                 thislen = min_t(int, mtd->writesize, len - read);
 764                 column = 0;
 765                 cond_resched();
 766                 /* Now wait for load */
 767                 ret = this->wait(mtd, FL_READING);
 768                 onenand_update_bufferram(mtd, from, !ret);
 769         }
 770
 771         /* Deselect and wake up anyone waiting on the device */
 772         onenand_release_device(mtd);
 773
 774         /*
 775          * Return success, if no ECC failures, else -EBADMSG
 776          * fs driver will take care of that, because
 777          * retlen == desired len and result == -EBADMSG
 778          */
 779         *retlen = read;
 780
 781         if (mtd->ecc_stats.failed - stats.failed)
 782                 return -EBADMSG;
 783
 784         if (ret)
 785                 return ret;
 786
 787         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 788 }
 789
 790 /**
 791  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 792  * @param mtd           MTD device structure
 793  * @param from          offset to read from
 794  * @param len           number of bytes to read
 795  * @param retlen        pointer to variable to store the number of read bytes
 796  * @param buf           the databuffer to put data
 797  *
 798  * OneNAND read out-of-band data from the spare area
 799  */
 800 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 801                         size_t *retlen, u_char *buf)
 802 {
 803         struct onenand_chip *this = mtd->priv;
 804         int read = 0, thislen, column;
 805         int ret = 0;
 806
 807         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 808
 809         /* Initialize return length value */
 810         *retlen = 0;
 811
 812         /* Do not allow reads past end of device */
 813         if (unlikely((from + len) > mtd->size)) {
 814                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 815                 return -EINVAL;
 816         }
 817
 818         /* Grab the lock and see if the device is available */
 819         onenand_get_device(mtd, FL_READING);
 820
 821         column = from & (mtd->oobsize - 1);
 822
 823         while (read < len) {
 824                 cond_resched();
 825
 826                 thislen = mtd->oobsize - column;
 827                 thislen = min_t(int, thislen, len);
 828
 829                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 830
 831                 onenand_update_bufferram(mtd, from, 0);
 832
 833                 ret = this->wait(mtd, FL_READING);
 834                 /* First copy data and check return value for ECC handling */
 835
 836                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 837
 838                 if (ret) {
 839                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 840                         goto out;
 841                 }
 842
 843                 read += thislen;
 844
 845                 if (read == len)
 846                         break;
 847
 848                 buf += thislen;
 849
 850                 /* Read more? */
 851                 if (read < len) {
 852                         /* Page size */
 853                         from += mtd->writesize;
 854                         column = 0;
 855                 }
 856         }
 857
 858 out:
 859         /* Deselect and wake up anyone waiting on the device */
 860         onenand_release_device(mtd);
 861
 862         *retlen = read;
 863         return ret;
 864 }
 865
 866 /**
 867  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 868  * @mtd:        MTD device structure
 869  * @from:       offset to read from
 870  * @ops:        oob operation description structure
 871  */
 872 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 873                             struct mtd_oob_ops *ops)
 874 {
 875         BUG_ON(ops->mode != MTD_OOB_PLACE);
 876
 877         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 878                                    &ops->oobretlen, ops->oobbuf);
 879 }
 880
 881 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 882 /**
 883  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 884  * @param mtd           MTD device structure
 885  * @param buf           the databuffer to verify
 886  * @param to            offset to read from
 887  * @param len           number of bytes to read and compare
 888  *
 889  */
 890 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
 891 {
 892         struct onenand_chip *this = mtd->priv;
 893         char *readp = this->page_buf;
 894         int column = to & (mtd->oobsize - 1);
 895         int status, i;
 896
 897         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 898         onenand_update_bufferram(mtd, to, 0);
 899         status = this->wait(mtd, FL_READING);
 900         if (status)
 901                 return status;
 902
 903         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
 904
 905         for(i = 0; i < len; i++)
 906                 if (buf[i] != 0xFF && buf[i] != readp[i])
 907                         return -EBADMSG;
 908
 909         return 0;
 910 }
 911
 912 /**
 913  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 914  * @param mtd           MTD device structure
 915  * @param buf           the databuffer to verify
 916  *
 917  * Check DataRAM area directly
 918  */
 919 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 920 {
 921         struct onenand_chip *this = mtd->priv;
 922         void __iomem *dataram0, *dataram1;
 923         int ret = 0;
 924
 925         /* In partial page write, just skip it */
 926         if ((addr & (mtd->writesize - 1)) != 0)
 927                 return 0;
 928
 929         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 930
 931         ret = this->wait(mtd, FL_READING);
 932         if (ret)
 933                 return ret;
 934
 935         onenand_update_bufferram(mtd, addr, 1);
 936
 937         /* Check, if the two dataram areas are same */
 938         dataram0 = this->base + ONENAND_DATARAM;
 939         dataram1 = dataram0 + mtd->writesize;
 940
 941         if (memcmp(dataram0, dataram1, mtd->writesize))
 942                 return -EBADMSG;
 943
 944         return 0;
 945 }
 946 #else
 947 #define onenand_verify_page(...)        (0)
 948 #define onenand_verify_oob(...)         (0)
 949 #endif
 950
 951 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
 952
 953 /**
 954  * onenand_write - [MTD Interface] write buffer to FLASH
 955  * @param mtd           MTD device structure
 956  * @param to            offset to write to
 957  * @param len           number of bytes to write
 958  * @param retlen        pointer to variable to store the number of written bytes
 959  * @param buf           the data to write
 960  *
 961  * Write with ECC
 962  */
 963 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 964         size_t *retlen, const u_char *buf)
 965 {
 966         struct onenand_chip *this = mtd->priv;
 967         int written = 0;
 968         int ret = 0;
 969         int column, subpage;
 970
 971         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 972
 973         /* Initialize retlen, in case of early exit */
 974         *retlen = 0;
 975
 976         /* Do not allow writes past end of device */
 977         if (unlikely((to + len) > mtd->size)) {
 978                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
 979                 return -EINVAL;
 980         }
 981
 982         /* Reject writes, which are not page aligned */
 983         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 984                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
 985                 return -EINVAL;
 986         }
 987
 988         column = to & (mtd->writesize - 1);
 989         subpage = column || (len & (mtd->writesize - 1));
 990
 991         /* Grab the lock and see if the device is available */
 992         onenand_get_device(mtd, FL_WRITING);
 993
 994         /* Loop until all data write */
 995         while (written < len) {
 996                 int bytes = mtd->writesize;
 997                 int thislen = min_t(int, bytes, len - written);
 998                 u_char *wbuf = (u_char *) buf;
 999
1000                 cond_resched();
1001
1002                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
1003
1004                 /* Partial page write */
1005                 if (subpage) {
1006                         bytes = min_t(int, bytes - column, (int) len);
1007                         memset(this->page_buf, 0xff, mtd->writesize);
1008                         memcpy(this->page_buf + column, buf, bytes);
1009                         wbuf = this->page_buf;
1010                         /* Even though partial write, we need page size */
1011                         thislen = mtd->writesize;
1012                 }
1013
1014                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1015                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1016
1017                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1018
1019                 /* In partial page write we don't update bufferram */
1020                 onenand_update_bufferram(mtd, to, !subpage);
1021
1022                 ret = this->wait(mtd, FL_WRITING);
1023                 if (ret) {
1024                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1025                         break;
1026                 }
1027
1028                 /* Only check verify write turn on */
1029                 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1030                 if (ret) {
1031                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1032                         break;
1033                 }
1034
1035                 written += thislen;
1036
1037                 if (written == len)
1038                         break;
1039
1040                 column = 0;
1041                 to += thislen;
1042                 buf += thislen;
1043         }
1044
1045         /* Deselect and wake up anyone waiting on the device */
1046         onenand_release_device(mtd);
1047
1048         *retlen = written;
1049
1050         return ret;
1051 }
1052
1053 /**
1054  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1055  * @param mtd           MTD device structure
1056  * @param to            offset to write to
1057  * @param len           number of bytes to write
1058  * @param retlen        pointer to variable to store the number of written bytes
1059  * @param buf           the data to write
1060  *
1061  * OneNAND write out-of-band
1062  */
1063 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1064                                 size_t *retlen, const u_char *buf)
1065 {
1066         struct onenand_chip *this = mtd->priv;
1067         int column, ret = 0;
1068         int written = 0;
1069
1070         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1071
1072         /* Initialize retlen, in case of early exit */
1073         *retlen = 0;
1074
1075         /* Do not allow writes past end of device */
1076         if (unlikely((to + len) > mtd->size)) {
1077                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1078                 return -EINVAL;
1079         }
1080
1081         /* Grab the lock and see if the device is available */
1082         onenand_get_device(mtd, FL_WRITING);
1083
1084         /* Loop until all data write */
1085         while (written < len) {
1086                 int thislen = min_t(int, mtd->oobsize, len - written);
1087
1088                 cond_resched();
1089
1090                 column = to & (mtd->oobsize - 1);
1091
1092                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1093
1094                 /* We send data to spare ram with oobsize
1095                  * to prevent byte access */
1096                 memset(this->page_buf, 0xff, mtd->oobsize);
1097                 memcpy(this->page_buf + column, buf, thislen);
1098                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1099
1100                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1101
1102                 onenand_update_bufferram(mtd, to, 0);
1103
1104                 ret = this->wait(mtd, FL_WRITING);
1105                 if (ret) {
1106                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1107                         goto out;
1108                 }
1109
1110                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1111                 if (ret) {
1112                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1113                         goto out;
1114                 }
1115
1116                 written += thislen;
1117
1118                 if (written == len)
1119                         break;
1120
1121                 to += thislen;
1122                 buf += thislen;
1123         }
1124
1125 out:
1126         /* Deselect and wake up anyone waiting on the device */
1127         onenand_release_device(mtd);
1128
1129         *retlen = written;
1130
1131         return ret;
1132 }
1133
1134 /**
1135  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1136  * @mtd:        MTD device structure
1137  * @from:       offset to read from
1138  * @ops:        oob operation description structure
1139  */
1140 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1141                              struct mtd_oob_ops *ops)
1142 {
1143         BUG_ON(ops->mode != MTD_OOB_PLACE);
1144
1145         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1146                                     &ops->oobretlen, ops->oobbuf);
1147 }
1148
1149 /**
1150  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1151  * @param mtd           MTD device structure
1152  * @param ofs           offset from device start
1153  * @param getchip       0, if the chip is already selected
1154  * @param allowbbt      1, if its allowed to access the bbt area
1155  *
1156  * Check, if the block is bad. Either by reading the bad block table or
1157  * calling of the scan function.
1158  */
1159 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1160 {
1161         struct onenand_chip *this = mtd->priv;
1162         struct bbm_info *bbm = this->bbm;
1163
1164         /* Return info from the table */
1165         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1166 }
1167
1168 /**
1169  * onenand_erase - [MTD Interface] erase block(s)
1170  * @param mtd           MTD device structure
1171  * @param instr         erase instruction
1172  *
1173  * Erase one ore more blocks
1174  */
1175 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1176 {
1177         struct onenand_chip *this = mtd->priv;
1178         unsigned int block_size;
1179         loff_t addr;
1180         int len;
1181         int ret = 0;
1182
1183         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1184
1185         block_size = (1 << this->erase_shift);
1186
1187         /* Start address must align on block boundary */
1188         if (unlikely(instr->addr & (block_size - 1))) {
1189                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1190                 return -EINVAL;
1191         }
1192
1193         /* Length must align on block boundary */
1194         if (unlikely(instr->len & (block_size - 1))) {
1195                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1196                 return -EINVAL;
1197         }
1198
1199         /* Do not allow erase past end of device */
1200         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1201                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1202                 return -EINVAL;
1203         }
1204
1205         instr->fail_addr = 0xffffffff;
1206
1207         /* Grab the lock and see if the device is available */
1208         onenand_get_device(mtd, FL_ERASING);
1209
1210         /* Loop throught the pages */
1211         len = instr->len;
1212         addr = instr->addr;
1213
1214         instr->state = MTD_ERASING;
1215
1216         while (len) {
1217                 cond_resched();
1218
1219                 /* Check if we have a bad block, we do not erase bad blocks */
1220                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1221                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1222                         instr->state = MTD_ERASE_FAILED;
1223                         goto erase_exit;
1224                 }
1225
1226                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1227
1228                 ret = this->wait(mtd, FL_ERASING);
1229                 /* Check, if it is write protected */
1230                 if (ret) {
1231                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1232                         instr->state = MTD_ERASE_FAILED;
1233                         instr->fail_addr = addr;
1234                         goto erase_exit;
1235                 }
1236
1237                 len -= block_size;
1238                 addr += block_size;
1239         }
1240
1241         instr->state = MTD_ERASE_DONE;
1242
1243 erase_exit:
1244
1245         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1246         /* Do call back function */
1247         if (!ret)
1248                 mtd_erase_callback(instr);
1249
1250         /* Deselect and wake up anyone waiting on the device */
1251         onenand_release_device(mtd);
1252
1253         return ret;
1254 }
1255
1256 /**
1257  * onenand_sync - [MTD Interface] sync
1258  * @param mtd           MTD device structure
1259  *
1260  * Sync is actually a wait for chip ready function
1261  */
1262 static void onenand_sync(struct mtd_info *mtd)
1263 {
1264         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1265
1266         /* Grab the lock and see if the device is available */
1267         onenand_get_device(mtd, FL_SYNCING);
1268
1269         /* Release it and go back */
1270         onenand_release_device(mtd);
1271 }
1272
1273 /**
1274  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1275  * @param mtd           MTD device structure
1276  * @param ofs           offset relative to mtd start
1277  *
1278  * Check whether the block is bad
1279  */
1280 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1281 {
1282         /* Check for invalid offset */
1283         if (ofs > mtd->size)
1284                 return -EINVAL;
1285
1286         return onenand_block_checkbad(mtd, ofs, 1, 0);
1287 }
1288
1289 /**
1290  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1291  * @param mtd           MTD device structure
1292  * @param ofs           offset from device start
1293  *
1294  * This is the default implementation, which can be overridden by
1295  * a hardware specific driver.
1296  */
1297 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1298 {
1299         struct onenand_chip *this = mtd->priv;
1300         struct bbm_info *bbm = this->bbm;
1301         u_char buf[2] = {0, 0};
1302         size_t retlen;
1303         int block;
1304
1305         /* Get block number */
1306         block = ((int) ofs) >> bbm->bbt_erase_shift;
1307         if (bbm->bbt)
1308                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1309
1310         /* We write two bytes, so we dont have to mess with 16 bit access */
1311         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1312         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1313 }
1314
1315 /**
1316  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1317  * @param mtd           MTD device structure
1318  * @param ofs           offset relative to mtd start
1319  *
1320  * Mark the block as bad
1321  */
1322 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1323 {
1324         struct onenand_chip *this = mtd->priv;
1325         int ret;
1326
1327         ret = onenand_block_isbad(mtd, ofs);
1328         if (ret) {
1329                 /* If it was bad already, return success and do nothing */
1330                 if (ret > 0)
1331                         return 0;
1332                 return ret;
1333         }
1334
1335         return this->block_markbad(mtd, ofs);
1336 }
1337
1338 /**
1339  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1340  * @param mtd           MTD device structure
1341  * @param ofs           offset relative to mtd start
1342  * @param len           number of bytes to lock or unlock
1343  *
1344  * Lock or unlock one or more blocks
1345  */
1346 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1347 {
1348         struct onenand_chip *this = mtd->priv;
1349         int start, end, block, value, status;
1350         int wp_status_mask;
1351
1352         start = ofs >> this->erase_shift;
1353         end = len >> this->erase_shift;
1354
1355         if (cmd == ONENAND_CMD_LOCK)
1356                 wp_status_mask = ONENAND_WP_LS;
1357         else
1358                 wp_status_mask = ONENAND_WP_US;
1359
1360         /* Continuous lock scheme */
1361         if (this->options & ONENAND_HAS_CONT_LOCK) {
1362                 /* Set start block address */
1363                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1364                 /* Set end block address */
1365                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1366                 /* Write lock command */
1367                 this->command(mtd, cmd, 0, 0);
1368
1369                 /* There's no return value */
1370                 this->wait(mtd, FL_LOCKING);
1371
1372                 /* Sanity check */
1373                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1374                     & ONENAND_CTRL_ONGO)
1375                         continue;
1376
1377                 /* Check lock status */
1378                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1379                 if (!(status & wp_status_mask))
1380                         printk(KERN_ERR "wp status = 0x%x\n", status);
1381
1382                 return 0;
1383         }
1384
1385         /* Block lock scheme */
1386         for (block = start; block < start + end; block++) {
1387                 /* Set block address */
1388                 value = onenand_block_address(this, block);
1389                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1390                 /* Select DataRAM for DDP */
1391                 value = onenand_bufferram_address(this, block);
1392                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1393                 /* Set start block address */
1394                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1395                 /* Write lock command */
1396                 this->command(mtd, cmd, 0, 0);
1397
1398                 /* There's no return value */
1399                 this->wait(mtd, FL_LOCKING);
1400
1401                 /* Sanity check */
1402                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1403                     & ONENAND_CTRL_ONGO)
1404                         continue;
1405
1406                 /* Check lock status */
1407                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1408                 if (!(status & wp_status_mask))
1409                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1410         }
1411
1412         return 0;
1413 }
1414
1415 /**
1416  * onenand_lock - [MTD Interface] Lock block(s)
1417  * @param mtd           MTD device structure
1418  * @param ofs           offset relative to mtd start
1419  * @param len           number of bytes to unlock
1420  *
1421  * Lock one or more blocks
1422  */
1423 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1424 {
1425         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1426 }
1427
1428 /**
1429  * onenand_unlock - [MTD Interface] Unlock block(s)
1430  * @param mtd           MTD device structure
1431  * @param ofs           offset relative to mtd start
1432  * @param len           number of bytes to unlock
1433  *
1434  * Unlock one or more blocks
1435  */
1436 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1437 {
1438         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1439 }
1440
1441 /**
1442  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1443  * @param this          onenand chip data structure
1444  *
1445  * Check lock status
1446  */
1447 static void onenand_check_lock_status(struct onenand_chip *this)
1448 {
1449         unsigned int value, block, status;
1450         unsigned int end;
1451
1452         end = this->chipsize >> this->erase_shift;
1453         for (block = 0; block < end; block++) {
1454                 /* Set block address */
1455                 value = onenand_block_address(this, block);
1456                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1457                 /* Select DataRAM for DDP */
1458                 value = onenand_bufferram_address(this, block);
1459                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1460                 /* Set start block address */
1461                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1462
1463                 /* Check lock status */
1464                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1465                 if (!(status & ONENAND_WP_US))
1466                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1467         }
1468 }
1469
1470 /**
1471  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1472  * @param mtd           MTD device structure
1473  *
1474  * Unlock all blocks
1475  */
1476 static int onenand_unlock_all(struct mtd_info *mtd)
1477 {
1478         struct onenand_chip *this = mtd->priv;
1479
1480         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1481                 /* Write unlock command */
1482                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1483
1484                 /* There's no return value */
1485                 this->wait(mtd, FL_LOCKING);
1486
1487                 /* Sanity check */
1488                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1489                     & ONENAND_CTRL_ONGO)
1490                         continue;
1491
1492                 /* Workaround for all block unlock in DDP */
1493                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1494                         loff_t ofs;
1495                         size_t len;
1496
1497                         /* 1st block on another chip */
1498                         ofs = this->chipsize >> 1;
1499                         len = 1 << this->erase_shift;
1500
1501                         onenand_unlock(mtd, ofs, len);
1502                 }
1503
1504                 onenand_check_lock_status(this);
1505
1506                 return 0;
1507         }
1508
1509         onenand_unlock(mtd, 0x0, this->chipsize);
1510
1511         return 0;
1512 }
1513
1514 #ifdef CONFIG_MTD_ONENAND_OTP
1515
1516 /* Interal OTP operation */
1517 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1518                 size_t *retlen, u_char *buf);
1519
1520 /**
1521  * do_otp_read - [DEFAULT] Read OTP block area
1522  * @param mtd           MTD device structure
1523  * @param from          The offset to read
1524  * @param len           number of bytes to read
1525  * @param retlen        pointer to variable to store the number of readbytes
1526  * @param buf           the databuffer to put/get data
1527  *
1528  * Read OTP block area.
1529  */
1530 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1531                 size_t *retlen, u_char *buf)
1532 {
1533         struct onenand_chip *this = mtd->priv;
1534         int ret;
1535
1536         /* Enter OTP access mode */
1537         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1538         this->wait(mtd, FL_OTPING);
1539
1540         ret = mtd->read(mtd, from, len, retlen, buf);
1541
1542         /* Exit OTP access mode */
1543         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1544         this->wait(mtd, FL_RESETING);
1545
1546         return ret;
1547 }
1548
1549 /**
1550  * do_otp_write - [DEFAULT] Write OTP block area
1551  * @param mtd           MTD device structure
1552  * @param from          The offset to write
1553  * @param len           number of bytes to write
1554  * @param retlen        pointer to variable to store the number of write bytes
1555  * @param buf           the databuffer to put/get data
1556  *
1557  * Write OTP block area.
1558  */
1559 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1560                 size_t *retlen, u_char *buf)
1561 {
1562         struct onenand_chip *this = mtd->priv;
1563         unsigned char *pbuf = buf;
1564         int ret;
1565
1566         /* Force buffer page aligned */
1567         if (len < mtd->writesize) {
1568                 memcpy(this->page_buf, buf, len);
1569                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1570                 pbuf = this->page_buf;
1571                 len = mtd->writesize;
1572         }
1573
1574         /* Enter OTP access mode */
1575         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1576         this->wait(mtd, FL_OTPING);
1577
1578         ret = mtd->write(mtd, from, len, retlen, pbuf);
1579
1580         /* Exit OTP access mode */
1581         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1582         this->wait(mtd, FL_RESETING);
1583
1584         return ret;
1585 }
1586
1587 /**
1588  * do_otp_lock - [DEFAULT] Lock OTP block area
1589  * @param mtd           MTD device structure
1590  * @param from          The offset to lock
1591  * @param len           number of bytes to lock
1592  * @param retlen        pointer to variable to store the number of lock bytes
1593  * @param buf           the databuffer to put/get data
1594  *
1595  * Lock OTP block area.
1596  */
1597 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1598                 size_t *retlen, u_char *buf)
1599 {
1600         struct onenand_chip *this = mtd->priv;
1601         int ret;
1602
1603         /* Enter OTP access mode */
1604         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1605         this->wait(mtd, FL_OTPING);
1606
1607         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1608
1609         /* Exit OTP access mode */
1610         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1611         this->wait(mtd, FL_RESETING);
1612
1613         return ret;
1614 }
1615
1616 /**
1617  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1618  * @param mtd           MTD device structure
1619  * @param from          The offset to read/write
1620  * @param len           number of bytes to read/write
1621  * @param retlen        pointer to variable to store the number of read bytes
1622  * @param buf           the databuffer to put/get data
1623  * @param action        do given action
1624  * @param mode          specify user and factory
1625  *
1626  * Handle OTP operation.
1627  */
1628 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1629                         size_t *retlen, u_char *buf,
1630                         otp_op_t action, int mode)
1631 {
1632         struct onenand_chip *this = mtd->priv;
1633         int otp_pages;
1634         int density;
1635         int ret = 0;
1636
1637         *retlen = 0;
1638
1639         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1640         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1641                 otp_pages = 20;
1642         else
1643                 otp_pages = 10;
1644
1645         if (mode == MTD_OTP_FACTORY) {
1646                 from += mtd->writesize * otp_pages;
1647                 otp_pages = 64 - otp_pages;
1648         }
1649
1650         /* Check User/Factory boundary */
1651         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1652                 return 0;
1653
1654         while (len > 0 && otp_pages > 0) {
1655                 if (!action) {  /* OTP Info functions */
1656                         struct otp_info *otpinfo;
1657
1658                         len -= sizeof(struct otp_info);
1659                         if (len <= 0)
1660                                 return -ENOSPC;
1661
1662                         otpinfo = (struct otp_info *) buf;
1663                         otpinfo->start = from;
1664                         otpinfo->length = mtd->writesize;
1665                         otpinfo->locked = 0;
1666
1667                         from += mtd->writesize;
1668                         buf += sizeof(struct otp_info);
1669                         *retlen += sizeof(struct otp_info);
1670                 } else {
1671                         size_t tmp_retlen;
1672                         int size = len;
1673
1674                         ret = action(mtd, from, len, &tmp_retlen, buf);
1675
1676                         buf += size;
1677                         len -= size;
1678                         *retlen += size;
1679
1680                         if (ret < 0)
1681                                 return ret;
1682                 }
1683                 otp_pages--;
1684         }
1685
1686         return 0;
1687 }
1688
1689 /**
1690  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1691  * @param mtd           MTD device structure
1692  * @param buf           the databuffer to put/get data
1693  * @param len           number of bytes to read
1694  *
1695  * Read factory OTP info.
1696  */
1697 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1698                         struct otp_info *buf, size_t len)
1699 {
1700         size_t retlen;
1701         int ret;
1702
1703         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1704
1705         return ret ? : retlen;
1706 }
1707
1708 /**
1709  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1710  * @param mtd           MTD device structure
1711  * @param from          The offset to read
1712  * @param len           number of bytes to read
1713  * @param retlen        pointer to variable to store the number of read bytes
1714  * @param buf           the databuffer to put/get data
1715  *
1716  * Read factory OTP area.
1717  */
1718 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1719                         size_t len, size_t *retlen, u_char *buf)
1720 {
1721         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1722 }
1723
1724 /**
1725  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1726  * @param mtd           MTD device structure
1727  * @param buf           the databuffer to put/get data
1728  * @param len           number of bytes to read
1729  *
1730  * Read user OTP info.
1731  */
1732 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1733                         struct otp_info *buf, size_t len)
1734 {
1735         size_t retlen;
1736         int ret;
1737
1738         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1739
1740         return ret ? : retlen;
1741 }
1742
1743 /**
1744  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1745  * @param mtd           MTD device structure
1746  * @param from          The offset to read
1747  * @param len           number of bytes to read
1748  * @param retlen        pointer to variable to store the number of read bytes
1749  * @param buf           the databuffer to put/get data
1750  *
1751  * Read user OTP area.
1752  */
1753 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1754                         size_t len, size_t *retlen, u_char *buf)
1755 {
1756         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1757 }
1758
1759 /**
1760  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1761  * @param mtd           MTD device structure
1762  * @param from          The offset to write
1763  * @param len           number of bytes to write
1764  * @param retlen        pointer to variable to store the number of write bytes
1765  * @param buf           the databuffer to put/get data
1766  *
1767  * Write user OTP area.
1768  */
1769 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1770                         size_t len, size_t *retlen, u_char *buf)
1771 {
1772         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1773 }
1774
1775 /**
1776  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1777  * @param mtd           MTD device structure
1778  * @param from          The offset to lock
1779  * @param len           number of bytes to unlock
1780  *
1781  * Write lock mark on spare area in page 0 in OTP block
1782  */
1783 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1784                         size_t len)
1785 {
1786         unsigned char oob_buf[64];
1787         size_t retlen;
1788         int ret;
1789
1790         memset(oob_buf, 0xff, mtd->oobsize);
1791         /*
1792          * Note: OTP lock operation
1793          *       OTP block : 0xXXFC
1794          *       1st block : 0xXXF3 (If chip support)
1795          *       Both      : 0xXXF0 (If chip support)
1796          */
1797         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1798
1799         /*
1800          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1801          * We write 16 bytes spare area instead of 2 bytes.
1802          */
1803         from = 0;
1804         len = 16;
1805
1806         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1807
1808         return ret ? : retlen;
1809 }
1810 #endif  /* CONFIG_MTD_ONENAND_OTP */
1811
1812 /**
1813  * onenand_lock_scheme - Check and set OneNAND lock scheme
1814  * @param mtd           MTD data structure
1815  *
1816  * Check and set OneNAND lock scheme
1817  */
1818 static void onenand_lock_scheme(struct mtd_info *mtd)
1819 {
1820         struct onenand_chip *this = mtd->priv;
1821         unsigned int density, process;
1822
1823         /* Lock scheme depends on density and process */
1824         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1825         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1826
1827         /* Lock scheme */
1828         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1829                 /* A-Die has all block unlock */
1830                 if (process) {
1831                         printk(KERN_DEBUG "Chip support all block unlock\n");
1832                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1833                 }
1834         } else {
1835                 /* Some OneNAND has continues lock scheme */
1836                 if (!process) {
1837                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1838                         this->options |= ONENAND_HAS_CONT_LOCK;
1839                 }
1840         }
1841 }
1842
1843 /**
1844  * onenand_print_device_info - Print device ID
1845  * @param device        device ID
1846  *
1847  * Print device ID
1848  */
1849 static void onenand_print_device_info(int device, int version)
1850 {
1851         int vcc, demuxed, ddp, density;
1852
1853         vcc = device & ONENAND_DEVICE_VCC_MASK;
1854         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1855         ddp = device & ONENAND_DEVICE_IS_DDP;
1856         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1857         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1858                 demuxed ? "" : "Muxed ",
1859                 ddp ? "(DDP)" : "",
1860                 (16 << density),
1861                 vcc ? "2.65/3.3" : "1.8",
1862                 device);
1863         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1864 }
1865
1866 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1867         {ONENAND_MFR_SAMSUNG, "Samsung"},
1868 };
1869
1870 /**
1871  * onenand_check_maf - Check manufacturer ID
1872  * @param manuf         manufacturer ID
1873  *
1874  * Check manufacturer ID
1875  */
1876 static int onenand_check_maf(int manuf)
1877 {
1878         int size = ARRAY_SIZE(onenand_manuf_ids);
1879         char *name;
1880         int i;
1881
1882         for (i = 0; i < size; i++)
1883                 if (manuf == onenand_manuf_ids[i].id)
1884                         break;
1885
1886         if (i < size)
1887                 name = onenand_manuf_ids[i].name;
1888         else
1889                 name = "Unknown";
1890
1891         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1892
1893         return (i == size);
1894 }
1895
1896 /**
1897  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1898  * @param mtd           MTD device structure
1899  *
1900  * OneNAND detection method:
1901  *   Compare the the values from command with ones from register
1902  */
1903 static int onenand_probe(struct mtd_info *mtd)
1904 {
1905         struct onenand_chip *this = mtd->priv;
1906         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1907         int density;
1908         int syscfg;
1909
1910         /* Save system configuration 1 */
1911         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1912         /* Clear Sync. Burst Read mode to read BootRAM */
1913         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1914
1915         /* Send the command for reading device ID from BootRAM */
1916         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1917
1918         /* Read manufacturer and device IDs from BootRAM */
1919         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1920         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1921
1922         /* Reset OneNAND to read default register values */
1923         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1924         /* Wait reset */
1925         this->wait(mtd, FL_RESETING);
1926
1927         /* Restore system configuration 1 */
1928         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1929
1930         /* Check manufacturer ID */
1931         if (onenand_check_maf(bram_maf_id))
1932                 return -ENXIO;
1933
1934         /* Read manufacturer and device IDs from Register */
1935         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1936         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1937         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1938
1939         /* Check OneNAND device */
1940         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1941                 return -ENXIO;
1942
1943         /* Flash device information */
1944         onenand_print_device_info(dev_id, ver_id);
1945         this->device_id = dev_id;
1946         this->version_id = ver_id;
1947
1948         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1949         this->chipsize = (16 << density) << 20;
1950         /* Set density mask. it is used for DDP */
1951         this->density_mask = (1 << (density + 6));
1952
1953         /* OneNAND page size & block size */
1954         /* The data buffer size is equal to page size */
1955         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1956         mtd->oobsize = mtd->writesize >> 5;
1957         /* Pagers per block is always 64 in OneNAND */
1958         mtd->erasesize = mtd->writesize << 6;
1959
1960         this->erase_shift = ffs(mtd->erasesize) - 1;
1961         this->page_shift = ffs(mtd->writesize) - 1;
1962         this->ppb_shift = (this->erase_shift - this->page_shift);
1963         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1964
1965         /* REVIST: Multichip handling */
1966
1967         mtd->size = this->chipsize;
1968
1969         /* Check OneNAND lock scheme */
1970         onenand_lock_scheme(mtd);
1971
1972         return 0;
1973 }
1974
1975 /**
1976  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1977  * @param mtd           MTD device structure
1978  */
1979 static int onenand_suspend(struct mtd_info *mtd)
1980 {
1981         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1982 }
1983
1984 /**
1985  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1986  * @param mtd           MTD device structure
1987  */
1988 static void onenand_resume(struct mtd_info *mtd)
1989 {
1990         struct onenand_chip *this = mtd->priv;
1991
1992         if (this->state == FL_PM_SUSPENDED)
1993                 onenand_release_device(mtd);
1994         else
1995                 printk(KERN_ERR "resume() called for the chip which is not"
1996                                 "in suspended state\n");
1997 }
1998
1999 /**
2000  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2001  * @param mtd           MTD device structure
2002  * @param maxchips      Number of chips to scan for
2003  *
2004  * This fills out all the not initialized function pointers
2005  * with the defaults.
2006  * The flash ID is read and the mtd/chip structures are
2007  * filled with the appropriate values.
2008  */
2009 int onenand_scan(struct mtd_info *mtd, int maxchips)
2010 {
2011         struct onenand_chip *this = mtd->priv;
2012
2013         if (!this->read_word)
2014                 this->read_word = onenand_readw;
2015         if (!this->write_word)
2016                 this->write_word = onenand_writew;
2017
2018         if (!this->command)
2019                 this->command = onenand_command;
2020         if (!this->wait)
2021                 onenand_setup_wait(mtd);
2022
2023         if (!this->read_bufferram)
2024                 this->read_bufferram = onenand_read_bufferram;
2025         if (!this->write_bufferram)
2026                 this->write_bufferram = onenand_write_bufferram;
2027
2028         if (!this->block_markbad)
2029                 this->block_markbad = onenand_default_block_markbad;
2030         if (!this->scan_bbt)
2031                 this->scan_bbt = onenand_default_bbt;
2032
2033         if (onenand_probe(mtd))
2034                 return -ENXIO;
2035
2036         /* Set Sync. Burst Read after probing */
2037         if (this->mmcontrol) {
2038                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2039                 this->read_bufferram = onenand_sync_read_bufferram;
2040         }
2041
2042         /* Allocate buffers, if necessary */
2043         if (!this->page_buf) {
2044                 size_t len;
2045                 len = mtd->writesize + mtd->oobsize;
2046                 this->page_buf = kmalloc(len, GFP_KERNEL);
2047                 if (!this->page_buf) {
2048                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2049                         return -ENOMEM;
2050                 }
2051                 this->options |= ONENAND_PAGEBUF_ALLOC;
2052         }
2053
2054         this->state = FL_READY;
2055         init_waitqueue_head(&this->wq);
2056         spin_lock_init(&this->chip_lock);
2057
2058         /*
2059          * Allow subpage writes up to oobsize.
2060          */
2061         switch (mtd->oobsize) {
2062         case 64:
2063                 this->ecclayout = &onenand_oob_64;
2064                 mtd->subpage_sft = 2;
2065                 break;
2066
2067         case 32:
2068                 this->ecclayout = &onenand_oob_32;
2069                 mtd->subpage_sft = 1;
2070                 break;
2071
2072         default:
2073                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2074                         mtd->oobsize);
2075                 mtd->subpage_sft = 0;
2076                 /* To prevent kernel oops */
2077                 this->ecclayout = &onenand_oob_32;
2078                 break;
2079         }
2080
2081         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2082         mtd->ecclayout = this->ecclayout;
2083
2084         /* Fill in remaining MTD driver data */
2085         mtd->type = MTD_NANDFLASH;
2086         mtd->flags = MTD_CAP_NANDFLASH;
2087         mtd->ecctype = MTD_ECC_SW;
2088         mtd->erase = onenand_erase;
2089         mtd->point = NULL;
2090         mtd->unpoint = NULL;
2091         mtd->read = onenand_read;
2092         mtd->write = onenand_write;
2093         mtd->read_oob = onenand_read_oob;
2094         mtd->write_oob = onenand_write_oob;
2095 #ifdef CONFIG_MTD_ONENAND_OTP
2096         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2097         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2098         mtd->get_user_prot_info = onenand_get_user_prot_info;
2099         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2100         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2101         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2102 #endif
2103         mtd->sync = onenand_sync;
2104         mtd->lock = onenand_lock;
2105         mtd->unlock = onenand_unlock;
2106         mtd->suspend = onenand_suspend;
2107         mtd->resume = onenand_resume;
2108         mtd->block_isbad = onenand_block_isbad;
2109         mtd->block_markbad = onenand_block_markbad;
2110         mtd->owner = THIS_MODULE;
2111
2112         /* Unlock whole block */
2113         onenand_unlock_all(mtd);
2114
2115         return this->scan_bbt(mtd);
2116 }
2117
2118 /**
2119  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2120  * @param mtd           MTD device structure
2121  */
2122 void onenand_release(struct mtd_info *mtd)
2123 {
2124         struct onenand_chip *this = mtd->priv;
2125
2126 #ifdef CONFIG_MTD_PARTITIONS
2127         /* Deregister partitions */
2128         del_mtd_partitions (mtd);
2129 #endif
2130         /* Deregister the device */
2131         del_mtd_device (mtd);
2132
2133         /* Free bad block table memory, if allocated */
2134         if (this->bbm)
2135                 kfree(this->bbm);
2136         /* Buffer allocated by onenand_scan */
2137         if (this->options & ONENAND_PAGEBUF_ALLOC)
2138                 kfree(this->page_buf);
2139 }
2140
2141 EXPORT_SYMBOL_GPL(onenand_scan);
2142 EXPORT_SYMBOL_GPL(onenand_release);
2143
2144 MODULE_LICENSE("GPL");
2145 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2146 MODULE_DESCRIPTION("Generic OneNAND flash driver code");