1 /* ----------------------------------------------------------------------------
2 Linux PCMCIA ethernet adapter driver for the New Media Ethernet LAN.
3 nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao
5 The Ethernet LAN uses the Advanced Micro Devices (AMD) Am79C940 Media
6 Access Controller for Ethernet (MACE). It is essentially the Am2150
7 PCMCIA Ethernet card contained in the Am2150 Demo Kit.
9 Written by Roger C. Pao <rpao@paonet.org>
10 Copyright 1995 Roger C. Pao
11 Linux 2.5 cleanups Copyright Red Hat 2003
13 This software may be used and distributed according to the terms of
14 the GNU General Public License.
16 Ported to Linux 1.3.* network driver environment by
17 Matti Aarnio <mea@utu.fi>
21 Am2150 Technical Reference Manual, Revision 1.0, August 17, 1993
22 Am79C940 (MACE) Data Sheet, 1994
23 Am79C90 (C-LANCE) Data Sheet, 1994
24 Linux PCMCIA Programmer's Guide v1.17
25 /usr/src/linux/net/inet/dev.c, Linux kernel 1.2.8
27 Eric Mears, New Media Corporation
28 Tom Pollard, New Media Corporation
29 Dean Siasoyco, New Media Corporation
30 Ken Lesniak, Silicon Graphics, Inc. <lesniak@boston.sgi.com>
31 Donald Becker <becker@scyld.com>
32 David Hinds <dahinds@users.sourceforge.net>
34 The Linux client driver is based on the 3c589_cs.c client driver by
37 The Linux network driver outline is based on the 3c589_cs.c driver,
38 the 8390.c driver, and the example skeleton.c kernel code, which are
41 The Am2150 network driver hardware interface code is based on the
42 OS/9000 driver for the New Media Ethernet LAN by Eric Mears.
44 Special thanks for testing and help in debugging this driver goes
47 -------------------------------------------------------------------------------
48 Driver Notes and Issues
49 -------------------------------------------------------------------------------
51 1. Developed on a Dell 320SLi
52 PCMCIA Card Services 2.6.2
53 Linux dell 1.2.10 #1 Thu Jun 29 20:23:41 PDT 1995 i386
55 2. rc.pcmcia may require loading pcmcia_core with io_speed=300:
56 'insmod pcmcia_core.o io_speed=300'.
57 This will avoid problems with fast systems which causes rx_framecnt
58 to return random values.
60 3. If hot extraction does not work for you, use 'ifconfig eth0 down'
63 4. There is a bad slow-down problem in this driver.
65 5. Future: Multicast processing. In the meantime, do _not_ compile your
66 kernel with multicast ip enabled.
68 -------------------------------------------------------------------------------
70 -------------------------------------------------------------------------------
72 * 2.5.75-ac1 2003/07/11 Alan Cox <alan@redhat.com>
73 * Fixed hang on card eject as we probe it
74 * Cleaned up to use new style locking.
76 * Revision 0.16 1995/07/01 06:42:17 rpao
77 * Bug fix: nmclan_reset() called CardServices incorrectly.
79 * Revision 0.15 1995/05/24 08:09:47 rpao
80 * Re-implement MULTI_TX dev->tbusy handling.
82 * Revision 0.14 1995/05/23 03:19:30 rpao
83 * Added, in nmclan_config(), "tuple.Attributes = 0;".
84 * Modified MACE ID check to ignore chip revision level.
85 * Avoid tx_free_frames race condition between _start_xmit and _interrupt.
87 * Revision 0.13 1995/05/18 05:56:34 rpao
89 * Bug fix: nmclan_reset did not enable TX and RX: call restore_multicast_list.
90 * Bug fix: mace_interrupt checks ~MACE_IMR_DEFAULT. Fixes driver lockup.
92 * Revision 0.12 1995/05/14 00:12:23 rpao
93 * Statistics overhaul.
97 Bug fix: MACE statistics counters used wrong I/O ports.
98 Bug fix: mace_interrupt() needed to allow statistics to be
99 processed without RX or TX interrupts pending.
101 Multiple transmit request processing.
102 Modified statistics to use MACE counters where possible.
103 95/05/10 rpao V0.09 Bug fix: Must use IO_DATA_PATH_WIDTH_AUTO.
106 Bug fix: Make all non-exported functions private by using
108 Bug fix: Test IntrCnt _before_ reading MACE_IR.
109 95/05/10 rpao V0.07 Statistics.
110 95/05/09 rpao V0.06 Fix rx_framecnt problem by addition of PCIC wait states.
112 ---------------------------------------------------------------------------- */
114 #define DRV_NAME "nmclan_cs"
115 #define DRV_VERSION "0.16"
118 /* ----------------------------------------------------------------------------
119 Conditional Compilation Options
120 ---------------------------------------------------------------------------- */
123 #define RESET_ON_TIMEOUT 1
124 #define TX_INTERRUPTABLE 1
125 #define RESET_XILINX 0
127 /* ----------------------------------------------------------------------------
129 ---------------------------------------------------------------------------- */
131 #include <linux/module.h>
132 #include <linux/kernel.h>
133 #include <linux/init.h>
134 #include <linux/ptrace.h>
135 #include <linux/slab.h>
136 #include <linux/string.h>
137 #include <linux/timer.h>
138 #include <linux/interrupt.h>
139 #include <linux/in.h>
140 #include <linux/delay.h>
141 #include <linux/ethtool.h>
142 #include <linux/netdevice.h>
143 #include <linux/etherdevice.h>
144 #include <linux/skbuff.h>
145 #include <linux/if_arp.h>
146 #include <linux/ioport.h>
147 #include <linux/bitops.h>
149 #include <pcmcia/cs_types.h>
150 #include <pcmcia/cs.h>
151 #include <pcmcia/cisreg.h>
152 #include <pcmcia/cistpl.h>
153 #include <pcmcia/ds.h>
155 #include <asm/uaccess.h>
157 #include <asm/system.h>
159 /* ----------------------------------------------------------------------------
161 ---------------------------------------------------------------------------- */
163 #define ETHER_ADDR_LEN ETH_ALEN
164 /* 6 bytes in an Ethernet Address */
165 #define MACE_LADRF_LEN 8
166 /* 8 bytes in Logical Address Filter */
168 /* Loop Control Defines */
169 #define MACE_MAX_IR_ITERATIONS 10
170 #define MACE_MAX_RX_ITERATIONS 12
172 TBD: Dean brought this up, and I assumed the hardware would
175 If MACE_MAX_RX_ITERATIONS is > 1, rx_framecnt may still be
176 non-zero when the isr exits. We may not get another interrupt
177 to process the remaining packets for some time.
181 The Am2150 has a Xilinx XC3042 field programmable gate array (FPGA)
182 which manages the interface between the MACE and the PCMCIA bus. It
183 also includes buffer management for the 32K x 8 SRAM to control up to
184 four transmit and 12 receive frames at a time.
186 #define AM2150_MAX_TX_FRAMES 4
187 #define AM2150_MAX_RX_FRAMES 12
189 /* Am2150 Ethernet Card I/O Mapping */
190 #define AM2150_RCV 0x00
191 #define AM2150_XMT 0x04
192 #define AM2150_XMT_SKIP 0x09
193 #define AM2150_RCV_NEXT 0x0A
194 #define AM2150_RCV_FRAME_COUNT 0x0B
195 #define AM2150_MACE_BANK 0x0C
196 #define AM2150_MACE_BASE 0x10
199 #define MACE_RCVFIFO 0
200 #define MACE_XMTFIFO 1
206 #define MACE_FIFOFC 7
210 #define MACE_BIUCC 11
211 #define MACE_FIFOCC 12
212 #define MACE_MACCC 13
213 #define MACE_PLSCC 14
214 #define MACE_PHYCC 15
215 #define MACE_CHIPIDL 16
216 #define MACE_CHIPIDH 17
219 #define MACE_LADRF 20
225 #define MACE_RNTPC 26
226 #define MACE_RCVCC 27
233 #define MACE_XMTRC_EXDEF 0x80
234 #define MACE_XMTRC_XMTRC 0x0F
236 #define MACE_XMTFS_XMTSV 0x80
237 #define MACE_XMTFS_UFLO 0x40
238 #define MACE_XMTFS_LCOL 0x20
239 #define MACE_XMTFS_MORE 0x10
240 #define MACE_XMTFS_ONE 0x08
241 #define MACE_XMTFS_DEFER 0x04
242 #define MACE_XMTFS_LCAR 0x02
243 #define MACE_XMTFS_RTRY 0x01
245 #define MACE_RCVFS_RCVSTS 0xF000
246 #define MACE_RCVFS_OFLO 0x8000
247 #define MACE_RCVFS_CLSN 0x4000
248 #define MACE_RCVFS_FRAM 0x2000
249 #define MACE_RCVFS_FCS 0x1000
251 #define MACE_FIFOFC_RCVFC 0xF0
252 #define MACE_FIFOFC_XMTFC 0x0F
254 #define MACE_IR_JAB 0x80
255 #define MACE_IR_BABL 0x40
256 #define MACE_IR_CERR 0x20
257 #define MACE_IR_RCVCCO 0x10
258 #define MACE_IR_RNTPCO 0x08
259 #define MACE_IR_MPCO 0x04
260 #define MACE_IR_RCVINT 0x02
261 #define MACE_IR_XMTINT 0x01
263 #define MACE_MACCC_PROM 0x80
264 #define MACE_MACCC_DXMT2PD 0x40
265 #define MACE_MACCC_EMBA 0x20
266 #define MACE_MACCC_RESERVED 0x10
267 #define MACE_MACCC_DRCVPA 0x08
268 #define MACE_MACCC_DRCVBC 0x04
269 #define MACE_MACCC_ENXMT 0x02
270 #define MACE_MACCC_ENRCV 0x01
272 #define MACE_PHYCC_LNKFL 0x80
273 #define MACE_PHYCC_DLNKTST 0x40
274 #define MACE_PHYCC_REVPOL 0x20
275 #define MACE_PHYCC_DAPC 0x10
276 #define MACE_PHYCC_LRT 0x08
277 #define MACE_PHYCC_ASEL 0x04
278 #define MACE_PHYCC_RWAKE 0x02
279 #define MACE_PHYCC_AWAKE 0x01
281 #define MACE_IAC_ADDRCHG 0x80
282 #define MACE_IAC_PHYADDR 0x04
283 #define MACE_IAC_LOGADDR 0x02
285 #define MACE_UTR_RTRE 0x80
286 #define MACE_UTR_RTRD 0x40
287 #define MACE_UTR_RPA 0x20
288 #define MACE_UTR_FCOLL 0x10
289 #define MACE_UTR_RCVFCSE 0x08
290 #define MACE_UTR_LOOP_INCL_MENDEC 0x06
291 #define MACE_UTR_LOOP_NO_MENDEC 0x04
292 #define MACE_UTR_LOOP_EXTERNAL 0x02
293 #define MACE_UTR_LOOP_NONE 0x00
294 #define MACE_UTR_RESERVED 0x01
296 /* Switch MACE register bank (only 0 and 1 are valid) */
297 #define MACEBANK(win_num) outb((win_num), ioaddr + AM2150_MACE_BANK)
299 #define MACE_IMR_DEFAULT \
310 #undef MACE_IMR_DEFAULT
311 #define MACE_IMR_DEFAULT 0x00 /* New statistics handling: grab everything */
313 #define TX_TIMEOUT ((400*HZ)/1000)
315 /* ----------------------------------------------------------------------------
317 ---------------------------------------------------------------------------- */
319 typedef struct _mace_statistics {
334 /* RFS1--Receive Status (RCVSTS) */
340 /* RFS2--Runt Packet Count (RNTPC) */
343 /* RFS3--Receive Collision Count (RCVCC) */
364 typedef struct _mace_private {
367 struct net_device_stats linux_stats; /* Linux statistics counters */
368 mace_statistics mace_stats; /* MACE chip statistics counters */
370 /* restore_multicast_list() state variables */
371 int multicast_ladrf[MACE_LADRF_LEN]; /* Logical address filter */
372 int multicast_num_addrs;
374 char tx_free_frames; /* Number of free transmit frame buffers */
375 char tx_irq_disabled; /* MACE TX interrupt disabled */
377 spinlock_t bank_lock; /* Must be held if you step off bank 0 */
380 /* ----------------------------------------------------------------------------
381 Private Global Variables
382 ---------------------------------------------------------------------------- */
385 static char rcsid[] =
386 "nmclan_cs.c,v 0.16 1995/07/01 06:42:17 rpao Exp rpao";
387 static char *version =
388 DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
391 static dev_info_t dev_info="nmclan_cs";
393 static char *if_names[]={
394 "Auto", "10baseT", "BNC",
397 /* ----------------------------------------------------------------------------
399 These are the parameters that can be set during loading with
401 ---------------------------------------------------------------------------- */
403 MODULE_DESCRIPTION("New Media PCMCIA ethernet driver");
404 MODULE_LICENSE("GPL");
406 #define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
408 /* 0=auto, 1=10baseT, 2 = 10base2, default=auto */
409 INT_MODULE_PARM(if_port, 0);
412 INT_MODULE_PARM(pc_debug, PCMCIA_DEBUG);
413 #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
415 #define DEBUG(n, args...)
418 /* ----------------------------------------------------------------------------
420 ---------------------------------------------------------------------------- */
422 static void nmclan_config(dev_link_t *link);
423 static void nmclan_release(dev_link_t *link);
424 static int nmclan_event(event_t event, int priority,
425 event_callback_args_t *args);
427 static void nmclan_reset(struct net_device *dev);
428 static int mace_config(struct net_device *dev, struct ifmap *map);
429 static int mace_open(struct net_device *dev);
430 static int mace_close(struct net_device *dev);
431 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev);
432 static void mace_tx_timeout(struct net_device *dev);
433 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs);
434 static struct net_device_stats *mace_get_stats(struct net_device *dev);
435 static int mace_rx(struct net_device *dev, unsigned char RxCnt);
436 static void restore_multicast_list(struct net_device *dev);
437 static void set_multicast_list(struct net_device *dev);
438 static struct ethtool_ops netdev_ethtool_ops;
441 static dev_link_t *nmclan_attach(void);
442 static void nmclan_detach(struct pcmcia_device *p_dev);
444 /* ----------------------------------------------------------------------------
446 Creates an "instance" of the driver, allocating local data
447 structures for one device. The device is registered with Card
449 ---------------------------------------------------------------------------- */
451 static dev_link_t *nmclan_attach(void)
455 struct net_device *dev;
456 client_reg_t client_reg;
459 DEBUG(0, "nmclan_attach()\n");
460 DEBUG(1, "%s\n", rcsid);
462 /* Create new ethernet device */
463 dev = alloc_etherdev(sizeof(mace_private));
466 lp = netdev_priv(dev);
470 spin_lock_init(&lp->bank_lock);
471 link->io.NumPorts1 = 32;
472 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
473 link->io.IOAddrLines = 5;
474 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE | IRQ_HANDLE_PRESENT;
475 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
476 link->irq.Handler = &mace_interrupt;
477 link->irq.Instance = dev;
478 link->conf.Attributes = CONF_ENABLE_IRQ;
480 link->conf.IntType = INT_MEMORY_AND_IO;
481 link->conf.ConfigIndex = 1;
482 link->conf.Present = PRESENT_OPTION;
484 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
486 SET_MODULE_OWNER(dev);
487 dev->hard_start_xmit = &mace_start_xmit;
488 dev->set_config = &mace_config;
489 dev->get_stats = &mace_get_stats;
490 dev->set_multicast_list = &set_multicast_list;
491 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
492 dev->open = &mace_open;
493 dev->stop = &mace_close;
494 #ifdef HAVE_TX_TIMEOUT
495 dev->tx_timeout = mace_tx_timeout;
496 dev->watchdog_timeo = TX_TIMEOUT;
499 /* Register with Card Services */
501 client_reg.dev_info = &dev_info;
502 client_reg.Version = 0x0210;
503 client_reg.event_callback_args.client_data = link;
504 ret = pcmcia_register_client(&link->handle, &client_reg);
506 cs_error(link->handle, RegisterClient, ret);
507 nmclan_detach(link->handle);
512 } /* nmclan_attach */
514 /* ----------------------------------------------------------------------------
516 This deletes a driver "instance". The device is de-registered
517 with Card Services. If it has been released, all local data
518 structures are freed. Otherwise, the structures will be freed
519 when the device is released.
520 ---------------------------------------------------------------------------- */
522 static void nmclan_detach(struct pcmcia_device *p_dev)
524 dev_link_t *link = dev_to_instance(p_dev);
525 struct net_device *dev = link->priv;
527 DEBUG(0, "nmclan_detach(0x%p)\n", link);
530 unregister_netdev(dev);
532 if (link->state & DEV_CONFIG)
533 nmclan_release(link);
536 } /* nmclan_detach */
538 /* ----------------------------------------------------------------------------
540 Reads a MACE register. This is bank independent; however, the
541 caller must ensure that this call is not interruptable. We are
542 assuming that during normal operation, the MACE is always in
544 ---------------------------------------------------------------------------- */
545 static int mace_read(mace_private *lp, kio_addr_t ioaddr, int reg)
551 case 0: /* register 0-15 */
552 data = inb(ioaddr + AM2150_MACE_BASE + reg);
554 case 1: /* register 16-31 */
555 spin_lock_irqsave(&lp->bank_lock, flags);
557 data = inb(ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
559 spin_unlock_irqrestore(&lp->bank_lock, flags);
562 return (data & 0xFF);
565 /* ----------------------------------------------------------------------------
567 Writes to a MACE register. This is bank independent; however,
568 the caller must ensure that this call is not interruptable. We
569 are assuming that during normal operation, the MACE is always in
571 ---------------------------------------------------------------------------- */
572 static void mace_write(mace_private *lp, kio_addr_t ioaddr, int reg, int data)
577 case 0: /* register 0-15 */
578 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + reg);
580 case 1: /* register 16-31 */
581 spin_lock_irqsave(&lp->bank_lock, flags);
583 outb(data & 0xFF, ioaddr + AM2150_MACE_BASE + (reg & 0x0F));
585 spin_unlock_irqrestore(&lp->bank_lock, flags);
590 /* ----------------------------------------------------------------------------
592 Resets the MACE chip.
593 ---------------------------------------------------------------------------- */
594 static int mace_init(mace_private *lp, kio_addr_t ioaddr, char *enet_addr)
599 /* MACE Software reset */
600 mace_write(lp, ioaddr, MACE_BIUCC, 1);
601 while (mace_read(lp, ioaddr, MACE_BIUCC) & 0x01) {
602 /* Wait for reset bit to be cleared automatically after <= 200ns */;
605 printk(KERN_ERR "mace: reset failed, card removed ?\n");
610 mace_write(lp, ioaddr, MACE_BIUCC, 0);
612 /* The Am2150 requires that the MACE FIFOs operate in burst mode. */
613 mace_write(lp, ioaddr, MACE_FIFOCC, 0x0F);
615 mace_write(lp,ioaddr, MACE_RCVFC, 0); /* Disable Auto Strip Receive */
616 mace_write(lp, ioaddr, MACE_IMR, 0xFF); /* Disable all interrupts until _open */
619 * Bit 2-1 PORTSEL[1-0] Port Select.
622 * 10 DAI Port (reserved in Am2150)
624 * For this card, only the first two are valid.
625 * So, PLSCC should be set to
628 * Or just set ASEL in PHYCC below!
632 mace_write(lp, ioaddr, MACE_PLSCC, 0x02);
635 mace_write(lp, ioaddr, MACE_PLSCC, 0x00);
638 mace_write(lp, ioaddr, MACE_PHYCC, /* ASEL */ 4);
639 /* ASEL Auto Select. When set, the PORTSEL[1-0] bits are overridden,
640 and the MACE device will automatically select the operating media
645 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_PHYADDR);
646 /* Poll ADDRCHG bit */
648 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
652 printk(KERN_ERR "mace: ADDRCHG timeout, card removed ?\n");
656 /* Set PADR register */
657 for (i = 0; i < ETHER_ADDR_LEN; i++)
658 mace_write(lp, ioaddr, MACE_PADR, enet_addr[i]);
660 /* MAC Configuration Control Register should be written last */
661 /* Let set_multicast_list set this. */
662 /* mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV); */
663 mace_write(lp, ioaddr, MACE_MACCC, 0x00);
667 /* ----------------------------------------------------------------------------
669 This routine is scheduled to run after a CARD_INSERTION event
670 is received, to configure the PCMCIA socket, and to make the
671 ethernet device available to the system.
672 ---------------------------------------------------------------------------- */
674 #define CS_CHECK(fn, ret) \
675 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
677 static void nmclan_config(dev_link_t *link)
679 client_handle_t handle = link->handle;
680 struct net_device *dev = link->priv;
681 mace_private *lp = netdev_priv(dev);
685 int i, last_ret, last_fn;
688 DEBUG(0, "nmclan_config(0x%p)\n", link);
690 tuple.Attributes = 0;
691 tuple.TupleData = buf;
692 tuple.TupleDataMax = 64;
693 tuple.TupleOffset = 0;
694 tuple.DesiredTuple = CISTPL_CONFIG;
695 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
696 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
697 CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
698 link->conf.ConfigBase = parse.config.base;
701 link->state |= DEV_CONFIG;
703 CS_CHECK(RequestIO, pcmcia_request_io(handle, &link->io));
704 CS_CHECK(RequestIRQ, pcmcia_request_irq(handle, &link->irq));
705 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(handle, &link->conf));
706 dev->irq = link->irq.AssignedIRQ;
707 dev->base_addr = link->io.BasePort1;
709 ioaddr = dev->base_addr;
711 /* Read the ethernet address from the CIS. */
712 tuple.DesiredTuple = 0x80 /* CISTPL_CFTABLE_ENTRY_MISC */;
713 tuple.TupleData = buf;
714 tuple.TupleDataMax = 64;
715 tuple.TupleOffset = 0;
716 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
717 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
718 memcpy(dev->dev_addr, tuple.TupleData, ETHER_ADDR_LEN);
720 /* Verify configuration by reading the MACE ID. */
724 sig[0] = mace_read(lp, ioaddr, MACE_CHIPIDL);
725 sig[1] = mace_read(lp, ioaddr, MACE_CHIPIDH);
726 if ((sig[0] == 0x40) && ((sig[1] & 0x0F) == 0x09)) {
727 DEBUG(0, "nmclan_cs configured: mace id=%x %x\n",
730 printk(KERN_NOTICE "nmclan_cs: mace id not found: %x %x should"
731 " be 0x40 0x?9\n", sig[0], sig[1]);
732 link->state &= ~DEV_CONFIG_PENDING;
737 if(mace_init(lp, ioaddr, dev->dev_addr) == -1)
740 /* The if_port symbol can be set when the module is loaded */
742 dev->if_port = if_port;
744 printk(KERN_NOTICE "nmclan_cs: invalid if_port requested\n");
746 link->dev = &lp->node;
747 link->state &= ~DEV_CONFIG_PENDING;
748 SET_NETDEV_DEV(dev, &handle_to_dev(handle));
750 i = register_netdev(dev);
752 printk(KERN_NOTICE "nmclan_cs: register_netdev() failed\n");
757 strcpy(lp->node.dev_name, dev->name);
759 printk(KERN_INFO "%s: nmclan: port %#3lx, irq %d, %s port, hw_addr ",
760 dev->name, dev->base_addr, dev->irq, if_names[dev->if_port]);
761 for (i = 0; i < 6; i++)
762 printk("%02X%s", dev->dev_addr[i], ((i<5) ? ":" : "\n"));
766 cs_error(link->handle, last_fn, last_ret);
768 nmclan_release(link);
771 } /* nmclan_config */
773 /* ----------------------------------------------------------------------------
775 After a card is removed, nmclan_release() will unregister the
776 net device, and release the PCMCIA configuration. If the device
777 is still open, this will be postponed until it is closed.
778 ---------------------------------------------------------------------------- */
779 static void nmclan_release(dev_link_t *link)
782 DEBUG(0, "nmclan_release(0x%p)\n", link);
784 pcmcia_release_configuration(link->handle);
785 pcmcia_release_io(link->handle, &link->io);
786 pcmcia_release_irq(link->handle, &link->irq);
788 link->state &= ~DEV_CONFIG;
791 static int nmclan_suspend(struct pcmcia_device *p_dev)
793 dev_link_t *link = dev_to_instance(p_dev);
794 struct net_device *dev = link->priv;
796 link->state |= DEV_SUSPEND;
797 if (link->state & DEV_CONFIG) {
799 netif_device_detach(dev);
800 pcmcia_release_configuration(link->handle);
807 static int nmclan_resume(struct pcmcia_device *p_dev)
809 dev_link_t *link = dev_to_instance(p_dev);
810 struct net_device *dev = link->priv;
812 link->state &= ~DEV_SUSPEND;
813 if (link->state & DEV_CONFIG) {
814 pcmcia_request_configuration(link->handle, &link->conf);
817 netif_device_attach(dev);
824 /* ----------------------------------------------------------------------------
826 The card status event handler. Mostly, this schedules other
827 stuff to run after an event is received. A CARD_REMOVAL event
828 also sets some flags to discourage the net drivers from trying
829 to talk to the card any more.
830 ---------------------------------------------------------------------------- */
831 static int nmclan_event(event_t event, int priority,
832 event_callback_args_t *args)
834 dev_link_t *link = args->client_data;
836 DEBUG(1, "nmclan_event(0x%06x)\n", event);
839 case CS_EVENT_CARD_INSERTION:
840 link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
843 case CS_EVENT_RESET_REQUEST:
850 /* ----------------------------------------------------------------------------
852 Reset and restore all of the Xilinx and MACE registers.
853 ---------------------------------------------------------------------------- */
854 static void nmclan_reset(struct net_device *dev)
856 mace_private *lp = netdev_priv(dev);
859 dev_link_t *link = &lp->link;
863 /* Save original COR value */
865 reg.Action = CS_READ;
866 reg.Offset = CISREG_COR;
868 pcmcia_access_configuration_register(link->handle, ®);
869 OrigCorValue = reg.Value;
872 reg.Action = CS_WRITE;
873 reg.Offset = CISREG_COR;
874 DEBUG(1, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n",
876 reg.Value = COR_SOFT_RESET;
877 pcmcia_access_configuration_register(link->handle, ®);
878 /* Need to wait for 20 ms for PCMCIA to finish reset. */
880 /* Restore original COR configuration index */
881 reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK);
882 pcmcia_access_configuration_register(link->handle, ®);
883 /* Xilinx is now completely reset along with the MACE chip. */
884 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
886 #endif /* #if RESET_XILINX */
888 /* Xilinx is now completely reset along with the MACE chip. */
889 lp->tx_free_frames=AM2150_MAX_TX_FRAMES;
891 /* Reinitialize the MACE chip for operation. */
892 mace_init(lp, dev->base_addr, dev->dev_addr);
893 mace_write(lp, dev->base_addr, MACE_IMR, MACE_IMR_DEFAULT);
895 /* Restore the multicast list and enable TX and RX. */
896 restore_multicast_list(dev);
899 /* ----------------------------------------------------------------------------
901 [Someone tell me what this is supposed to do? Is if_port a defined
902 standard? If so, there should be defines to indicate 1=10Base-T,
903 2=10Base-2, etc. including limited automatic detection.]
904 ---------------------------------------------------------------------------- */
905 static int mace_config(struct net_device *dev, struct ifmap *map)
907 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
908 if (map->port <= 2) {
909 dev->if_port = map->port;
910 printk(KERN_INFO "%s: switched to %s port\n", dev->name,
911 if_names[dev->if_port]);
918 /* ----------------------------------------------------------------------------
921 ---------------------------------------------------------------------------- */
922 static int mace_open(struct net_device *dev)
924 kio_addr_t ioaddr = dev->base_addr;
925 mace_private *lp = netdev_priv(dev);
926 dev_link_t *link = &lp->link;
935 netif_start_queue(dev);
938 return 0; /* Always succeed */
941 /* ----------------------------------------------------------------------------
943 Closes device driver.
944 ---------------------------------------------------------------------------- */
945 static int mace_close(struct net_device *dev)
947 kio_addr_t ioaddr = dev->base_addr;
948 mace_private *lp = netdev_priv(dev);
949 dev_link_t *link = &lp->link;
951 DEBUG(2, "%s: shutting down ethercard.\n", dev->name);
953 /* Mask off all interrupts from the MACE chip. */
954 outb(0xFF, ioaddr + AM2150_MACE_BASE + MACE_IMR);
957 netif_stop_queue(dev);
962 static void netdev_get_drvinfo(struct net_device *dev,
963 struct ethtool_drvinfo *info)
965 strcpy(info->driver, DRV_NAME);
966 strcpy(info->version, DRV_VERSION);
967 sprintf(info->bus_info, "PCMCIA 0x%lx", dev->base_addr);
971 static u32 netdev_get_msglevel(struct net_device *dev)
976 static void netdev_set_msglevel(struct net_device *dev, u32 level)
980 #endif /* PCMCIA_DEBUG */
982 static struct ethtool_ops netdev_ethtool_ops = {
983 .get_drvinfo = netdev_get_drvinfo,
985 .get_msglevel = netdev_get_msglevel,
986 .set_msglevel = netdev_set_msglevel,
987 #endif /* PCMCIA_DEBUG */
990 /* ----------------------------------------------------------------------------
992 This routine begins the packet transmit function. When completed,
993 it will generate a transmit interrupt.
995 According to /usr/src/linux/net/inet/dev.c, if _start_xmit
996 returns 0, the "packet is now solely the responsibility of the
997 driver." If _start_xmit returns non-zero, the "transmission
998 failed, put skb back into a list."
999 ---------------------------------------------------------------------------- */
1001 static void mace_tx_timeout(struct net_device *dev)
1003 mace_private *lp = netdev_priv(dev);
1004 dev_link_t *link = &lp->link;
1006 printk(KERN_NOTICE "%s: transmit timed out -- ", dev->name);
1007 #if RESET_ON_TIMEOUT
1008 printk("resetting card\n");
1009 pcmcia_reset_card(link->handle, NULL);
1010 #else /* #if RESET_ON_TIMEOUT */
1011 printk("NOT resetting card\n");
1012 #endif /* #if RESET_ON_TIMEOUT */
1013 dev->trans_start = jiffies;
1014 netif_wake_queue(dev);
1017 static int mace_start_xmit(struct sk_buff *skb, struct net_device *dev)
1019 mace_private *lp = netdev_priv(dev);
1020 kio_addr_t ioaddr = dev->base_addr;
1022 netif_stop_queue(dev);
1024 DEBUG(3, "%s: mace_start_xmit(length = %ld) called.\n",
1025 dev->name, (long)skb->len);
1027 #if (!TX_INTERRUPTABLE)
1028 /* Disable MACE TX interrupts. */
1029 outb(MACE_IMR_DEFAULT | MACE_IR_XMTINT,
1030 ioaddr + AM2150_MACE_BASE + MACE_IMR);
1031 lp->tx_irq_disabled=1;
1032 #endif /* #if (!TX_INTERRUPTABLE) */
1035 /* This block must not be interrupted by another transmit request!
1036 mace_tx_timeout will take care of timer-based retransmissions from
1037 the upper layers. The interrupt handler is guaranteed never to
1038 service a transmit interrupt while we are in here.
1041 lp->linux_stats.tx_bytes += skb->len;
1042 lp->tx_free_frames--;
1044 /* WARNING: Write the _exact_ number of bytes written in the header! */
1045 /* Put out the word header [must be an outw()] . . . */
1046 outw(skb->len, ioaddr + AM2150_XMT);
1047 /* . . . and the packet [may be any combination of outw() and outb()] */
1048 outsw(ioaddr + AM2150_XMT, skb->data, skb->len >> 1);
1050 /* Odd byte transfer */
1051 outb(skb->data[skb->len-1], ioaddr + AM2150_XMT);
1054 dev->trans_start = jiffies;
1057 if (lp->tx_free_frames > 0)
1058 netif_start_queue(dev);
1059 #endif /* #if MULTI_TX */
1062 #if (!TX_INTERRUPTABLE)
1063 /* Re-enable MACE TX interrupts. */
1064 lp->tx_irq_disabled=0;
1065 outb(MACE_IMR_DEFAULT, ioaddr + AM2150_MACE_BASE + MACE_IMR);
1066 #endif /* #if (!TX_INTERRUPTABLE) */
1071 } /* mace_start_xmit */
1073 /* ----------------------------------------------------------------------------
1075 The interrupt handler.
1076 ---------------------------------------------------------------------------- */
1077 static irqreturn_t mace_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1079 struct net_device *dev = (struct net_device *) dev_id;
1080 mace_private *lp = netdev_priv(dev);
1081 kio_addr_t ioaddr = dev->base_addr;
1083 int IntrCnt = MACE_MAX_IR_ITERATIONS;
1086 DEBUG(2, "mace_interrupt(): irq 0x%X for unknown device.\n",
1091 if (lp->tx_irq_disabled) {
1093 (lp->tx_irq_disabled?
1094 KERN_NOTICE "%s: Interrupt with tx_irq_disabled "
1095 "[isr=%02X, imr=%02X]\n":
1096 KERN_NOTICE "%s: Re-entering the interrupt handler "
1097 "[isr=%02X, imr=%02X]\n"),
1099 inb(ioaddr + AM2150_MACE_BASE + MACE_IR),
1100 inb(ioaddr + AM2150_MACE_BASE + MACE_IMR)
1102 /* WARNING: MACE_IR has been read! */
1106 if (!netif_device_present(dev)) {
1107 DEBUG(2, "%s: interrupt from dead card\n", dev->name);
1112 /* WARNING: MACE_IR is a READ/CLEAR port! */
1113 status = inb(ioaddr + AM2150_MACE_BASE + MACE_IR);
1115 DEBUG(3, "mace_interrupt: irq 0x%X status 0x%X.\n", irq, status);
1117 if (status & MACE_IR_RCVINT) {
1118 mace_rx(dev, MACE_MAX_RX_ITERATIONS);
1121 if (status & MACE_IR_XMTINT) {
1122 unsigned char fifofc;
1123 unsigned char xmtrc;
1124 unsigned char xmtfs;
1126 fifofc = inb(ioaddr + AM2150_MACE_BASE + MACE_FIFOFC);
1127 if ((fifofc & MACE_FIFOFC_XMTFC)==0) {
1128 lp->linux_stats.tx_errors++;
1129 outb(0xFF, ioaddr + AM2150_XMT_SKIP);
1132 /* Transmit Retry Count (XMTRC, reg 4) */
1133 xmtrc = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTRC);
1134 if (xmtrc & MACE_XMTRC_EXDEF) lp->mace_stats.exdef++;
1135 lp->mace_stats.xmtrc += (xmtrc & MACE_XMTRC_XMTRC);
1138 (xmtfs = inb(ioaddr + AM2150_MACE_BASE + MACE_XMTFS)) &
1139 MACE_XMTFS_XMTSV /* Transmit Status Valid */
1141 lp->mace_stats.xmtsv++;
1143 if (xmtfs & ~MACE_XMTFS_XMTSV) {
1144 if (xmtfs & MACE_XMTFS_UFLO) {
1145 /* Underflow. Indicates that the Transmit FIFO emptied before
1146 the end of frame was reached. */
1147 lp->mace_stats.uflo++;
1149 if (xmtfs & MACE_XMTFS_LCOL) {
1150 /* Late Collision */
1151 lp->mace_stats.lcol++;
1153 if (xmtfs & MACE_XMTFS_MORE) {
1154 /* MORE than one retry was needed */
1155 lp->mace_stats.more++;
1157 if (xmtfs & MACE_XMTFS_ONE) {
1158 /* Exactly ONE retry occurred */
1159 lp->mace_stats.one++;
1161 if (xmtfs & MACE_XMTFS_DEFER) {
1162 /* Transmission was defered */
1163 lp->mace_stats.defer++;
1165 if (xmtfs & MACE_XMTFS_LCAR) {
1166 /* Loss of carrier */
1167 lp->mace_stats.lcar++;
1169 if (xmtfs & MACE_XMTFS_RTRY) {
1170 /* Retry error: transmit aborted after 16 attempts */
1171 lp->mace_stats.rtry++;
1173 } /* if (xmtfs & ~MACE_XMTFS_XMTSV) */
1175 } /* if (xmtfs & MACE_XMTFS_XMTSV) */
1177 lp->linux_stats.tx_packets++;
1178 lp->tx_free_frames++;
1179 netif_wake_queue(dev);
1180 } /* if (status & MACE_IR_XMTINT) */
1182 if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) {
1183 if (status & MACE_IR_JAB) {
1184 /* Jabber Error. Excessive transmit duration (20-150ms). */
1185 lp->mace_stats.jab++;
1187 if (status & MACE_IR_BABL) {
1188 /* Babble Error. >1518 bytes transmitted. */
1189 lp->mace_stats.babl++;
1191 if (status & MACE_IR_CERR) {
1192 /* Collision Error. CERR indicates the absence of the
1193 Signal Quality Error Test message after a packet
1195 lp->mace_stats.cerr++;
1197 if (status & MACE_IR_RCVCCO) {
1198 /* Receive Collision Count Overflow; */
1199 lp->mace_stats.rcvcco++;
1201 if (status & MACE_IR_RNTPCO) {
1202 /* Runt Packet Count Overflow */
1203 lp->mace_stats.rntpco++;
1205 if (status & MACE_IR_MPCO) {
1206 /* Missed Packet Count Overflow */
1207 lp->mace_stats.mpco++;
1209 } /* if (status & ~MACE_IMR_DEFAULT & ~MACE_IR_RCVINT & ~MACE_IR_XMTINT) */
1211 } while ((status & ~MACE_IMR_DEFAULT) && (--IntrCnt));
1214 } /* mace_interrupt */
1216 /* ----------------------------------------------------------------------------
1219 ---------------------------------------------------------------------------- */
1220 static int mace_rx(struct net_device *dev, unsigned char RxCnt)
1222 mace_private *lp = netdev_priv(dev);
1223 kio_addr_t ioaddr = dev->base_addr;
1224 unsigned char rx_framecnt;
1225 unsigned short rx_status;
1228 ((rx_framecnt = inb(ioaddr + AM2150_RCV_FRAME_COUNT)) > 0) &&
1229 (rx_framecnt <= 12) && /* rx_framecnt==0xFF if card is extracted. */
1232 rx_status = inw(ioaddr + AM2150_RCV);
1234 DEBUG(3, "%s: in mace_rx(), framecnt 0x%X, rx_status"
1235 " 0x%X.\n", dev->name, rx_framecnt, rx_status);
1237 if (rx_status & MACE_RCVFS_RCVSTS) { /* Error, update stats. */
1238 lp->linux_stats.rx_errors++;
1239 if (rx_status & MACE_RCVFS_OFLO) {
1240 lp->mace_stats.oflo++;
1242 if (rx_status & MACE_RCVFS_CLSN) {
1243 lp->mace_stats.clsn++;
1245 if (rx_status & MACE_RCVFS_FRAM) {
1246 lp->mace_stats.fram++;
1248 if (rx_status & MACE_RCVFS_FCS) {
1249 lp->mace_stats.fcs++;
1252 short pkt_len = (rx_status & ~MACE_RCVFS_RCVSTS) - 4;
1253 /* Auto Strip is off, always subtract 4 */
1254 struct sk_buff *skb;
1256 lp->mace_stats.rfs_rntpc += inb(ioaddr + AM2150_RCV);
1257 /* runt packet count */
1258 lp->mace_stats.rfs_rcvcc += inb(ioaddr + AM2150_RCV);
1259 /* rcv collision count */
1261 DEBUG(3, " receiving packet size 0x%X rx_status"
1262 " 0x%X.\n", pkt_len, rx_status);
1264 skb = dev_alloc_skb(pkt_len+2);
1269 skb_reserve(skb, 2);
1270 insw(ioaddr + AM2150_RCV, skb_put(skb, pkt_len), pkt_len>>1);
1272 *(skb->tail-1) = inb(ioaddr + AM2150_RCV);
1273 skb->protocol = eth_type_trans(skb, dev);
1275 netif_rx(skb); /* Send the packet to the upper (protocol) layers. */
1277 dev->last_rx = jiffies;
1278 lp->linux_stats.rx_packets++;
1279 lp->linux_stats.rx_bytes += skb->len;
1280 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1283 DEBUG(1, "%s: couldn't allocate a sk_buff of size"
1284 " %d.\n", dev->name, pkt_len);
1285 lp->linux_stats.rx_dropped++;
1288 outb(0xFF, ioaddr + AM2150_RCV_NEXT); /* skip to next frame */
1294 /* ----------------------------------------------------------------------------
1296 ---------------------------------------------------------------------------- */
1297 static void pr_linux_stats(struct net_device_stats *pstats)
1299 DEBUG(2, "pr_linux_stats\n");
1300 DEBUG(2, " rx_packets=%-7ld tx_packets=%ld\n",
1301 (long)pstats->rx_packets, (long)pstats->tx_packets);
1302 DEBUG(2, " rx_errors=%-7ld tx_errors=%ld\n",
1303 (long)pstats->rx_errors, (long)pstats->tx_errors);
1304 DEBUG(2, " rx_dropped=%-7ld tx_dropped=%ld\n",
1305 (long)pstats->rx_dropped, (long)pstats->tx_dropped);
1306 DEBUG(2, " multicast=%-7ld collisions=%ld\n",
1307 (long)pstats->multicast, (long)pstats->collisions);
1309 DEBUG(2, " rx_length_errors=%-7ld rx_over_errors=%ld\n",
1310 (long)pstats->rx_length_errors, (long)pstats->rx_over_errors);
1311 DEBUG(2, " rx_crc_errors=%-7ld rx_frame_errors=%ld\n",
1312 (long)pstats->rx_crc_errors, (long)pstats->rx_frame_errors);
1313 DEBUG(2, " rx_fifo_errors=%-7ld rx_missed_errors=%ld\n",
1314 (long)pstats->rx_fifo_errors, (long)pstats->rx_missed_errors);
1316 DEBUG(2, " tx_aborted_errors=%-7ld tx_carrier_errors=%ld\n",
1317 (long)pstats->tx_aborted_errors, (long)pstats->tx_carrier_errors);
1318 DEBUG(2, " tx_fifo_errors=%-7ld tx_heartbeat_errors=%ld\n",
1319 (long)pstats->tx_fifo_errors, (long)pstats->tx_heartbeat_errors);
1320 DEBUG(2, " tx_window_errors=%ld\n",
1321 (long)pstats->tx_window_errors);
1322 } /* pr_linux_stats */
1324 /* ----------------------------------------------------------------------------
1326 ---------------------------------------------------------------------------- */
1327 static void pr_mace_stats(mace_statistics *pstats)
1329 DEBUG(2, "pr_mace_stats\n");
1331 DEBUG(2, " xmtsv=%-7d uflo=%d\n",
1332 pstats->xmtsv, pstats->uflo);
1333 DEBUG(2, " lcol=%-7d more=%d\n",
1334 pstats->lcol, pstats->more);
1335 DEBUG(2, " one=%-7d defer=%d\n",
1336 pstats->one, pstats->defer);
1337 DEBUG(2, " lcar=%-7d rtry=%d\n",
1338 pstats->lcar, pstats->rtry);
1341 DEBUG(2, " exdef=%-7d xmtrc=%d\n",
1342 pstats->exdef, pstats->xmtrc);
1344 /* RFS1--Receive Status (RCVSTS) */
1345 DEBUG(2, " oflo=%-7d clsn=%d\n",
1346 pstats->oflo, pstats->clsn);
1347 DEBUG(2, " fram=%-7d fcs=%d\n",
1348 pstats->fram, pstats->fcs);
1350 /* RFS2--Runt Packet Count (RNTPC) */
1351 /* RFS3--Receive Collision Count (RCVCC) */
1352 DEBUG(2, " rfs_rntpc=%-7d rfs_rcvcc=%d\n",
1353 pstats->rfs_rntpc, pstats->rfs_rcvcc);
1356 DEBUG(2, " jab=%-7d babl=%d\n",
1357 pstats->jab, pstats->babl);
1358 DEBUG(2, " cerr=%-7d rcvcco=%d\n",
1359 pstats->cerr, pstats->rcvcco);
1360 DEBUG(2, " rntpco=%-7d mpco=%d\n",
1361 pstats->rntpco, pstats->mpco);
1364 DEBUG(2, " mpc=%d\n", pstats->mpc);
1367 DEBUG(2, " rntpc=%d\n", pstats->rntpc);
1370 DEBUG(2, " rcvcc=%d\n", pstats->rcvcc);
1372 } /* pr_mace_stats */
1374 /* ----------------------------------------------------------------------------
1376 Update statistics. We change to register window 1, so this
1377 should be run single-threaded if the device is active. This is
1378 expected to be a rare operation, and it's simpler for the rest
1379 of the driver to assume that window 0 is always valid rather
1380 than use a special window-state variable.
1382 oflo & uflo should _never_ occur since it would mean the Xilinx
1383 was not able to transfer data between the MACE FIFO and the
1384 card's SRAM fast enough. If this happens, something is
1385 seriously wrong with the hardware.
1386 ---------------------------------------------------------------------------- */
1387 static void update_stats(kio_addr_t ioaddr, struct net_device *dev)
1389 mace_private *lp = netdev_priv(dev);
1391 lp->mace_stats.rcvcc += mace_read(lp, ioaddr, MACE_RCVCC);
1392 lp->mace_stats.rntpc += mace_read(lp, ioaddr, MACE_RNTPC);
1393 lp->mace_stats.mpc += mace_read(lp, ioaddr, MACE_MPC);
1394 /* At this point, mace_stats is fully updated for this call.
1395 We may now update the linux_stats. */
1397 /* The MACE has no equivalent for linux_stats field which are commented
1400 /* lp->linux_stats.multicast; */
1401 lp->linux_stats.collisions =
1402 lp->mace_stats.rcvcco * 256 + lp->mace_stats.rcvcc;
1403 /* Collision: The MACE may retry sending a packet 15 times
1404 before giving up. The retry count is in XMTRC.
1405 Does each retry constitute a collision?
1406 If so, why doesn't the RCVCC record these collisions? */
1408 /* detailed rx_errors: */
1409 lp->linux_stats.rx_length_errors =
1410 lp->mace_stats.rntpco * 256 + lp->mace_stats.rntpc;
1411 /* lp->linux_stats.rx_over_errors */
1412 lp->linux_stats.rx_crc_errors = lp->mace_stats.fcs;
1413 lp->linux_stats.rx_frame_errors = lp->mace_stats.fram;
1414 lp->linux_stats.rx_fifo_errors = lp->mace_stats.oflo;
1415 lp->linux_stats.rx_missed_errors =
1416 lp->mace_stats.mpco * 256 + lp->mace_stats.mpc;
1418 /* detailed tx_errors */
1419 lp->linux_stats.tx_aborted_errors = lp->mace_stats.rtry;
1420 lp->linux_stats.tx_carrier_errors = lp->mace_stats.lcar;
1421 /* LCAR usually results from bad cabling. */
1422 lp->linux_stats.tx_fifo_errors = lp->mace_stats.uflo;
1423 lp->linux_stats.tx_heartbeat_errors = lp->mace_stats.cerr;
1424 /* lp->linux_stats.tx_window_errors; */
1427 } /* update_stats */
1429 /* ----------------------------------------------------------------------------
1431 Gathers ethernet statistics from the MACE chip.
1432 ---------------------------------------------------------------------------- */
1433 static struct net_device_stats *mace_get_stats(struct net_device *dev)
1435 mace_private *lp = netdev_priv(dev);
1437 update_stats(dev->base_addr, dev);
1439 DEBUG(1, "%s: updating the statistics.\n", dev->name);
1440 pr_linux_stats(&lp->linux_stats);
1441 pr_mace_stats(&lp->mace_stats);
1443 return &lp->linux_stats;
1444 } /* net_device_stats */
1446 /* ----------------------------------------------------------------------------
1448 Modified from Am79C90 data sheet.
1449 ---------------------------------------------------------------------------- */
1451 #ifdef BROKEN_MULTICAST
1453 static void updateCRC(int *CRC, int bit)
1460 }; /* CRC polynomial. poly[n] = coefficient of the x**n term of the
1461 CRC generator polynomial. */
1465 /* shift CRC and control bit (CRC[32]) */
1466 for (j = 32; j > 0; j--)
1470 /* If bit XOR(control bit) = 1, set CRC = CRC XOR polynomial. */
1472 for (j = 0; j < 32; j++)
1476 /* ----------------------------------------------------------------------------
1478 Build logical address filter.
1479 Modified from Am79C90 data sheet.
1482 ladrf: logical address filter (contents initialized to 0)
1483 adr: ethernet address
1484 ---------------------------------------------------------------------------- */
1485 static void BuildLAF(int *ladrf, int *adr)
1487 int CRC[33]={1}; /* CRC register, 1 word/bit + extra control bit */
1489 int i, byte; /* temporary array indices */
1490 int hashcode; /* the output object */
1494 for (byte = 0; byte < 6; byte++)
1495 for (i = 0; i < 8; i++)
1496 updateCRC(CRC, (adr[byte] >> i) & 1);
1499 for (i = 0; i < 6; i++)
1500 hashcode = (hashcode << 1) + CRC[i];
1502 byte = hashcode >> 3;
1503 ladrf[byte] |= (1 << (hashcode & 7));
1507 printk(KERN_DEBUG " adr =");
1508 for (i = 0; i < 6; i++)
1509 printk(" %02X", adr[i]);
1510 printk("\n" KERN_DEBUG " hashcode = %d(decimal), ladrf[0:63]"
1512 for (i = 0; i < 8; i++)
1513 printk(" %02X", ladrf[i]);
1519 /* ----------------------------------------------------------------------------
1520 restore_multicast_list
1521 Restores the multicast filter for MACE chip to the last
1522 set_multicast_list() call.
1527 ---------------------------------------------------------------------------- */
1528 static void restore_multicast_list(struct net_device *dev)
1530 mace_private *lp = netdev_priv(dev);
1531 int num_addrs = lp->multicast_num_addrs;
1532 int *ladrf = lp->multicast_ladrf;
1533 kio_addr_t ioaddr = dev->base_addr;
1536 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n",
1537 dev->name, num_addrs);
1539 if (num_addrs > 0) {
1541 DEBUG(1, "Attempt to restore multicast list detected.\n");
1543 mace_write(lp, ioaddr, MACE_IAC, MACE_IAC_ADDRCHG | MACE_IAC_LOGADDR);
1544 /* Poll ADDRCHG bit */
1545 while (mace_read(lp, ioaddr, MACE_IAC) & MACE_IAC_ADDRCHG)
1547 /* Set LADRF register */
1548 for (i = 0; i < MACE_LADRF_LEN; i++)
1549 mace_write(lp, ioaddr, MACE_LADRF, ladrf[i]);
1551 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_RCVFCSE | MACE_UTR_LOOP_EXTERNAL);
1552 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1554 } else if (num_addrs < 0) {
1556 /* Promiscuous mode: receive all packets */
1557 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1558 mace_write(lp, ioaddr, MACE_MACCC,
1559 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1565 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1566 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1569 } /* restore_multicast_list */
1571 /* ----------------------------------------------------------------------------
1573 Set or clear the multicast filter for this adaptor.
1576 num_addrs == -1 Promiscuous mode, receive all packets
1577 num_addrs == 0 Normal mode, clear multicast list
1578 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1579 best-effort filtering.
1583 ---------------------------------------------------------------------------- */
1585 static void set_multicast_list(struct net_device *dev)
1587 mace_private *lp = netdev_priv(dev);
1588 int adr[ETHER_ADDR_LEN] = {0}; /* Ethernet address */
1590 struct dev_mc_list *dmi = dev->mc_list;
1595 if (dev->mc_count != old) {
1596 old = dev->mc_count;
1597 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1603 /* Set multicast_num_addrs. */
1604 lp->multicast_num_addrs = dev->mc_count;
1606 /* Set multicast_ladrf. */
1607 if (num_addrs > 0) {
1608 /* Calculate multicast logical address filter */
1609 memset(lp->multicast_ladrf, 0, MACE_LADRF_LEN);
1610 for (i = 0; i < dev->mc_count; i++) {
1611 memcpy(adr, dmi->dmi_addr, ETHER_ADDR_LEN);
1613 BuildLAF(lp->multicast_ladrf, adr);
1617 restore_multicast_list(dev);
1619 } /* set_multicast_list */
1621 #endif /* BROKEN_MULTICAST */
1623 static void restore_multicast_list(struct net_device *dev)
1625 kio_addr_t ioaddr = dev->base_addr;
1626 mace_private *lp = netdev_priv(dev);
1628 DEBUG(2, "%s: restoring Rx mode to %d addresses.\n", dev->name,
1629 lp->multicast_num_addrs);
1631 if (dev->flags & IFF_PROMISC) {
1632 /* Promiscuous mode: receive all packets */
1633 mace_write(lp,ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1634 mace_write(lp, ioaddr, MACE_MACCC,
1635 MACE_MACCC_PROM | MACE_MACCC_ENXMT | MACE_MACCC_ENRCV
1639 mace_write(lp, ioaddr, MACE_UTR, MACE_UTR_LOOP_EXTERNAL);
1640 mace_write(lp, ioaddr, MACE_MACCC, MACE_MACCC_ENXMT | MACE_MACCC_ENRCV);
1642 } /* restore_multicast_list */
1644 static void set_multicast_list(struct net_device *dev)
1646 mace_private *lp = netdev_priv(dev);
1651 if (dev->mc_count != old) {
1652 old = dev->mc_count;
1653 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1659 lp->multicast_num_addrs = dev->mc_count;
1660 restore_multicast_list(dev);
1662 } /* set_multicast_list */
1664 static struct pcmcia_device_id nmclan_ids[] = {
1665 PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941),
1666 PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet+", 0xebf1d60, 0xad673aaf),
1669 MODULE_DEVICE_TABLE(pcmcia, nmclan_ids);
1671 static struct pcmcia_driver nmclan_cs_driver = {
1672 .owner = THIS_MODULE,
1674 .name = "nmclan_cs",
1676 .attach = nmclan_attach,
1677 .event = nmclan_event,
1678 .remove = nmclan_detach,
1679 .id_table = nmclan_ids,
1680 .suspend = nmclan_suspend,
1681 .resume = nmclan_resume,
1684 static int __init init_nmclan_cs(void)
1686 return pcmcia_register_driver(&nmclan_cs_driver);
1689 static void __exit exit_nmclan_cs(void)
1691 pcmcia_unregister_driver(&nmclan_cs_driver);
1694 module_init(init_nmclan_cs);
1695 module_exit(exit_nmclan_cs);