drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <net/mac80211.h>
  39
  40 #include <linux/etherdevice.h>
  41
  42 #define IWL 3945
  43
  44 #include "iwlwifi.h"
  45 #include "iwl-helpers.h"
  46 #include "iwl-3945.h"
  47 #include "iwl-3945-rs.h"
  48
  49 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  50         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  51                                     IWL_RATE_##r##M_IEEE,   \
  52                                     IWL_RATE_##ip##M_INDEX, \
  53                                     IWL_RATE_##in##M_INDEX, \
  54                                     IWL_RATE_##rp##M_INDEX, \
  55                                     IWL_RATE_##rn##M_INDEX, \
  56                                     IWL_RATE_##pp##M_INDEX, \
  57                                     IWL_RATE_##np##M_INDEX, \
  58                                     IWL_RATE_##r##M_INDEX_TABLE, \
  59                                     IWL_RATE_##ip##M_INDEX_TABLE }
  60
  61 /*
  62  * Parameter order:
  63  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  64  *
  65  * If there isn't a valid next or previous rate then INV is used which
  66  * maps to IWL_RATE_INVALID
  67  *
  68  */
  69 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  70         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  71         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  72         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  73         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  74         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  75         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  76         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  77         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  78         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  79         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  80         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  81         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  82 };
  83
  84 /* 1 = enable the iwl_disable_events() function */
  85 #define IWL_EVT_DISABLE (0)
  86 #define IWL_EVT_DISABLE_SIZE (1532/32)
  87
  88 /**
  89  * iwl_disable_events - Disable selected events in uCode event log
  90  *
  91  * Disable an event by writing "1"s into "disable"
  92  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  93  *   Default values of 0 enable uCode events to be logged.
  94  * Use for only special debugging.  This function is just a placeholder as-is,
  95  *   you'll need to provide the special bits! ...
  96  *   ... and set IWL_EVT_DISABLE to 1. */
  97 void iwl_disable_events(struct iwl_priv *priv)
  98 {
  99         int ret;
 100         int i;
 101         u32 base;               /* SRAM address of event log header */
 102         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 103         u32 array_size;         /* # of u32 entries in array */
 104         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 105                 0x00000000,     /*   31 -    0  Event id numbers */
 106                 0x00000000,     /*   63 -   32 */
 107                 0x00000000,     /*   95 -   64 */
 108                 0x00000000,     /*  127 -   96 */
 109                 0x00000000,     /*  159 -  128 */
 110                 0x00000000,     /*  191 -  160 */
 111                 0x00000000,     /*  223 -  192 */
 112                 0x00000000,     /*  255 -  224 */
 113                 0x00000000,     /*  287 -  256 */
 114                 0x00000000,     /*  319 -  288 */
 115                 0x00000000,     /*  351 -  320 */
 116                 0x00000000,     /*  383 -  352 */
 117                 0x00000000,     /*  415 -  384 */
 118                 0x00000000,     /*  447 -  416 */
 119                 0x00000000,     /*  479 -  448 */
 120                 0x00000000,     /*  511 -  480 */
 121                 0x00000000,     /*  543 -  512 */
 122                 0x00000000,     /*  575 -  544 */
 123                 0x00000000,     /*  607 -  576 */
 124                 0x00000000,     /*  639 -  608 */
 125                 0x00000000,     /*  671 -  640 */
 126                 0x00000000,     /*  703 -  672 */
 127                 0x00000000,     /*  735 -  704 */
 128                 0x00000000,     /*  767 -  736 */
 129                 0x00000000,     /*  799 -  768 */
 130                 0x00000000,     /*  831 -  800 */
 131                 0x00000000,     /*  863 -  832 */
 132                 0x00000000,     /*  895 -  864 */
 133                 0x00000000,     /*  927 -  896 */
 134                 0x00000000,     /*  959 -  928 */
 135                 0x00000000,     /*  991 -  960 */
 136                 0x00000000,     /* 1023 -  992 */
 137                 0x00000000,     /* 1055 - 1024 */
 138                 0x00000000,     /* 1087 - 1056 */
 139                 0x00000000,     /* 1119 - 1088 */
 140                 0x00000000,     /* 1151 - 1120 */
 141                 0x00000000,     /* 1183 - 1152 */
 142                 0x00000000,     /* 1215 - 1184 */
 143                 0x00000000,     /* 1247 - 1216 */
 144                 0x00000000,     /* 1279 - 1248 */
 145                 0x00000000,     /* 1311 - 1280 */
 146                 0x00000000,     /* 1343 - 1312 */
 147                 0x00000000,     /* 1375 - 1344 */
 148                 0x00000000,     /* 1407 - 1376 */
 149                 0x00000000,     /* 1439 - 1408 */
 150                 0x00000000,     /* 1471 - 1440 */
 151                 0x00000000,     /* 1503 - 1472 */
 152         };
 153
 154         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 155         if (!iwl_hw_valid_rtc_data_addr(base)) {
 156                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 157                 return;
 158         }
 159
 160         ret = iwl_grab_nic_access(priv);
 161         if (ret) {
 162                 IWL_WARNING("Can not read from adapter at this time.\n");
 163                 return;
 164         }
 165
 166         disable_ptr = iwl_read_targ_mem(priv, base + (4 * sizeof(u32)));
 167         array_size = iwl_read_targ_mem(priv, base + (5 * sizeof(u32)));
 168         iwl_release_nic_access(priv);
 169
 170         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 171                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 172                                disable_ptr);
 173                 ret = iwl_grab_nic_access(priv);
 174                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 175                         iwl_write_targ_mem(priv,
 176                                            disable_ptr + (i * sizeof(u32)),
 177                                            evt_disable[i]);
 178
 179                 iwl_release_nic_access(priv);
 180         } else {
 181                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 182                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 183                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 184                                disable_ptr, array_size);
 185         }
 186
 187 }
 188
 189 /**
 190  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 191  * @priv: eeprom and antenna fields are used to determine antenna flags
 192  *
 193  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 194  * priv->antenna specifies the antenna diversity mode:
 195  *
 196  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 197  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 198  * IWL_ANTENNA_AUX       - Force AUX antenna
 199  */
 200 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
 201 {
 202         switch (priv->antenna) {
 203         case IWL_ANTENNA_DIVERSITY:
 204                 return 0;
 205
 206         case IWL_ANTENNA_MAIN:
 207                 if (priv->eeprom.antenna_switch_type)
 208                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 209                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 210
 211         case IWL_ANTENNA_AUX:
 212                 if (priv->eeprom.antenna_switch_type)
 213                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 214                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 215         }
 216
 217         /* bad antenna selector value */
 218         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 219         return 0;               /* "diversity" is default if error */
 220 }
 221
 222 /*****************************************************************************
 223  *
 224  * Intel PRO/Wireless 3945ABG/BG Network Connection
 225  *
 226  *  RX handler implementations
 227  *
 228  *  Used by iwl-base.c
 229  *
 230  *****************************************************************************/
 231
 232 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
 233 {
 234         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 235         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 236                      (int)sizeof(struct iwl_notif_statistics),
 237                      le32_to_cpu(pkt->len));
 238
 239         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 240
 241         priv->last_statistics_time = jiffies;
 242 }
 243
 244 static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
 245                                    struct iwl_rx_mem_buffer *rxb,
 246                                    struct ieee80211_rx_status *stats,
 247                                    u16 phy_flags)
 248 {
 249         struct ieee80211_hdr *hdr;
 250         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
 251         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 252         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 253         short len = le16_to_cpu(rx_hdr->len);
 254
 255         /* We received data from the HW, so stop the watchdog */
 256         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 257                 IWL_DEBUG_DROP("Corruption detected!\n");
 258                 return;
 259         }
 260
 261         /* We only process data packets if the interface is open */
 262         if (unlikely(!priv->is_open)) {
 263                 IWL_DEBUG_DROP_LIMIT
 264                     ("Dropping packet while interface is not open.\n");
 265                 return;
 266         }
 267         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 268                 if (iwl_param_hwcrypto)
 269                         iwl_set_decrypted_flag(priv, rxb->skb,
 270                                                le32_to_cpu(rx_end->status),
 271                                                stats);
 272                 iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
 273                                                len, stats, phy_flags);
 274                 return;
 275         }
 276
 277         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 278         /* Set the size of the skb to the size of the frame */
 279         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 280
 281         hdr = (void *)rxb->skb->data;
 282
 283         if (iwl_param_hwcrypto)
 284                 iwl_set_decrypted_flag(priv, rxb->skb,
 285                                        le32_to_cpu(rx_end->status), stats);
 286
 287         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 288         rxb->skb = NULL;
 289 }
 290
 291 static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
 292                                 struct iwl_rx_mem_buffer *rxb)
 293 {
 294         struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
 295         struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 296         struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 297         struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
 298         struct ieee80211_hdr *header;
 299         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 300         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 301         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 302         struct ieee80211_rx_status stats = {
 303                 .mactime = le64_to_cpu(rx_end->timestamp),
 304                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 305                 .channel = le16_to_cpu(rx_hdr->channel),
 306                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 307                 MODE_IEEE80211G : MODE_IEEE80211A,
 308                 .antenna = 0,
 309                 .rate = rx_hdr->rate,
 310                 .flag = 0,
 311         };
 312         u8 network_packet;
 313         int snr;
 314
 315         if ((unlikely(rx_stats->phy_count > 20))) {
 316                 IWL_DEBUG_DROP
 317                     ("dsp size out of range [0,20]: "
 318                      "%d/n", rx_stats->phy_count);
 319                 return;
 320         }
 321
 322         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 323             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 324                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 325                 return;
 326         }
 327
 328         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 329                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
 330                 return;
 331         }
 332
 333         /* Convert 3945's rssi indicator to dBm */
 334         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 335
 336         /* Set default noise value to -127 */
 337         if (priv->last_rx_noise == 0)
 338                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 339
 340         /* 3945 provides noise info for OFDM frames only.
 341          * sig_avg and noise_diff are measured by the 3945's digital signal
 342          *   processor (DSP), and indicate linear levels of signal level and
 343          *   distortion/noise within the packet preamble after
 344          *   automatic gain control (AGC).  sig_avg should stay fairly
 345          *   constant if the radio's AGC is working well.
 346          * Since these values are linear (not dB or dBm), linear
 347          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 348          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 349          *   to obtain noise level in dBm.
 350          * Calculate stats.signal (quality indicator in %) based on SNR. */
 351         if (rx_stats_noise_diff) {
 352                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 353                 stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
 354                 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
 355
 356         /* If noise info not available, calculate signal quality indicator (%)
 357          *   using just the dBm signal level. */
 358         } else {
 359                 stats.noise = priv->last_rx_noise;
 360                 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
 361         }
 362
 363
 364         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 365                         stats.ssi, stats.noise, stats.signal,
 366                         rx_stats_sig_avg, rx_stats_noise_diff);
 367
 368         stats.freq = ieee80211chan2mhz(stats.channel);
 369
 370         /* can be covered by iwl_report_frame() in most cases */
 371 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 372
 373         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 374
 375         network_packet = iwl_is_network_packet(priv, header);
 376
 377 #ifdef CONFIG_IWLWIFI_DEBUG
 378         if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
 379                 IWL_DEBUG_STATS
 380                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 381                      network_packet ? '*' : ' ',
 382                      stats.channel, stats.ssi, stats.ssi,
 383                      stats.ssi, stats.rate);
 384
 385         if (iwl_debug_level & (IWL_DL_RX))
 386                 /* Set "1" to report good data frames in groups of 100 */
 387                 iwl_report_frame(priv, pkt, header, 1);
 388 #endif
 389
 390         if (network_packet) {
 391                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 392                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 393                 priv->last_rx_rssi = stats.ssi;
 394                 priv->last_rx_noise = stats.noise;
 395         }
 396
 397         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 398         case IEEE80211_FTYPE_MGMT:
 399                 switch (le16_to_cpu(header->frame_control) &
 400                         IEEE80211_FCTL_STYPE) {
 401                 case IEEE80211_STYPE_PROBE_RESP:
 402                 case IEEE80211_STYPE_BEACON:{
 403                                 /* If this is a beacon or probe response for
 404                                  * our network then cache the beacon
 405                                  * timestamp */
 406                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 407                                       && !compare_ether_addr(header->addr2,
 408                                                              priv->bssid)) ||
 409                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 410                                       && !compare_ether_addr(header->addr3,
 411                                                              priv->bssid)))) {
 412                                         struct ieee80211_mgmt *mgmt =
 413                                             (struct ieee80211_mgmt *)header;
 414                                         __le32 *pos;
 415                                         pos =
 416                                             (__le32 *) & mgmt->u.beacon.
 417                                             timestamp;
 418                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 419                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 420                                         priv->beacon_int = le16_to_cpu(
 421                                             mgmt->u.beacon.beacon_int);
 422                                         if (priv->call_post_assoc_from_beacon &&
 423                                             (priv->iw_mode ==
 424                                                 IEEE80211_IF_TYPE_STA))
 425                                                 queue_work(priv->workqueue,
 426                                                     &priv->post_associate.work);
 427
 428                                         priv->call_post_assoc_from_beacon = 0;
 429                                 }
 430
 431                                 break;
 432                         }
 433
 434                 case IEEE80211_STYPE_ACTION:
 435                         /* TODO: Parse 802.11h frames for CSA... */
 436                         break;
 437
 438                         /*
 439                          * TODO: There is no callback function from upper
 440                          * stack to inform us when associated status. this
 441                          * work around to sniff assoc_resp management frame
 442                          * and finish the association process.
 443                          */
 444                 case IEEE80211_STYPE_ASSOC_RESP:
 445                 case IEEE80211_STYPE_REASSOC_RESP:{
 446                                 struct ieee80211_mgmt *mgnt =
 447                                     (struct ieee80211_mgmt *)header;
 448                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 449                                                   le16_to_cpu(mgnt->u.
 450                                                               assoc_resp.aid));
 451                                 priv->assoc_capability =
 452                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 453                                 if (priv->beacon_int)
 454                                         queue_work(priv->workqueue,
 455                                             &priv->post_associate.work);
 456                                 else
 457                                         priv->call_post_assoc_from_beacon = 1;
 458                                 break;
 459                         }
 460
 461                 case IEEE80211_STYPE_PROBE_REQ:{
 462                                 DECLARE_MAC_BUF(mac1);
 463                                 DECLARE_MAC_BUF(mac2);
 464                                 DECLARE_MAC_BUF(mac3);
 465                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 466                                         IWL_DEBUG_DROP
 467                                             ("Dropping (non network): %s"
 468                                              ", %s, %s\n",
 469                                              print_mac(mac1, header->addr1),
 470                                              print_mac(mac2, header->addr2),
 471                                              print_mac(mac3, header->addr3));
 472                                 return;
 473                         }
 474                 }
 475
 476                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
 477                 break;
 478
 479         case IEEE80211_FTYPE_CTL:
 480                 break;
 481
 482         case IEEE80211_FTYPE_DATA: {
 483                 DECLARE_MAC_BUF(mac1);
 484                 DECLARE_MAC_BUF(mac2);
 485                 DECLARE_MAC_BUF(mac3);
 486
 487                 if (unlikely(is_duplicate_packet(priv, header)))
 488                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 489                                        print_mac(mac1, header->addr1),
 490                                        print_mac(mac2, header->addr2),
 491                                        print_mac(mac3, header->addr3));
 492                 else
 493                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
 494                                                    phy_flags);
 495                 break;
 496         }
 497         }
 498 }
 499
 500 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
 501                                  dma_addr_t addr, u16 len)
 502 {
 503         int count;
 504         u32 pad;
 505         struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
 506
 507         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 508         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 509
 510         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 511                 IWL_ERROR("Error can not send more than %d chunks\n",
 512                           NUM_TFD_CHUNKS);
 513                 return -EINVAL;
 514         }
 515
 516         tfd->pa[count].addr = cpu_to_le32(addr);
 517         tfd->pa[count].len = cpu_to_le32(len);
 518
 519         count++;
 520
 521         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 522                                          TFD_CTL_PAD_SET(pad));
 523
 524         return 0;
 525 }
 526
 527 /**
 528  * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 529  *
 530  * Does NOT advance any indexes
 531  */
 532 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
 533 {
 534         struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
 535         struct iwl_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 536         struct pci_dev *dev = priv->pci_dev;
 537         int i;
 538         int counter;
 539
 540         /* classify bd */
 541         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 542                 /* nothing to cleanup after for host commands */
 543                 return 0;
 544
 545         /* sanity check */
 546         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 547         if (counter > NUM_TFD_CHUNKS) {
 548                 IWL_ERROR("Too many chunks: %i\n", counter);
 549                 /* @todo issue fatal error, it is quite serious situation */
 550                 return 0;
 551         }
 552
 553         /* unmap chunks if any */
 554
 555         for (i = 1; i < counter; i++) {
 556                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 557                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 558                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 559                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 560                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 561                                 /* Can be called from interrupt context */
 562                                 dev_kfree_skb_any(skb);
 563                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 564                         }
 565                 }
 566         }
 567         return 0;
 568 }
 569
 570 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
 571 {
 572         int i;
 573         int ret = IWL_INVALID_STATION;
 574         unsigned long flags;
 575         DECLARE_MAC_BUF(mac);
 576
 577         spin_lock_irqsave(&priv->sta_lock, flags);
 578         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 579                 if ((priv->stations[i].used) &&
 580                     (!compare_ether_addr
 581                      (priv->stations[i].sta.sta.addr, addr))) {
 582                         ret = i;
 583                         goto out;
 584                 }
 585
 586         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 587                        print_mac(mac, addr), priv->num_stations);
 588  out:
 589         spin_unlock_irqrestore(&priv->sta_lock, flags);
 590         return ret;
 591 }
 592
 593 /**
 594  * iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 595  *
 596 */
 597 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
 598                               struct iwl_cmd *cmd,
 599                               struct ieee80211_tx_control *ctrl,
 600                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 601 {
 602         unsigned long flags;
 603         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 604         u16 rate_mask;
 605         int rate;
 606         u8 rts_retry_limit;
 607         u8 data_retry_limit;
 608         __le32 tx_flags;
 609         u16 fc = le16_to_cpu(hdr->frame_control);
 610
 611         rate = iwl_rates[rate_index].plcp;
 612         tx_flags = cmd->cmd.tx.tx_flags;
 613
 614         /* We need to figure out how to get the sta->supp_rates while
 615          * in this running context; perhaps encoding into ctrl->tx_rate? */
 616         rate_mask = IWL_RATES_MASK;
 617
 618         spin_lock_irqsave(&priv->sta_lock, flags);
 619
 620         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 621
 622         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 623             (sta_id != IWL3945_BROADCAST_ID) &&
 624                 (sta_id != IWL_MULTICAST_ID))
 625                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 626
 627         spin_unlock_irqrestore(&priv->sta_lock, flags);
 628
 629         if (tx_id >= IWL_CMD_QUEUE_NUM)
 630                 rts_retry_limit = 3;
 631         else
 632                 rts_retry_limit = 7;
 633
 634         if (ieee80211_is_probe_response(fc)) {
 635                 data_retry_limit = 3;
 636                 if (data_retry_limit < rts_retry_limit)
 637                         rts_retry_limit = data_retry_limit;
 638         } else
 639                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 640
 641         if (priv->data_retry_limit != -1)
 642                 data_retry_limit = priv->data_retry_limit;
 643
 644         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 645                 switch (fc & IEEE80211_FCTL_STYPE) {
 646                 case IEEE80211_STYPE_AUTH:
 647                 case IEEE80211_STYPE_DEAUTH:
 648                 case IEEE80211_STYPE_ASSOC_REQ:
 649                 case IEEE80211_STYPE_REASSOC_REQ:
 650                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 651                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 652                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 653                         }
 654                         break;
 655                 default:
 656                         break;
 657                 }
 658         }
 659
 660         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 661         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 662         cmd->cmd.tx.rate = rate;
 663         cmd->cmd.tx.tx_flags = tx_flags;
 664
 665         /* OFDM */
 666         cmd->cmd.tx.supp_rates[0] =
 667            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 668
 669         /* CCK */
 670         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 671
 672         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 673                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 674                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 675                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 676 }
 677
 678 u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 679 {
 680         unsigned long flags_spin;
 681         struct iwl_station_entry *station;
 682
 683         if (sta_id == IWL_INVALID_STATION)
 684                 return IWL_INVALID_STATION;
 685
 686         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 687         station = &priv->stations[sta_id];
 688
 689         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 690         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 691         station->current_rate.rate_n_flags = tx_rate;
 692         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 693
 694         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 695
 696         iwl_send_add_station(priv, &station->sta, flags);
 697         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 698                         sta_id, tx_rate);
 699         return sta_id;
 700 }
 701
 702 static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
 703 {
 704         int rc;
 705         unsigned long flags;
 706
 707         spin_lock_irqsave(&priv->lock, flags);
 708         rc = iwl_grab_nic_access(priv);
 709         if (rc) {
 710                 spin_unlock_irqrestore(&priv->lock, flags);
 711                 return rc;
 712         }
 713
 714         if (!pwr_max) {
 715                 u32 val;
 716
 717                 rc = pci_read_config_dword(priv->pci_dev,
 718                                 PCI_POWER_SOURCE, &val);
 719                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 720                         iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 721                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 722                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 723                         iwl_release_nic_access(priv);
 724
 725                         iwl_poll_bit(priv, CSR_GPIO_IN,
 726                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 727                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 728                 } else
 729                         iwl_release_nic_access(priv);
 730         } else {
 731                 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 732                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 733                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 734
 735                 iwl_release_nic_access(priv);
 736                 iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 737                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 738         }
 739         spin_unlock_irqrestore(&priv->lock, flags);
 740
 741         return rc;
 742 }
 743
 744 static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
 745 {
 746         int rc;
 747         unsigned long flags;
 748
 749         spin_lock_irqsave(&priv->lock, flags);
 750         rc = iwl_grab_nic_access(priv);
 751         if (rc) {
 752                 spin_unlock_irqrestore(&priv->lock, flags);
 753                 return rc;
 754         }
 755
 756         iwl_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 757         iwl_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
 758                              priv->hw_setting.shared_phys +
 759                              offsetof(struct iwl_shared, rx_read_ptr[0]));
 760         iwl_write_direct32(priv, FH_RCSR_WPTR(0), 0);
 761         iwl_write_direct32(priv, FH_RCSR_CONFIG(0),
 762                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 763                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 764                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 765                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 766                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 767                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 768                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 769                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 770
 771         /* fake read to flush all prev I/O */
 772         iwl_read_direct32(priv, FH_RSSR_CTRL);
 773
 774         iwl_release_nic_access(priv);
 775         spin_unlock_irqrestore(&priv->lock, flags);
 776
 777         return 0;
 778 }
 779
 780 static int iwl3945_tx_reset(struct iwl_priv *priv)
 781 {
 782         int rc;
 783         unsigned long flags;
 784
 785         spin_lock_irqsave(&priv->lock, flags);
 786         rc = iwl_grab_nic_access(priv);
 787         if (rc) {
 788                 spin_unlock_irqrestore(&priv->lock, flags);
 789                 return rc;
 790         }
 791
 792         /* bypass mode */
 793         iwl_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
 794
 795         /* RA 0 is active */
 796         iwl_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
 797
 798         /* all 6 fifo are active */
 799         iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
 800
 801         iwl_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 802         iwl_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 803         iwl_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
 804         iwl_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
 805
 806         iwl_write_direct32(priv, FH_TSSR_CBB_BASE,
 807                              priv->hw_setting.shared_phys);
 808
 809         iwl_write_direct32(priv, FH_TSSR_MSG_CONFIG,
 810                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 811                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 812                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 813                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 814                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 815                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 816                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 817
 818         iwl_release_nic_access(priv);
 819         spin_unlock_irqrestore(&priv->lock, flags);
 820
 821         return 0;
 822 }
 823
 824 /**
 825  * iwl3945_txq_ctx_reset - Reset TX queue context
 826  *
 827  * Destroys all DMA structures and initialize them again
 828  */
 829 static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
 830 {
 831         int rc;
 832         int txq_id, slots_num;
 833
 834         iwl_hw_txq_ctx_free(priv);
 835
 836         /* Tx CMD queue */
 837         rc = iwl3945_tx_reset(priv);
 838         if (rc)
 839                 goto error;
 840
 841         /* Tx queue(s) */
 842         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 843                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 844                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 845                 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 846                                 txq_id);
 847                 if (rc) {
 848                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 849                         goto error;
 850                 }
 851         }
 852
 853         return rc;
 854
 855  error:
 856         iwl_hw_txq_ctx_free(priv);
 857         return rc;
 858 }
 859
 860 int iwl_hw_nic_init(struct iwl_priv *priv)
 861 {
 862         u8 rev_id;
 863         int rc;
 864         unsigned long flags;
 865         struct iwl_rx_queue *rxq = &priv->rxq;
 866
 867         iwl_power_init_handle(priv);
 868
 869         spin_lock_irqsave(&priv->lock, flags);
 870         iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 871         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 872                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 873
 874         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 875         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
 876                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 877                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 878         if (rc < 0) {
 879                 spin_unlock_irqrestore(&priv->lock, flags);
 880                 IWL_DEBUG_INFO("Failed to init the card\n");
 881                 return rc;
 882         }
 883
 884         rc = iwl_grab_nic_access(priv);
 885         if (rc) {
 886                 spin_unlock_irqrestore(&priv->lock, flags);
 887                 return rc;
 888         }
 889         iwl_write_prph(priv, APMG_CLK_EN_REG,
 890                                  APMG_CLK_VAL_DMA_CLK_RQT |
 891                                  APMG_CLK_VAL_BSM_CLK_RQT);
 892         udelay(20);
 893         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 894                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 895         iwl_release_nic_access(priv);
 896         spin_unlock_irqrestore(&priv->lock, flags);
 897
 898         /* Determine HW type */
 899         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 900         if (rc)
 901                 return rc;
 902         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 903
 904         iwl3945_nic_set_pwr_src(priv, 1);
 905         spin_lock_irqsave(&priv->lock, flags);
 906
 907         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 908                 IWL_DEBUG_INFO("RTP type \n");
 909         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 910                 IWL_DEBUG_INFO("ALM-MB type\n");
 911                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 912                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
 913         } else {
 914                 IWL_DEBUG_INFO("ALM-MM type\n");
 915                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 916                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
 917         }
 918
 919         spin_unlock_irqrestore(&priv->lock, flags);
 920
 921         /* Initialize the EEPROM */
 922         rc = iwl_eeprom_init(priv);
 923         if (rc)
 924                 return rc;
 925
 926         spin_lock_irqsave(&priv->lock, flags);
 927         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
 928                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
 929                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 930                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 931         } else
 932                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
 933
 934         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
 935                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 936                                priv->eeprom.board_revision);
 937                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 938                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 939         } else {
 940                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 941                                priv->eeprom.board_revision);
 942                 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 943                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 944         }
 945
 946         if (priv->eeprom.almgor_m_version <= 1) {
 947                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 948                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 949                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
 950                                priv->eeprom.almgor_m_version);
 951         } else {
 952                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
 953                                priv->eeprom.almgor_m_version);
 954                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 955                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 956         }
 957         spin_unlock_irqrestore(&priv->lock, flags);
 958
 959         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 960                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 961
 962         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 963                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 964
 965         /* Allocate the RX queue, or reset if it is already allocated */
 966         if (!rxq->bd) {
 967                 rc = iwl_rx_queue_alloc(priv);
 968                 if (rc) {
 969                         IWL_ERROR("Unable to initialize Rx queue\n");
 970                         return -ENOMEM;
 971                 }
 972         } else
 973                 iwl_rx_queue_reset(priv, rxq);
 974
 975         iwl_rx_replenish(priv);
 976
 977         iwl3945_rx_init(priv, rxq);
 978
 979         spin_lock_irqsave(&priv->lock, flags);
 980
 981         /* Look at using this instead:
 982         rxq->need_update = 1;
 983         iwl_rx_queue_update_write_ptr(priv, rxq);
 984         */
 985
 986         rc = iwl_grab_nic_access(priv);
 987         if (rc) {
 988                 spin_unlock_irqrestore(&priv->lock, flags);
 989                 return rc;
 990         }
 991         iwl_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
 992         iwl_release_nic_access(priv);
 993
 994         spin_unlock_irqrestore(&priv->lock, flags);
 995
 996         rc = iwl3945_txq_ctx_reset(priv);
 997         if (rc)
 998                 return rc;
 999
1000         set_bit(STATUS_INIT, &priv->status);
1001
1002         return 0;
1003 }
1004
1005 /**
1006  * iwl_hw_txq_ctx_free - Free TXQ Context
1007  *
1008  * Destroy all TX DMA queues and structures
1009  */
1010 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1011 {
1012         int txq_id;
1013
1014         /* Tx queues */
1015         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1016                 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1017 }
1018
1019 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
1020 {
1021         int queue;
1022         unsigned long flags;
1023
1024         spin_lock_irqsave(&priv->lock, flags);
1025         if (iwl_grab_nic_access(priv)) {
1026                 spin_unlock_irqrestore(&priv->lock, flags);
1027                 iwl_hw_txq_ctx_free(priv);
1028                 return;
1029         }
1030
1031         /* stop SCD */
1032         iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
1033
1034         /* reset TFD queues */
1035         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1036                 iwl_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1037                 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1038                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1039                                 1000);
1040         }
1041
1042         iwl_release_nic_access(priv);
1043         spin_unlock_irqrestore(&priv->lock, flags);
1044
1045         iwl_hw_txq_ctx_free(priv);
1046 }
1047
1048 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
1049 {
1050         int rc = 0;
1051         u32 reg_val;
1052         unsigned long flags;
1053
1054         spin_lock_irqsave(&priv->lock, flags);
1055
1056         /* set stop master bit */
1057         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1058
1059         reg_val = iwl_read32(priv, CSR_GP_CNTRL);
1060
1061         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1062             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1063                 IWL_DEBUG_INFO("Card in power save, master is already "
1064                                "stopped\n");
1065         else {
1066                 rc = iwl_poll_bit(priv, CSR_RESET,
1067                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1068                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1069                 if (rc < 0) {
1070                         spin_unlock_irqrestore(&priv->lock, flags);
1071                         return rc;
1072                 }
1073         }
1074
1075         spin_unlock_irqrestore(&priv->lock, flags);
1076         IWL_DEBUG_INFO("stop master\n");
1077
1078         return rc;
1079 }
1080
1081 int iwl_hw_nic_reset(struct iwl_priv *priv)
1082 {
1083         int rc;
1084         unsigned long flags;
1085
1086         iwl_hw_nic_stop_master(priv);
1087
1088         spin_lock_irqsave(&priv->lock, flags);
1089
1090         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1091
1092         rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
1093                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1094                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1095
1096         rc = iwl_grab_nic_access(priv);
1097         if (!rc) {
1098                 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
1099                                          APMG_CLK_VAL_BSM_CLK_RQT);
1100
1101                 udelay(10);
1102
1103                 iwl_set_bit(priv, CSR_GP_CNTRL,
1104                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1105
1106                 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1107                 iwl_write_prph(priv, APMG_RTC_INT_STT_REG,
1108                                         0xFFFFFFFF);
1109
1110                 /* enable DMA */
1111                 iwl_write_prph(priv, APMG_CLK_EN_REG,
1112                                          APMG_CLK_VAL_DMA_CLK_RQT |
1113                                          APMG_CLK_VAL_BSM_CLK_RQT);
1114                 udelay(10);
1115
1116                 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
1117                                 APMG_PS_CTRL_VAL_RESET_REQ);
1118                 udelay(5);
1119                 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1120                                 APMG_PS_CTRL_VAL_RESET_REQ);
1121                 iwl_release_nic_access(priv);
1122         }
1123
1124         /* Clear the 'host command active' bit... */
1125         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1126
1127         wake_up_interruptible(&priv->wait_command_queue);
1128         spin_unlock_irqrestore(&priv->lock, flags);
1129
1130         return rc;
1131 }
1132
1133 /**
1134  * iwl_hw_reg_adjust_power_by_temp
1135  * return index delta into power gain settings table
1136 */
1137 static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1138 {
1139         return (new_reading - old_reading) * (-11) / 100;
1140 }
1141
1142 /**
1143  * iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
1144  */
1145 static inline int iwl_hw_reg_temp_out_of_range(int temperature)
1146 {
1147         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1148 }
1149
1150 int iwl_hw_get_temperature(struct iwl_priv *priv)
1151 {
1152         return iwl_read32(priv, CSR_UCODE_DRV_GP2);
1153 }
1154
1155 /**
1156  * iwl_hw_reg_txpower_get_temperature
1157  * get the current temperature by reading from NIC
1158 */
1159 static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
1160 {
1161         int temperature;
1162
1163         temperature = iwl_hw_get_temperature(priv);
1164
1165         /* driver's okay range is -260 to +25.
1166          *   human readable okay range is 0 to +285 */
1167         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1168
1169         /* handle insane temp reading */
1170         if (iwl_hw_reg_temp_out_of_range(temperature)) {
1171                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1172
1173                 /* if really really hot(?),
1174                  *   substitute the 3rd band/group's temp measured at factory */
1175                 if (priv->last_temperature > 100)
1176                         temperature = priv->eeprom.groups[2].temperature;
1177                 else /* else use most recent "sane" value from driver */
1178                         temperature = priv->last_temperature;
1179         }
1180
1181         return temperature;     /* raw, not "human readable" */
1182 }
1183
1184 /* Adjust Txpower only if temperature variance is greater than threshold.
1185  *
1186  * Both are lower than older versions' 9 degrees */
1187 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1188
1189 /**
1190  * is_temp_calib_needed - determines if new calibration is needed
1191  *
1192  * records new temperature in tx_mgr->temperature.
1193  * replaces tx_mgr->last_temperature *only* if calib needed
1194  *    (assumes caller will actually do the calibration!). */
1195 static int is_temp_calib_needed(struct iwl_priv *priv)
1196 {
1197         int temp_diff;
1198
1199         priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
1200         temp_diff = priv->temperature - priv->last_temperature;
1201
1202         /* get absolute value */
1203         if (temp_diff < 0) {
1204                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1205                 temp_diff = -temp_diff;
1206         } else if (temp_diff == 0)
1207                 IWL_DEBUG_POWER("Same temp,\n");
1208         else
1209                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1210
1211         /* if we don't need calibration, *don't* update last_temperature */
1212         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1213                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1214                 return 0;
1215         }
1216
1217         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1218
1219         /* assume that caller will actually do calib ...
1220          *   update the "last temperature" value */
1221         priv->last_temperature = priv->temperature;
1222         return 1;
1223 }
1224
1225 #define IWL_MAX_GAIN_ENTRIES 78
1226 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1227 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1228
1229 /* radio and DSP power table, each step is 1/2 dB.
1230  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1231 static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1232         {
1233          {251, 127},            /* 2.4 GHz, highest power */
1234          {251, 127},
1235          {251, 127},
1236          {251, 127},
1237          {251, 125},
1238          {251, 110},
1239          {251, 105},
1240          {251, 98},
1241          {187, 125},
1242          {187, 115},
1243          {187, 108},
1244          {187, 99},
1245          {243, 119},
1246          {243, 111},
1247          {243, 105},
1248          {243, 97},
1249          {243, 92},
1250          {211, 106},
1251          {211, 100},
1252          {179, 120},
1253          {179, 113},
1254          {179, 107},
1255          {147, 125},
1256          {147, 119},
1257          {147, 112},
1258          {147, 106},
1259          {147, 101},
1260          {147, 97},
1261          {147, 91},
1262          {115, 107},
1263          {235, 121},
1264          {235, 115},
1265          {235, 109},
1266          {203, 127},
1267          {203, 121},
1268          {203, 115},
1269          {203, 108},
1270          {203, 102},
1271          {203, 96},
1272          {203, 92},
1273          {171, 110},
1274          {171, 104},
1275          {171, 98},
1276          {139, 116},
1277          {227, 125},
1278          {227, 119},
1279          {227, 113},
1280          {227, 107},
1281          {227, 101},
1282          {227, 96},
1283          {195, 113},
1284          {195, 106},
1285          {195, 102},
1286          {195, 95},
1287          {163, 113},
1288          {163, 106},
1289          {163, 102},
1290          {163, 95},
1291          {131, 113},
1292          {131, 106},
1293          {131, 102},
1294          {131, 95},
1295          {99, 113},
1296          {99, 106},
1297          {99, 102},
1298          {99, 95},
1299          {67, 113},
1300          {67, 106},
1301          {67, 102},
1302          {67, 95},
1303          {35, 113},
1304          {35, 106},
1305          {35, 102},
1306          {35, 95},
1307          {3, 113},
1308          {3, 106},
1309          {3, 102},
1310          {3, 95} },             /* 2.4 GHz, lowest power */
1311         {
1312          {251, 127},            /* 5.x GHz, highest power */
1313          {251, 120},
1314          {251, 114},
1315          {219, 119},
1316          {219, 101},
1317          {187, 113},
1318          {187, 102},
1319          {155, 114},
1320          {155, 103},
1321          {123, 117},
1322          {123, 107},
1323          {123, 99},
1324          {123, 92},
1325          {91, 108},
1326          {59, 125},
1327          {59, 118},
1328          {59, 109},
1329          {59, 102},
1330          {59, 96},
1331          {59, 90},
1332          {27, 104},
1333          {27, 98},
1334          {27, 92},
1335          {115, 118},
1336          {115, 111},
1337          {115, 104},
1338          {83, 126},
1339          {83, 121},
1340          {83, 113},
1341          {83, 105},
1342          {83, 99},
1343          {51, 118},
1344          {51, 111},
1345          {51, 104},
1346          {51, 98},
1347          {19, 116},
1348          {19, 109},
1349          {19, 102},
1350          {19, 98},
1351          {19, 93},
1352          {171, 113},
1353          {171, 107},
1354          {171, 99},
1355          {139, 120},
1356          {139, 113},
1357          {139, 107},
1358          {139, 99},
1359          {107, 120},
1360          {107, 113},
1361          {107, 107},
1362          {107, 99},
1363          {75, 120},
1364          {75, 113},
1365          {75, 107},
1366          {75, 99},
1367          {43, 120},
1368          {43, 113},
1369          {43, 107},
1370          {43, 99},
1371          {11, 120},
1372          {11, 113},
1373          {11, 107},
1374          {11, 99},
1375          {131, 107},
1376          {131, 99},
1377          {99, 120},
1378          {99, 113},
1379          {99, 107},
1380          {99, 99},
1381          {67, 120},
1382          {67, 113},
1383          {67, 107},
1384          {67, 99},
1385          {35, 120},
1386          {35, 113},
1387          {35, 107},
1388          {35, 99},
1389          {3, 120} }             /* 5.x GHz, lowest power */
1390 };
1391
1392 static inline u8 iwl_hw_reg_fix_power_index(int index)
1393 {
1394         if (index < 0)
1395                 return 0;
1396         if (index >= IWL_MAX_GAIN_ENTRIES)
1397                 return IWL_MAX_GAIN_ENTRIES - 1;
1398         return (u8) index;
1399 }
1400
1401 /* Kick off thermal recalibration check every 60 seconds */
1402 #define REG_RECALIB_PERIOD (60)
1403
1404 /**
1405  * iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
1406  *
1407  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1408  * or 6 Mbit (OFDM) rates.
1409  */
1410 static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
1411                                s32 rate_index, const s8 *clip_pwrs,
1412                                struct iwl_channel_info *ch_info,
1413                                int band_index)
1414 {
1415         struct iwl_scan_power_info *scan_power_info;
1416         s8 power;
1417         u8 power_index;
1418
1419         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1420
1421         /* use this channel group's 6Mbit clipping/saturation pwr,
1422          *   but cap at regulatory scan power restriction (set during init
1423          *   based on eeprom channel data) for this channel.  */
1424         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1425
1426         /* further limit to user's max power preference.
1427          * FIXME:  Other spectrum management power limitations do not
1428          *   seem to apply?? */
1429         power = min(power, priv->user_txpower_limit);
1430         scan_power_info->requested_power = power;
1431
1432         /* find difference between new scan *power* and current "normal"
1433          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1434          *   current "normal" temperature-compensated Tx power *index* for
1435          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1436          *   *index*. */
1437         power_index = ch_info->power_info[rate_index].power_table_index
1438             - (power - ch_info->power_info
1439                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1440
1441         /* store reference index that we use when adjusting *all* scan
1442          *   powers.  So we can accommodate user (all channel) or spectrum
1443          *   management (single channel) power changes "between" temperature
1444          *   feedback compensation procedures.
1445          * don't force fit this reference index into gain table; it may be a
1446          *   negative number.  This will help avoid errors when we're at
1447          *   the lower bounds (highest gains, for warmest temperatures)
1448          *   of the table. */
1449
1450         /* don't exceed table bounds for "real" setting */
1451         power_index = iwl_hw_reg_fix_power_index(power_index);
1452
1453         scan_power_info->power_table_index = power_index;
1454         scan_power_info->tpc.tx_gain =
1455             power_gain_table[band_index][power_index].tx_gain;
1456         scan_power_info->tpc.dsp_atten =
1457             power_gain_table[band_index][power_index].dsp_atten;
1458 }
1459
1460 /**
1461  * iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
1462  *
1463  * Configures power settings for all rates for the current channel,
1464  * using values from channel info struct, and send to NIC
1465  */
1466 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
1467 {
1468         int rate_idx, i;
1469         const struct iwl_channel_info *ch_info = NULL;
1470         struct iwl_txpowertable_cmd txpower = {
1471                 .channel = priv->active_rxon.channel,
1472         };
1473
1474         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1475         ch_info = iwl_get_channel_info(priv,
1476                                        priv->phymode,
1477                                        le16_to_cpu(priv->active_rxon.channel));
1478         if (!ch_info) {
1479                 IWL_ERROR
1480                     ("Failed to get channel info for channel %d [%d]\n",
1481                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1482                 return -EINVAL;
1483         }
1484
1485         if (!is_channel_valid(ch_info)) {
1486                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1487                                 "non-Tx channel.\n");
1488                 return 0;
1489         }
1490
1491         /* fill cmd with power settings for all rates for current channel */
1492         /* Fill OFDM rate */
1493         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1494              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1495
1496                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1497                 txpower.power[i].rate = iwl_rates[rate_idx].plcp;
1498
1499                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1500                                 le16_to_cpu(txpower.channel),
1501                                 txpower.band,
1502                                 txpower.power[i].tpc.tx_gain,
1503                                 txpower.power[i].tpc.dsp_atten,
1504                                 txpower.power[i].rate);
1505         }
1506         /* Fill CCK rates */
1507         for (rate_idx = IWL_FIRST_CCK_RATE;
1508              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1509                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1510                 txpower.power[i].rate = iwl_rates[rate_idx].plcp;
1511
1512                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1513                                 le16_to_cpu(txpower.channel),
1514                                 txpower.band,
1515                                 txpower.power[i].tpc.tx_gain,
1516                                 txpower.power[i].tpc.dsp_atten,
1517                                 txpower.power[i].rate);
1518         }
1519
1520         return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1521                         sizeof(struct iwl_txpowertable_cmd), &txpower);
1522
1523 }
1524
1525 /**
1526  * iwl_hw_reg_set_new_power - Configures power tables at new levels
1527  * @ch_info: Channel to update.  Uses power_info.requested_power.
1528  *
1529  * Replace requested_power and base_power_index ch_info fields for
1530  * one channel.
1531  *
1532  * Called if user or spectrum management changes power preferences.
1533  * Takes into account h/w and modulation limitations (clip power).
1534  *
1535  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1536  *
1537  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1538  *       properly fill out the scan powers, and actual h/w gain settings,
1539  *       and send changes to NIC
1540  */
1541 static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
1542                              struct iwl_channel_info *ch_info)
1543 {
1544         struct iwl_channel_power_info *power_info;
1545         int power_changed = 0;
1546         int i;
1547         const s8 *clip_pwrs;
1548         int power;
1549
1550         /* Get this chnlgrp's rate-to-max/clip-powers table */
1551         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1552
1553         /* Get this channel's rate-to-current-power settings table */
1554         power_info = ch_info->power_info;
1555
1556         /* update OFDM Txpower settings */
1557         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1558              i++, ++power_info) {
1559                 int delta_idx;
1560
1561                 /* limit new power to be no more than h/w capability */
1562                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1563                 if (power == power_info->requested_power)
1564                         continue;
1565
1566                 /* find difference between old and new requested powers,
1567                  *    update base (non-temp-compensated) power index */
1568                 delta_idx = (power - power_info->requested_power) * 2;
1569                 power_info->base_power_index -= delta_idx;
1570
1571                 /* save new requested power value */
1572                 power_info->requested_power = power;
1573
1574                 power_changed = 1;
1575         }
1576
1577         /* update CCK Txpower settings, based on OFDM 12M setting ...
1578          *    ... all CCK power settings for a given channel are the *same*. */
1579         if (power_changed) {
1580                 power =
1581                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1582                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1583
1584                 /* do all CCK rates' iwl_channel_power_info structures */
1585                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1586                         power_info->requested_power = power;
1587                         power_info->base_power_index =
1588                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1589                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1590                         ++power_info;
1591                 }
1592         }
1593
1594         return 0;
1595 }
1596
1597 /**
1598  * iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1599  *
1600  * NOTE: Returned power limit may be less (but not more) than requested,
1601  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1602  *       (no consideration for h/w clipping limitations).
1603  */
1604 static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
1605 {
1606         s8 max_power;
1607
1608 #if 0
1609         /* if we're using TGd limits, use lower of TGd or EEPROM */
1610         if (ch_info->tgd_data.max_power != 0)
1611                 max_power = min(ch_info->tgd_data.max_power,
1612                                 ch_info->eeprom.max_power_avg);
1613
1614         /* else just use EEPROM limits */
1615         else
1616 #endif
1617                 max_power = ch_info->eeprom.max_power_avg;
1618
1619         return min(max_power, ch_info->max_power_avg);
1620 }
1621
1622 /**
1623  * iwl_hw_reg_comp_txpower_temp - Compensate for temperature
1624  *
1625  * Compensate txpower settings of *all* channels for temperature.
1626  * This only accounts for the difference between current temperature
1627  *   and the factory calibration temperatures, and bases the new settings
1628  *   on the channel's base_power_index.
1629  *
1630  * If RxOn is "associated", this sends the new Txpower to NIC!
1631  */
1632 static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
1633 {
1634         struct iwl_channel_info *ch_info = NULL;
1635         int delta_index;
1636         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1637         u8 a_band;
1638         u8 rate_index;
1639         u8 scan_tbl_index;
1640         u8 i;
1641         int ref_temp;
1642         int temperature = priv->temperature;
1643
1644         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1645         for (i = 0; i < priv->channel_count; i++) {
1646                 ch_info = &priv->channel_info[i];
1647                 a_band = is_channel_a_band(ch_info);
1648
1649                 /* Get this chnlgrp's factory calibration temperature */
1650                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1651                     temperature;
1652
1653                 /* get power index adjustment based on curr and factory
1654                  * temps */
1655                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1656                                                               ref_temp);
1657
1658                 /* set tx power value for all rates, OFDM and CCK */
1659                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1660                      rate_index++) {
1661                         int power_idx =
1662                             ch_info->power_info[rate_index].base_power_index;
1663
1664                         /* temperature compensate */
1665                         power_idx += delta_index;
1666
1667                         /* stay within table range */
1668                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
1669                         ch_info->power_info[rate_index].
1670                             power_table_index = (u8) power_idx;
1671                         ch_info->power_info[rate_index].tpc =
1672                             power_gain_table[a_band][power_idx];
1673                 }
1674
1675                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1676                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1677
1678                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1679                 for (scan_tbl_index = 0;
1680                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1681                         s32 actual_index = (scan_tbl_index == 0) ?
1682                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1683                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
1684                                            actual_index, clip_pwrs,
1685                                            ch_info, a_band);
1686                 }
1687         }
1688
1689         /* send Txpower command for current channel to ucode */
1690         return iwl_hw_reg_send_txpower(priv);
1691 }
1692
1693 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1694 {
1695         struct iwl_channel_info *ch_info;
1696         s8 max_power;
1697         u8 a_band;
1698         u8 i;
1699
1700         if (priv->user_txpower_limit == power) {
1701                 IWL_DEBUG_POWER("Requested Tx power same as current "
1702                                 "limit: %ddBm.\n", power);
1703                 return 0;
1704         }
1705
1706         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1707         priv->user_txpower_limit = power;
1708
1709         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1710
1711         for (i = 0; i < priv->channel_count; i++) {
1712                 ch_info = &priv->channel_info[i];
1713                 a_band = is_channel_a_band(ch_info);
1714
1715                 /* find minimum power of all user and regulatory constraints
1716                  *    (does not consider h/w clipping limitations) */
1717                 max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
1718                 max_power = min(power, max_power);
1719                 if (max_power != ch_info->curr_txpow) {
1720                         ch_info->curr_txpow = max_power;
1721
1722                         /* this considers the h/w clipping limitations */
1723                         iwl_hw_reg_set_new_power(priv, ch_info);
1724                 }
1725         }
1726
1727         /* update txpower settings for all channels,
1728          *   send to NIC if associated. */
1729         is_temp_calib_needed(priv);
1730         iwl_hw_reg_comp_txpower_temp(priv);
1731
1732         return 0;
1733 }
1734
1735 /* will add 3945 channel switch cmd handling later */
1736 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1737 {
1738         return 0;
1739 }
1740
1741 /**
1742  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1743  *
1744  * -- reset periodic timer
1745  * -- see if temp has changed enough to warrant re-calibration ... if so:
1746  *     -- correct coeffs for temp (can reset temp timer)
1747  *     -- save this temp as "last",
1748  *     -- send new set of gain settings to NIC
1749  * NOTE:  This should continue working, even when we're not associated,
1750  *   so we can keep our internal table of scan powers current. */
1751 void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
1752 {
1753         /* This will kick in the "brute force"
1754          * iwl_hw_reg_comp_txpower_temp() below */
1755         if (!is_temp_calib_needed(priv))
1756                 goto reschedule;
1757
1758         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1759          * This is based *only* on current temperature,
1760          * ignoring any previous power measurements */
1761         iwl_hw_reg_comp_txpower_temp(priv);
1762
1763  reschedule:
1764         queue_delayed_work(priv->workqueue,
1765                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1766 }
1767
1768 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1769 {
1770         struct iwl_priv *priv = container_of(work, struct iwl_priv,
1771                                              thermal_periodic.work);
1772
1773         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1774                 return;
1775
1776         mutex_lock(&priv->mutex);
1777         iwl3945_reg_txpower_periodic(priv);
1778         mutex_unlock(&priv->mutex);
1779 }
1780
1781 /**
1782  * iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1783  *                                 for the channel.
1784  *
1785  * This function is used when initializing channel-info structs.
1786  *
1787  * NOTE: These channel groups do *NOT* match the bands above!
1788  *       These channel groups are based on factory-tested channels;
1789  *       on A-band, EEPROM's "group frequency" entries represent the top
1790  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1791  */
1792 static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
1793                                        const struct iwl_channel_info *ch_info)
1794 {
1795         struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1796         u8 group;
1797         u16 group_index = 0;    /* based on factory calib frequencies */
1798         u8 grp_channel;
1799
1800         /* Find the group index for the channel ... don't use index 1(?) */
1801         if (is_channel_a_band(ch_info)) {
1802                 for (group = 1; group < 5; group++) {
1803                         grp_channel = ch_grp[group].group_channel;
1804                         if (ch_info->channel <= grp_channel) {
1805                                 group_index = group;
1806                                 break;
1807                         }
1808                 }
1809                 /* group 4 has a few channels *above* its factory cal freq */
1810                 if (group == 5)
1811                         group_index = 4;
1812         } else
1813                 group_index = 0;        /* 2.4 GHz, group 0 */
1814
1815         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1816                         group_index);
1817         return group_index;
1818 }
1819
1820 /**
1821  * iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
1822  *
1823  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1824  *   into radio/DSP gain settings table for requested power.
1825  */
1826 static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
1827                                        s8 requested_power,
1828                                        s32 setting_index, s32 *new_index)
1829 {
1830         const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
1831         s32 index0, index1;
1832         s32 power = 2 * requested_power;
1833         s32 i;
1834         const struct iwl_eeprom_txpower_sample *samples;
1835         s32 gains0, gains1;
1836         s32 res;
1837         s32 denominator;
1838
1839         chnl_grp = &priv->eeprom.groups[setting_index];
1840         samples = chnl_grp->samples;
1841         for (i = 0; i < 5; i++) {
1842                 if (power == samples[i].power) {
1843                         *new_index = samples[i].gain_index;
1844                         return 0;
1845                 }
1846         }
1847
1848         if (power > samples[1].power) {
1849                 index0 = 0;
1850                 index1 = 1;
1851         } else if (power > samples[2].power) {
1852                 index0 = 1;
1853                 index1 = 2;
1854         } else if (power > samples[3].power) {
1855                 index0 = 2;
1856                 index1 = 3;
1857         } else {
1858                 index0 = 3;
1859                 index1 = 4;
1860         }
1861
1862         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1863         if (denominator == 0)
1864                 return -EINVAL;
1865         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1866         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1867         res = gains0 + (gains1 - gains0) *
1868             ((s32) power - (s32) samples[index0].power) / denominator +
1869             (1 << 18);
1870         *new_index = res >> 19;
1871         return 0;
1872 }
1873
1874 static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
1875 {
1876         u32 i;
1877         s32 rate_index;
1878         const struct iwl_eeprom_txpower_group *group;
1879
1880         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1881
1882         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1883                 s8 *clip_pwrs;  /* table of power levels for each rate */
1884                 s8 satur_pwr;   /* saturation power for each chnl group */
1885                 group = &priv->eeprom.groups[i];
1886
1887                 /* sanity check on factory saturation power value */
1888                 if (group->saturation_power < 40) {
1889                         IWL_WARNING("Error: saturation power is %d, "
1890                                     "less than minimum expected 40\n",
1891                                     group->saturation_power);
1892                         return;
1893                 }
1894
1895                 /*
1896                  * Derive requested power levels for each rate, based on
1897                  *   hardware capabilities (saturation power for band).
1898                  * Basic value is 3dB down from saturation, with further
1899                  *   power reductions for highest 3 data rates.  These
1900                  *   backoffs provide headroom for high rate modulation
1901                  *   power peaks, without too much distortion (clipping).
1902                  */
1903                 /* we'll fill in this array with h/w max power levels */
1904                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1905
1906                 /* divide factory saturation power by 2 to find -3dB level */
1907                 satur_pwr = (s8) (group->saturation_power >> 1);
1908
1909                 /* fill in channel group's nominal powers for each rate */
1910                 for (rate_index = 0;
1911                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1912                         switch (rate_index) {
1913                         case IWL_RATE_36M_INDEX_TABLE:
1914                                 if (i == 0)     /* B/G */
1915                                         *clip_pwrs = satur_pwr;
1916                                 else    /* A */
1917                                         *clip_pwrs = satur_pwr - 5;
1918                                 break;
1919                         case IWL_RATE_48M_INDEX_TABLE:
1920                                 if (i == 0)
1921                                         *clip_pwrs = satur_pwr - 7;
1922                                 else
1923                                         *clip_pwrs = satur_pwr - 10;
1924                                 break;
1925                         case IWL_RATE_54M_INDEX_TABLE:
1926                                 if (i == 0)
1927                                         *clip_pwrs = satur_pwr - 9;
1928                                 else
1929                                         *clip_pwrs = satur_pwr - 12;
1930                                 break;
1931                         default:
1932                                 *clip_pwrs = satur_pwr;
1933                                 break;
1934                         }
1935                 }
1936         }
1937 }
1938
1939 /**
1940  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1941  *
1942  * Second pass (during init) to set up priv->channel_info
1943  *
1944  * Set up Tx-power settings in our channel info database for each VALID
1945  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1946  * and current temperature.
1947  *
1948  * Since this is based on current temperature (at init time), these values may
1949  * not be valid for very long, but it gives us a starting/default point,
1950  * and allows us to active (i.e. using Tx) scan.
1951  *
1952  * This does *not* write values to NIC, just sets up our internal table.
1953  */
1954 int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
1955 {
1956         struct iwl_channel_info *ch_info = NULL;
1957         struct iwl_channel_power_info *pwr_info;
1958         int delta_index;
1959         u8 rate_index;
1960         u8 scan_tbl_index;
1961         const s8 *clip_pwrs;    /* array of power levels for each rate */
1962         u8 gain, dsp_atten;
1963         s8 power;
1964         u8 pwr_index, base_pwr_index, a_band;
1965         u8 i;
1966         int temperature;
1967
1968         /* save temperature reference,
1969          *   so we can determine next time to calibrate */
1970         temperature = iwl_hw_reg_txpower_get_temperature(priv);
1971         priv->last_temperature = temperature;
1972
1973         iwl_hw_reg_init_channel_groups(priv);
1974
1975         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1976         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1977              i++, ch_info++) {
1978                 a_band = is_channel_a_band(ch_info);
1979                 if (!is_channel_valid(ch_info))
1980                         continue;
1981
1982                 /* find this channel's channel group (*not* "band") index */
1983                 ch_info->group_index =
1984                         iwl_hw_reg_get_ch_grp_index(priv, ch_info);
1985
1986                 /* Get this chnlgrp's rate->max/clip-powers table */
1987                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1988
1989                 /* calculate power index *adjustment* value according to
1990                  *  diff between current temperature and factory temperature */
1991                 delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
1992                                 priv->eeprom.groups[ch_info->group_index].
1993                                 temperature);
1994
1995                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
1996                                 ch_info->channel, delta_index, temperature +
1997                                 IWL_TEMP_CONVERT);
1998
1999                 /* set tx power value for all OFDM rates */
2000                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2001                      rate_index++) {
2002                         s32 power_idx;
2003                         int rc;
2004
2005                         /* use channel group's clip-power table,
2006                          *   but don't exceed channel's max power */
2007                         s8 pwr = min(ch_info->max_power_avg,
2008                                      clip_pwrs[rate_index]);
2009
2010                         pwr_info = &ch_info->power_info[rate_index];
2011
2012                         /* get base (i.e. at factory-measured temperature)
2013                          *    power table index for this rate's power */
2014                         rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
2015                                                          ch_info->group_index,
2016                                                          &power_idx);
2017                         if (rc) {
2018                                 IWL_ERROR("Invalid power index\n");
2019                                 return rc;
2020                         }
2021                         pwr_info->base_power_index = (u8) power_idx;
2022
2023                         /* temperature compensate */
2024                         power_idx += delta_index;
2025
2026                         /* stay within range of gain table */
2027                         power_idx = iwl_hw_reg_fix_power_index(power_idx);
2028
2029                         /* fill 1 OFDM rate's iwl_channel_power_info struct */
2030                         pwr_info->requested_power = pwr;
2031                         pwr_info->power_table_index = (u8) power_idx;
2032                         pwr_info->tpc.tx_gain =
2033                             power_gain_table[a_band][power_idx].tx_gain;
2034                         pwr_info->tpc.dsp_atten =
2035                             power_gain_table[a_band][power_idx].dsp_atten;
2036                 }
2037
2038                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2039                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2040                 power = pwr_info->requested_power +
2041                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2042                 pwr_index = pwr_info->power_table_index +
2043                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2044                 base_pwr_index = pwr_info->base_power_index +
2045                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2046
2047                 /* stay within table range */
2048                 pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
2049                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2050                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2051
2052                 /* fill each CCK rate's iwl_channel_power_info structure
2053                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2054                  * NOTE:  CCK rates start at end of OFDM rates! */
2055                 for (rate_index = 0;
2056                      rate_index < IWL_CCK_RATES; rate_index++) {
2057                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2058                         pwr_info->requested_power = power;
2059                         pwr_info->power_table_index = pwr_index;
2060                         pwr_info->base_power_index = base_pwr_index;
2061                         pwr_info->tpc.tx_gain = gain;
2062                         pwr_info->tpc.dsp_atten = dsp_atten;
2063                 }
2064
2065                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2066                 for (scan_tbl_index = 0;
2067                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2068                         s32 actual_index = (scan_tbl_index == 0) ?
2069                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2070                         iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
2071                                 actual_index, clip_pwrs, ch_info, a_band);
2072                 }
2073         }
2074
2075         return 0;
2076 }
2077
2078 int iwl_hw_rxq_stop(struct iwl_priv *priv)
2079 {
2080         int rc;
2081         unsigned long flags;
2082
2083         spin_lock_irqsave(&priv->lock, flags);
2084         rc = iwl_grab_nic_access(priv);
2085         if (rc) {
2086                 spin_unlock_irqrestore(&priv->lock, flags);
2087                 return rc;
2088         }
2089
2090         iwl_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2091         rc = iwl_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2092         if (rc < 0)
2093                 IWL_ERROR("Can't stop Rx DMA.\n");
2094
2095         iwl_release_nic_access(priv);
2096         spin_unlock_irqrestore(&priv->lock, flags);
2097
2098         return 0;
2099 }
2100
2101 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2102 {
2103         int rc;
2104         unsigned long flags;
2105         int txq_id = txq->q.id;
2106
2107         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2108
2109         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2110
2111         spin_lock_irqsave(&priv->lock, flags);
2112         rc = iwl_grab_nic_access(priv);
2113         if (rc) {
2114                 spin_unlock_irqrestore(&priv->lock, flags);
2115                 return rc;
2116         }
2117         iwl_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2118         iwl_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2119
2120         iwl_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2121                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2122                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2123                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2124                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2125                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2126         iwl_release_nic_access(priv);
2127
2128         /* fake read to flush all prev. writes */
2129         iwl_read32(priv, FH_TSSR_CBB_BASE);
2130         spin_unlock_irqrestore(&priv->lock, flags);
2131
2132         return 0;
2133 }
2134
2135 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2136 {
2137         struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2138
2139         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2140 }
2141
2142 /**
2143  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2144  */
2145 int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
2146 {
2147         int rc, i, index, prev_index;
2148         struct iwl_rate_scaling_cmd rate_cmd = {
2149                 .reserved = {0, 0, 0},
2150         };
2151         struct iwl_rate_scaling_info *table = rate_cmd.table;
2152
2153         for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
2154                 index = iwl_rates[i].table_rs_index;
2155
2156                 table[index].rate_n_flags =
2157                         iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
2158                 table[index].try_cnt = priv->retry_rate;
2159                 prev_index = iwl_get_prev_ieee_rate(i);
2160                 table[index].next_rate_index = iwl_rates[prev_index].table_rs_index;
2161         }
2162
2163         switch (priv->phymode) {
2164         case MODE_IEEE80211A:
2165                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2166                 /* If one of the following CCK rates is used,
2167                  * have it fall back to the 6M OFDM rate */
2168                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2169                         table[i].next_rate_index = iwl_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2170
2171                 /* Don't fall back to CCK rates */
2172                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2173
2174                 /* Don't drop out of OFDM rates */
2175                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2176                     iwl_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2177                 break;
2178
2179         case MODE_IEEE80211B:
2180                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2181                 /* If an OFDM rate is used, have it fall back to the
2182                  * 1M CCK rates */
2183                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2184                         table[i].next_rate_index = iwl_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2185
2186                 /* CCK shouldn't fall back to OFDM... */
2187                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2188                 break;
2189
2190         default:
2191                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2192                 break;
2193         }
2194
2195         /* Update the rate scaling for control frame Tx */
2196         rate_cmd.table_id = 0;
2197         rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2198                               &rate_cmd);
2199         if (rc)
2200                 return rc;
2201
2202         /* Update the rate scaling for data frame Tx */
2203         rate_cmd.table_id = 1;
2204         return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2205                                 &rate_cmd);
2206 }
2207
2208 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
2209 {
2210         memset((void *)&priv->hw_setting, 0,
2211                sizeof(struct iwl_driver_hw_info));
2212
2213         priv->hw_setting.shared_virt =
2214             pci_alloc_consistent(priv->pci_dev,
2215                                  sizeof(struct iwl_shared),
2216                                  &priv->hw_setting.shared_phys);
2217
2218         if (!priv->hw_setting.shared_virt) {
2219                 IWL_ERROR("failed to allocate pci memory\n");
2220                 mutex_unlock(&priv->mutex);
2221                 return -ENOMEM;
2222         }
2223
2224         priv->hw_setting.ac_queue_count = AC_NUM;
2225         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2226         priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
2227         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2228         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2229         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2230         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2231         return 0;
2232 }
2233
2234 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2235                           struct iwl_frame *frame, u8 rate)
2236 {
2237         struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2238         unsigned int frame_size;
2239
2240         tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
2241         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2242
2243         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2244         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2245
2246         frame_size = iwl_fill_beacon_frame(priv,
2247                                 tx_beacon_cmd->frame,
2248                                 BROADCAST_ADDR,
2249                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2250
2251         BUG_ON(frame_size > MAX_MPDU_SIZE);
2252         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2253
2254         tx_beacon_cmd->tx.rate = rate;
2255         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2256                                       TX_CMD_FLG_TSF_MSK);
2257
2258         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2259         tx_beacon_cmd->tx.supp_rates[0] =
2260                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2261
2262         tx_beacon_cmd->tx.supp_rates[1] =
2263                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2264
2265         return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
2266 }
2267
2268 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
2269 {
2270         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2271 }
2272
2273 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
2274 {
2275         INIT_DELAYED_WORK(&priv->thermal_periodic,
2276                           iwl3945_bg_reg_txpower_periodic);
2277 }
2278
2279 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
2280 {
2281         cancel_delayed_work(&priv->thermal_periodic);
2282 }
2283
2284 struct pci_device_id iwl_hw_card_ids[] = {
2285         {PCI_DEVICE(0x8086, 0x4222)},
2286         {PCI_DEVICE(0x8086, 0x4227)},
2287         {0}
2288 };
2289
2290 inline int iwl_eeprom_acquire_semaphore(struct iwl_priv *priv)
2291 {
2292         _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2293         return 0;
2294 }
2295
2296 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);