3 * Purpose: PCI Message Signaled Interrupt (MSI)
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
10 #include <linux/irq.h>
11 #include <linux/interrupt.h>
12 #include <linux/init.h>
13 #include <linux/config.h>
14 #include <linux/ioport.h>
15 #include <linux/smp_lock.h>
16 #include <linux/pci.h>
17 #include <linux/proc_fs.h>
19 #include <asm/errno.h>
26 static DEFINE_SPINLOCK(msi_lock);
27 static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
28 static kmem_cache_t* msi_cachep;
30 static int pci_msi_enable = 1;
31 static int last_alloc_vector;
32 static int nr_released_vectors;
33 static int nr_reserved_vectors = NR_HP_RESERVED_VECTORS;
34 static int nr_msix_devices;
36 #ifndef CONFIG_X86_IO_APIC
37 int vector_irq[NR_VECTORS] = { [0 ... NR_VECTORS - 1] = -1};
38 u8 irq_vector[NR_IRQ_VECTORS] = { FIRST_DEVICE_VECTOR , 0 };
41 static struct msi_ops *msi_ops;
44 msi_register(struct msi_ops *ops)
50 static void msi_cache_ctor(void *p, kmem_cache_t *cache, unsigned long flags)
52 memset(p, 0, NR_IRQS * sizeof(struct msi_desc));
55 static int msi_cache_init(void)
57 msi_cachep = kmem_cache_create("msi_cache",
58 NR_IRQS * sizeof(struct msi_desc),
59 0, SLAB_HWCACHE_ALIGN, msi_cache_ctor, NULL);
66 static void msi_set_mask_bit(unsigned int vector, int flag)
68 struct msi_desc *entry;
70 entry = (struct msi_desc *)msi_desc[vector];
71 if (!entry || !entry->dev || !entry->mask_base)
73 switch (entry->msi_attrib.type) {
79 pos = (long)entry->mask_base;
80 pci_read_config_dword(entry->dev, pos, &mask_bits);
83 pci_write_config_dword(entry->dev, pos, mask_bits);
88 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
89 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
90 writel(flag, entry->mask_base + offset);
99 static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
101 struct msi_desc *entry;
102 u32 address_hi, address_lo;
103 unsigned int irq = vector;
104 unsigned int dest_cpu = first_cpu(cpu_mask);
106 entry = (struct msi_desc *)msi_desc[vector];
107 if (!entry || !entry->dev)
110 switch (entry->msi_attrib.type) {
113 int pos = pci_find_capability(entry->dev, PCI_CAP_ID_MSI);
118 pci_read_config_dword(entry->dev, msi_upper_address_reg(pos),
120 pci_read_config_dword(entry->dev, msi_lower_address_reg(pos),
123 msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
125 pci_write_config_dword(entry->dev, msi_upper_address_reg(pos),
127 pci_write_config_dword(entry->dev, msi_lower_address_reg(pos),
129 set_native_irq_info(irq, cpu_mask);
132 case PCI_CAP_ID_MSIX:
135 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
136 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET;
138 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
139 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET;
141 address_hi = readl(entry->mask_base + offset_hi);
142 address_lo = readl(entry->mask_base + offset_lo);
144 msi_ops->target(vector, dest_cpu, &address_hi, &address_lo);
146 writel(address_hi, entry->mask_base + offset_hi);
147 writel(address_lo, entry->mask_base + offset_lo);
148 set_native_irq_info(irq, cpu_mask);
156 #define set_msi_affinity NULL
157 #endif /* CONFIG_SMP */
159 static void mask_MSI_irq(unsigned int vector)
161 msi_set_mask_bit(vector, 1);
164 static void unmask_MSI_irq(unsigned int vector)
166 msi_set_mask_bit(vector, 0);
169 static unsigned int startup_msi_irq_wo_maskbit(unsigned int vector)
171 struct msi_desc *entry;
174 spin_lock_irqsave(&msi_lock, flags);
175 entry = msi_desc[vector];
176 if (!entry || !entry->dev) {
177 spin_unlock_irqrestore(&msi_lock, flags);
180 entry->msi_attrib.state = 1; /* Mark it active */
181 spin_unlock_irqrestore(&msi_lock, flags);
183 return 0; /* never anything pending */
186 static unsigned int startup_msi_irq_w_maskbit(unsigned int vector)
188 startup_msi_irq_wo_maskbit(vector);
189 unmask_MSI_irq(vector);
190 return 0; /* never anything pending */
193 static void shutdown_msi_irq(unsigned int vector)
195 struct msi_desc *entry;
198 spin_lock_irqsave(&msi_lock, flags);
199 entry = msi_desc[vector];
200 if (entry && entry->dev)
201 entry->msi_attrib.state = 0; /* Mark it not active */
202 spin_unlock_irqrestore(&msi_lock, flags);
205 static void end_msi_irq_wo_maskbit(unsigned int vector)
207 move_native_irq(vector);
211 static void end_msi_irq_w_maskbit(unsigned int vector)
213 move_native_irq(vector);
214 unmask_MSI_irq(vector);
218 static void do_nothing(unsigned int vector)
223 * Interrupt Type for MSI-X PCI/PCI-X/PCI-Express Devices,
224 * which implement the MSI-X Capability Structure.
226 static struct hw_interrupt_type msix_irq_type = {
227 .typename = "PCI-MSI-X",
228 .startup = startup_msi_irq_w_maskbit,
229 .shutdown = shutdown_msi_irq,
230 .enable = unmask_MSI_irq,
231 .disable = mask_MSI_irq,
233 .end = end_msi_irq_w_maskbit,
234 .set_affinity = set_msi_affinity
238 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
239 * which implement the MSI Capability Structure with
240 * Mask-and-Pending Bits.
242 static struct hw_interrupt_type msi_irq_w_maskbit_type = {
243 .typename = "PCI-MSI",
244 .startup = startup_msi_irq_w_maskbit,
245 .shutdown = shutdown_msi_irq,
246 .enable = unmask_MSI_irq,
247 .disable = mask_MSI_irq,
249 .end = end_msi_irq_w_maskbit,
250 .set_affinity = set_msi_affinity
254 * Interrupt Type for MSI PCI/PCI-X/PCI-Express Devices,
255 * which implement the MSI Capability Structure without
256 * Mask-and-Pending Bits.
258 static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
259 .typename = "PCI-MSI",
260 .startup = startup_msi_irq_wo_maskbit,
261 .shutdown = shutdown_msi_irq,
262 .enable = do_nothing,
263 .disable = do_nothing,
265 .end = end_msi_irq_wo_maskbit,
266 .set_affinity = set_msi_affinity
269 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign);
270 static int assign_msi_vector(void)
272 static int new_vector_avail = 1;
277 * msi_lock is provided to ensure that successful allocation of MSI
278 * vector is assigned unique among drivers.
280 spin_lock_irqsave(&msi_lock, flags);
282 if (!new_vector_avail) {
286 * vector_irq[] = -1 indicates that this specific vector is:
287 * - assigned for MSI (since MSI have no associated IRQ) or
288 * - assigned for legacy if less than 16, or
289 * - having no corresponding 1:1 vector-to-IOxAPIC IRQ mapping
290 * vector_irq[] = 0 indicates that this vector, previously
291 * assigned for MSI, is freed by hotplug removed operations.
292 * This vector will be reused for any subsequent hotplug added
294 * vector_irq[] > 0 indicates that this vector is assigned for
295 * IOxAPIC IRQs. This vector and its value provides a 1-to-1
296 * vector-to-IOxAPIC IRQ mapping.
298 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
299 if (vector_irq[vector] != 0)
301 free_vector = vector;
302 if (!msi_desc[vector])
308 spin_unlock_irqrestore(&msi_lock, flags);
311 vector_irq[free_vector] = -1;
312 nr_released_vectors--;
313 spin_unlock_irqrestore(&msi_lock, flags);
314 if (msi_desc[free_vector] != NULL) {
318 /* free all linked vectors before re-assign */
320 spin_lock_irqsave(&msi_lock, flags);
321 dev = msi_desc[free_vector]->dev;
322 tail = msi_desc[free_vector]->link.tail;
323 spin_unlock_irqrestore(&msi_lock, flags);
324 msi_free_vector(dev, tail, 1);
325 } while (free_vector != tail);
330 vector = assign_irq_vector(AUTO_ASSIGN);
331 last_alloc_vector = vector;
332 if (vector == LAST_DEVICE_VECTOR)
333 new_vector_avail = 0;
335 spin_unlock_irqrestore(&msi_lock, flags);
339 static int get_new_vector(void)
341 int vector = assign_msi_vector();
344 set_intr_gate(vector, interrupt[vector]);
349 static int msi_init(void)
351 static int status = -ENOMEM;
358 printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n");
363 status = msi_arch_init();
367 "PCI: MSI arch init failed. MSI disabled.\n");
373 "PCI: MSI ops not registered. MSI disabled.\n");
378 last_alloc_vector = assign_irq_vector(AUTO_ASSIGN);
379 status = msi_cache_init();
382 printk(KERN_WARNING "PCI: MSI cache init failed\n");
386 if (last_alloc_vector < 0) {
388 printk(KERN_WARNING "PCI: No interrupt vectors available for MSI\n");
392 vector_irq[last_alloc_vector] = 0;
393 nr_released_vectors++;
398 static int get_msi_vector(struct pci_dev *dev)
400 return get_new_vector();
403 static struct msi_desc* alloc_msi_entry(void)
405 struct msi_desc *entry;
407 entry = kmem_cache_alloc(msi_cachep, SLAB_KERNEL);
411 memset(entry, 0, sizeof(struct msi_desc));
412 entry->link.tail = entry->link.head = 0; /* single message */
418 static void attach_msi_entry(struct msi_desc *entry, int vector)
422 spin_lock_irqsave(&msi_lock, flags);
423 msi_desc[vector] = entry;
424 spin_unlock_irqrestore(&msi_lock, flags);
427 static void irq_handler_init(int cap_id, int pos, int mask)
431 spin_lock_irqsave(&irq_desc[pos].lock, flags);
432 if (cap_id == PCI_CAP_ID_MSIX)
433 irq_desc[pos].handler = &msix_irq_type;
436 irq_desc[pos].handler = &msi_irq_wo_maskbit_type;
438 irq_desc[pos].handler = &msi_irq_w_maskbit_type;
440 spin_unlock_irqrestore(&irq_desc[pos].lock, flags);
443 static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
447 pci_read_config_word(dev, msi_control_reg(pos), &control);
448 if (type == PCI_CAP_ID_MSI) {
449 /* Set enabled bits to single MSI & enable MSI_enable bit */
450 msi_enable(control, 1);
451 pci_write_config_word(dev, msi_control_reg(pos), control);
453 msix_enable(control);
454 pci_write_config_word(dev, msi_control_reg(pos), control);
456 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
457 /* PCI Express Endpoint device detected */
458 pci_intx(dev, 0); /* disable intx */
462 void disable_msi_mode(struct pci_dev *dev, int pos, int type)
466 pci_read_config_word(dev, msi_control_reg(pos), &control);
467 if (type == PCI_CAP_ID_MSI) {
468 /* Set enabled bits to single MSI & enable MSI_enable bit */
469 msi_disable(control);
470 pci_write_config_word(dev, msi_control_reg(pos), control);
472 msix_disable(control);
473 pci_write_config_word(dev, msi_control_reg(pos), control);
475 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
476 /* PCI Express Endpoint device detected */
477 pci_intx(dev, 1); /* enable intx */
481 static int msi_lookup_vector(struct pci_dev *dev, int type)
486 spin_lock_irqsave(&msi_lock, flags);
487 for (vector = FIRST_DEVICE_VECTOR; vector < NR_IRQS; vector++) {
488 if (!msi_desc[vector] || msi_desc[vector]->dev != dev ||
489 msi_desc[vector]->msi_attrib.type != type ||
490 msi_desc[vector]->msi_attrib.default_vector != dev->irq)
492 spin_unlock_irqrestore(&msi_lock, flags);
493 /* This pre-assigned MSI vector for this device
494 already exits. Override dev->irq with this vector */
498 spin_unlock_irqrestore(&msi_lock, flags);
503 void pci_scan_msi_device(struct pci_dev *dev)
508 if (pci_find_capability(dev, PCI_CAP_ID_MSIX) > 0)
510 else if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0)
511 nr_reserved_vectors++;
515 int pci_save_msi_state(struct pci_dev *dev)
519 struct pci_cap_saved_state *save_state;
522 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
523 if (pos <= 0 || dev->no_msi)
526 pci_read_config_word(dev, msi_control_reg(pos), &control);
527 if (!(control & PCI_MSI_FLAGS_ENABLE))
530 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
533 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
536 cap = &save_state->data[0];
538 pci_read_config_dword(dev, pos, &cap[i++]);
539 control = cap[0] >> 16;
540 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
541 if (control & PCI_MSI_FLAGS_64BIT) {
542 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
543 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
545 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
546 if (control & PCI_MSI_FLAGS_MASKBIT)
547 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
548 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
549 save_state->cap_nr = PCI_CAP_ID_MSI;
550 pci_add_saved_cap(dev, save_state);
554 void pci_restore_msi_state(struct pci_dev *dev)
558 struct pci_cap_saved_state *save_state;
561 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
562 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
563 if (!save_state || pos <= 0)
565 cap = &save_state->data[0];
567 control = cap[i++] >> 16;
568 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
569 if (control & PCI_MSI_FLAGS_64BIT) {
570 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
571 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
573 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
574 if (control & PCI_MSI_FLAGS_MASKBIT)
575 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
576 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
577 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
578 pci_remove_saved_cap(save_state);
582 int pci_save_msix_state(struct pci_dev *dev)
586 int vector, head, tail = 0;
588 struct pci_cap_saved_state *save_state;
590 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
591 if (pos <= 0 || dev->no_msi)
594 /* save the capability */
595 pci_read_config_word(dev, msi_control_reg(pos), &control);
596 if (!(control & PCI_MSIX_FLAGS_ENABLE))
598 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
601 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
604 *((u16 *)&save_state->data[0]) = control;
608 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
613 vector = head = dev->irq;
614 while (head != tail) {
617 struct msi_desc *entry;
619 entry = msi_desc[vector];
620 base = entry->mask_base;
621 j = entry->msi_attrib.entry_nr;
623 entry->address_lo_save =
624 readl(base + j * PCI_MSIX_ENTRY_SIZE +
625 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
626 entry->address_hi_save =
627 readl(base + j * PCI_MSIX_ENTRY_SIZE +
628 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
630 readl(base + j * PCI_MSIX_ENTRY_SIZE +
631 PCI_MSIX_ENTRY_DATA_OFFSET);
633 tail = msi_desc[vector]->link.tail;
638 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
639 save_state->cap_nr = PCI_CAP_ID_MSIX;
640 pci_add_saved_cap(dev, save_state);
644 void pci_restore_msix_state(struct pci_dev *dev)
648 int vector, head, tail = 0;
651 struct msi_desc *entry;
653 struct pci_cap_saved_state *save_state;
655 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
658 save = *((u16 *)&save_state->data[0]);
659 pci_remove_saved_cap(save_state);
662 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
666 /* route the table */
668 if (msi_lookup_vector(dev, PCI_CAP_ID_MSIX))
670 vector = head = dev->irq;
671 while (head != tail) {
672 entry = msi_desc[vector];
673 base = entry->mask_base;
674 j = entry->msi_attrib.entry_nr;
676 writel(entry->address_lo_save,
677 base + j * PCI_MSIX_ENTRY_SIZE +
678 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
679 writel(entry->address_hi_save,
680 base + j * PCI_MSIX_ENTRY_SIZE +
681 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
682 writel(entry->data_save,
683 base + j * PCI_MSIX_ENTRY_SIZE +
684 PCI_MSIX_ENTRY_DATA_OFFSET);
686 tail = msi_desc[vector]->link.tail;
691 pci_write_config_word(dev, msi_control_reg(pos), save);
692 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
696 static int msi_register_init(struct pci_dev *dev, struct msi_desc *entry)
702 int pos, vector = dev->irq;
705 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
706 pci_read_config_word(dev, msi_control_reg(pos), &control);
708 /* Configure MSI capability structure */
709 status = msi_ops->setup(dev, vector, &address_hi, &address_lo, &data);
713 pci_write_config_dword(dev, msi_lower_address_reg(pos), address_lo);
714 if (is_64bit_address(control)) {
715 pci_write_config_dword(dev,
716 msi_upper_address_reg(pos), address_hi);
717 pci_write_config_word(dev,
718 msi_data_reg(pos, 1), data);
720 pci_write_config_word(dev,
721 msi_data_reg(pos, 0), data);
722 if (entry->msi_attrib.maskbit) {
723 unsigned int maskbits, temp;
724 /* All MSIs are unmasked by default, Mask them all */
725 pci_read_config_dword(dev,
726 msi_mask_bits_reg(pos, is_64bit_address(control)),
728 temp = (1 << multi_msi_capable(control));
729 temp = ((temp - 1) & ~temp);
731 pci_write_config_dword(dev,
732 msi_mask_bits_reg(pos, is_64bit_address(control)),
740 * msi_capability_init - configure device's MSI capability structure
741 * @dev: pointer to the pci_dev data structure of MSI device function
743 * Setup the MSI capability structure of device function with a single
744 * MSI vector, regardless of device function is capable of handling
745 * multiple messages. A return of zero indicates the successful setup
746 * of an entry zero with the new MSI vector or non-zero for otherwise.
748 static int msi_capability_init(struct pci_dev *dev)
751 struct msi_desc *entry;
755 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
756 pci_read_config_word(dev, msi_control_reg(pos), &control);
757 /* MSI Entry Initialization */
758 entry = alloc_msi_entry();
762 vector = get_msi_vector(dev);
764 kmem_cache_free(msi_cachep, entry);
767 entry->link.head = vector;
768 entry->link.tail = vector;
769 entry->msi_attrib.type = PCI_CAP_ID_MSI;
770 entry->msi_attrib.state = 0; /* Mark it not active */
771 entry->msi_attrib.entry_nr = 0;
772 entry->msi_attrib.maskbit = is_mask_bit_support(control);
773 entry->msi_attrib.default_vector = dev->irq; /* Save IOAPIC IRQ */
776 if (is_mask_bit_support(control)) {
777 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
778 is_64bit_address(control));
780 /* Replace with MSI handler */
781 irq_handler_init(PCI_CAP_ID_MSI, vector, entry->msi_attrib.maskbit);
782 /* Configure MSI capability structure */
783 status = msi_register_init(dev, entry);
785 dev->irq = entry->msi_attrib.default_vector;
786 kmem_cache_free(msi_cachep, entry);
790 attach_msi_entry(entry, vector);
791 /* Set MSI enabled bits */
792 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
798 * msix_capability_init - configure device's MSI-X capability
799 * @dev: pointer to the pci_dev data structure of MSI-X device function
800 * @entries: pointer to an array of struct msix_entry entries
801 * @nvec: number of @entries
803 * Setup the MSI-X capability structure of device function with a
804 * single MSI-X vector. A return of zero indicates the successful setup of
805 * requested MSI-X entries with allocated vectors or non-zero for otherwise.
807 static int msix_capability_init(struct pci_dev *dev,
808 struct msix_entry *entries, int nvec)
810 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
815 int vector, pos, i, j, nr_entries, temp = 0;
816 unsigned long phys_addr;
822 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
823 /* Request & Map MSI-X table region */
824 pci_read_config_word(dev, msi_control_reg(pos), &control);
825 nr_entries = multi_msix_capable(control);
827 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
828 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
829 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
830 phys_addr = pci_resource_start (dev, bir) + table_offset;
831 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
835 /* MSI-X Table Initialization */
836 for (i = 0; i < nvec; i++) {
837 entry = alloc_msi_entry();
840 vector = get_msi_vector(dev);
842 kmem_cache_free(msi_cachep, entry);
846 j = entries[i].entry;
847 entries[i].vector = vector;
848 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
849 entry->msi_attrib.state = 0; /* Mark it not active */
850 entry->msi_attrib.entry_nr = j;
851 entry->msi_attrib.maskbit = 1;
852 entry->msi_attrib.default_vector = dev->irq;
854 entry->mask_base = base;
856 entry->link.head = vector;
857 entry->link.tail = vector;
860 entry->link.head = temp;
861 entry->link.tail = tail->link.tail;
862 tail->link.tail = vector;
863 head->link.head = vector;
867 /* Replace with MSI-X handler */
868 irq_handler_init(PCI_CAP_ID_MSIX, vector, 1);
869 /* Configure MSI-X capability structure */
870 status = msi_ops->setup(dev, vector,
878 base + j * PCI_MSIX_ENTRY_SIZE +
879 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
881 base + j * PCI_MSIX_ENTRY_SIZE +
882 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
884 base + j * PCI_MSIX_ENTRY_SIZE +
885 PCI_MSIX_ENTRY_DATA_OFFSET);
886 attach_msi_entry(entry, vector);
890 for (; i >= 0; i--) {
891 vector = (entries + i)->vector;
892 msi_free_vector(dev, vector, 0);
893 (entries + i)->vector = 0;
897 /* Set MSI-X enabled bits */
898 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
904 * pci_enable_msi - configure device's MSI capability structure
905 * @dev: pointer to the pci_dev data structure of MSI device function
907 * Setup the MSI capability structure of device function with
908 * a single MSI vector upon its software driver call to request for
909 * MSI mode enabled on its hardware device function. A return of zero
910 * indicates the successful setup of an entry zero with the new MSI
911 * vector or non-zero for otherwise.
913 int pci_enable_msi(struct pci_dev* dev)
915 int pos, temp, status = -EINVAL;
918 if (!pci_msi_enable || !dev)
924 if (dev->bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
933 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
937 pci_read_config_word(dev, msi_control_reg(pos), &control);
938 if (control & PCI_MSI_FLAGS_ENABLE)
939 return 0; /* Already in MSI mode */
941 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
945 spin_lock_irqsave(&msi_lock, flags);
946 if (!vector_irq[dev->irq]) {
947 msi_desc[dev->irq]->msi_attrib.state = 0;
948 vector_irq[dev->irq] = -1;
949 nr_released_vectors--;
950 spin_unlock_irqrestore(&msi_lock, flags);
951 status = msi_register_init(dev, msi_desc[dev->irq]);
953 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
956 spin_unlock_irqrestore(&msi_lock, flags);
959 /* Check whether driver already requested for MSI-X vectors */
960 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
961 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
962 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
963 "Device already has MSI-X vectors assigned\n",
968 status = msi_capability_init(dev);
971 nr_reserved_vectors--; /* Only MSI capable */
972 else if (nr_msix_devices > 0)
973 nr_msix_devices--; /* Both MSI and MSI-X capable,
974 but choose enabling MSI */
980 void pci_disable_msi(struct pci_dev* dev)
982 struct msi_desc *entry;
983 int pos, default_vector;
992 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
996 pci_read_config_word(dev, msi_control_reg(pos), &control);
997 if (!(control & PCI_MSI_FLAGS_ENABLE))
1000 spin_lock_irqsave(&msi_lock, flags);
1001 entry = msi_desc[dev->irq];
1002 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
1003 spin_unlock_irqrestore(&msi_lock, flags);
1006 if (entry->msi_attrib.state) {
1007 spin_unlock_irqrestore(&msi_lock, flags);
1008 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
1009 "free_irq() on MSI vector %d\n",
1010 pci_name(dev), dev->irq);
1011 BUG_ON(entry->msi_attrib.state > 0);
1013 vector_irq[dev->irq] = 0; /* free it */
1014 nr_released_vectors++;
1015 default_vector = entry->msi_attrib.default_vector;
1016 spin_unlock_irqrestore(&msi_lock, flags);
1017 /* Restore dev->irq to its default pin-assertion vector */
1018 dev->irq = default_vector;
1019 disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
1024 static int msi_free_vector(struct pci_dev* dev, int vector, int reassign)
1026 struct msi_desc *entry;
1027 int head, entry_nr, type;
1029 unsigned long flags;
1031 msi_ops->teardown(vector);
1033 spin_lock_irqsave(&msi_lock, flags);
1034 entry = msi_desc[vector];
1035 if (!entry || entry->dev != dev) {
1036 spin_unlock_irqrestore(&msi_lock, flags);
1039 type = entry->msi_attrib.type;
1040 entry_nr = entry->msi_attrib.entry_nr;
1041 head = entry->link.head;
1042 base = entry->mask_base;
1043 msi_desc[entry->link.head]->link.tail = entry->link.tail;
1044 msi_desc[entry->link.tail]->link.head = entry->link.head;
1047 vector_irq[vector] = 0;
1048 nr_released_vectors++;
1050 msi_desc[vector] = NULL;
1051 spin_unlock_irqrestore(&msi_lock, flags);
1053 kmem_cache_free(msi_cachep, entry);
1055 if (type == PCI_CAP_ID_MSIX) {
1058 entry_nr * PCI_MSIX_ENTRY_SIZE +
1059 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
1061 if (head == vector) {
1063 * Detect last MSI-X vector to be released.
1064 * Release the MSI-X memory-mapped table.
1067 int pos, nr_entries;
1068 unsigned long phys_addr;
1073 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1074 pci_read_config_word(dev, msi_control_reg(pos),
1076 nr_entries = multi_msix_capable(control);
1077 pci_read_config_dword(dev, msix_table_offset_reg(pos),
1079 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
1080 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
1081 phys_addr = pci_resource_start(dev, bir) + table_offset;
1083 * FIXME! and what did you want to do with phys_addr?
1093 static int reroute_msix_table(int head, struct msix_entry *entries, int *nvec)
1095 int vector = head, tail = 0;
1096 int i, j = 0, nr_entries = 0;
1098 unsigned long flags;
1100 spin_lock_irqsave(&msi_lock, flags);
1101 while (head != tail) {
1103 tail = msi_desc[vector]->link.tail;
1104 if (entries[0].entry == msi_desc[vector]->msi_attrib.entry_nr)
1108 if (*nvec > nr_entries) {
1109 spin_unlock_irqrestore(&msi_lock, flags);
1113 vector = ((j > 0) ? j : head);
1114 for (i = 0; i < *nvec; i++) {
1115 j = msi_desc[vector]->msi_attrib.entry_nr;
1116 msi_desc[vector]->msi_attrib.state = 0; /* Mark it not active */
1117 vector_irq[vector] = -1; /* Mark it busy */
1118 nr_released_vectors--;
1119 entries[i].vector = vector;
1120 if (j != (entries + i)->entry) {
1121 base = msi_desc[vector]->mask_base;
1122 msi_desc[vector]->msi_attrib.entry_nr =
1123 (entries + i)->entry;
1124 writel( readl(base + j * PCI_MSIX_ENTRY_SIZE +
1125 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET), base +
1126 (entries + i)->entry * PCI_MSIX_ENTRY_SIZE +
1127 PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
1128 writel( readl(base + j * PCI_MSIX_ENTRY_SIZE +
1129 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET), base +
1130 (entries + i)->entry * PCI_MSIX_ENTRY_SIZE +
1131 PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
1132 writel( (readl(base + j * PCI_MSIX_ENTRY_SIZE +
1133 PCI_MSIX_ENTRY_DATA_OFFSET) & 0xff00) | vector,
1134 base + (entries+i)->entry*PCI_MSIX_ENTRY_SIZE +
1135 PCI_MSIX_ENTRY_DATA_OFFSET);
1137 vector = msi_desc[vector]->link.tail;
1139 spin_unlock_irqrestore(&msi_lock, flags);
1145 * pci_enable_msix - configure device's MSI-X capability structure
1146 * @dev: pointer to the pci_dev data structure of MSI-X device function
1147 * @entries: pointer to an array of MSI-X entries
1148 * @nvec: number of MSI-X vectors requested for allocation by device driver
1150 * Setup the MSI-X capability structure of device function with the number
1151 * of requested vectors upon its software driver call to request for
1152 * MSI-X mode enabled on its hardware device function. A return of zero
1153 * indicates the successful configuration of MSI-X capability structure
1154 * with new allocated MSI-X vectors. A return of < 0 indicates a failure.
1155 * Or a return of > 0 indicates that driver request is exceeding the number
1156 * of vectors available. Driver should use the returned value to re-send
1159 int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
1161 int status, pos, nr_entries, free_vectors;
1164 unsigned long flags;
1166 if (!pci_msi_enable || !dev || !entries)
1169 status = msi_init();
1173 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1177 pci_read_config_word(dev, msi_control_reg(pos), &control);
1178 if (control & PCI_MSIX_FLAGS_ENABLE)
1179 return -EINVAL; /* Already in MSI-X mode */
1181 nr_entries = multi_msix_capable(control);
1182 if (nvec > nr_entries)
1185 /* Check for any invalid entries */
1186 for (i = 0; i < nvec; i++) {
1187 if (entries[i].entry >= nr_entries)
1188 return -EINVAL; /* invalid entry */
1189 for (j = i + 1; j < nvec; j++) {
1190 if (entries[i].entry == entries[j].entry)
1191 return -EINVAL; /* duplicate entry */
1195 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1198 /* Reroute MSI-X table */
1199 if (reroute_msix_table(dev->irq, entries, &nr_entries)) {
1200 /* #requested > #previous-assigned */
1205 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
1208 /* Check whether driver already requested for MSI vector */
1209 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
1210 !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1211 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
1212 "Device already has an MSI vector assigned\n",
1218 spin_lock_irqsave(&msi_lock, flags);
1220 * msi_lock is provided to ensure that enough vectors resources are
1221 * available before granting.
1223 free_vectors = pci_vector_resources(last_alloc_vector,
1224 nr_released_vectors);
1225 /* Ensure that each MSI/MSI-X device has one vector reserved by
1226 default to avoid any MSI-X driver to take all available
1228 free_vectors -= nr_reserved_vectors;
1229 /* Find the average of free vectors among MSI-X devices */
1230 if (nr_msix_devices > 0)
1231 free_vectors /= nr_msix_devices;
1232 spin_unlock_irqrestore(&msi_lock, flags);
1234 if (nvec > free_vectors) {
1235 if (free_vectors > 0)
1236 return free_vectors;
1241 status = msix_capability_init(dev, entries, nvec);
1242 if (!status && nr_msix_devices > 0)
1248 void pci_disable_msix(struct pci_dev* dev)
1253 if (!pci_msi_enable)
1258 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1262 pci_read_config_word(dev, msi_control_reg(pos), &control);
1263 if (!(control & PCI_MSIX_FLAGS_ENABLE))
1267 if (!msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1268 int state, vector, head, tail = 0, warning = 0;
1269 unsigned long flags;
1271 vector = head = dev->irq;
1272 spin_lock_irqsave(&msi_lock, flags);
1273 while (head != tail) {
1274 state = msi_desc[vector]->msi_attrib.state;
1278 vector_irq[vector] = 0; /* free it */
1279 nr_released_vectors++;
1281 tail = msi_desc[vector]->link.tail;
1284 spin_unlock_irqrestore(&msi_lock, flags);
1287 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
1288 "free_irq() on all MSI-X vectors\n",
1290 BUG_ON(warning > 0);
1293 disable_msi_mode(dev,
1294 pci_find_capability(dev, PCI_CAP_ID_MSIX),
1302 * msi_remove_pci_irq_vectors - reclaim MSI(X) vectors to unused state
1303 * @dev: pointer to the pci_dev data structure of MSI(X) device function
1305 * Being called during hotplug remove, from which the device function
1306 * is hot-removed. All previous assigned MSI/MSI-X vectors, if
1307 * allocated for this device function, are reclaimed to unused state,
1308 * which may be used later on.
1310 void msi_remove_pci_irq_vectors(struct pci_dev* dev)
1312 int state, pos, temp;
1313 unsigned long flags;
1315 if (!pci_msi_enable || !dev)
1318 temp = dev->irq; /* Save IOAPIC IRQ */
1319 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
1320 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSI)) {
1321 spin_lock_irqsave(&msi_lock, flags);
1322 state = msi_desc[dev->irq]->msi_attrib.state;
1323 spin_unlock_irqrestore(&msi_lock, flags);
1325 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1326 "called without free_irq() on MSI vector %d\n",
1327 pci_name(dev), dev->irq);
1329 } else /* Release MSI vector assigned to this device */
1330 msi_free_vector(dev, dev->irq, 0);
1331 dev->irq = temp; /* Restore IOAPIC IRQ */
1333 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
1334 if (pos > 0 && !msi_lookup_vector(dev, PCI_CAP_ID_MSIX)) {
1335 int vector, head, tail = 0, warning = 0;
1336 void __iomem *base = NULL;
1338 vector = head = dev->irq;
1339 while (head != tail) {
1340 spin_lock_irqsave(&msi_lock, flags);
1341 state = msi_desc[vector]->msi_attrib.state;
1342 tail = msi_desc[vector]->link.tail;
1343 base = msi_desc[vector]->mask_base;
1344 spin_unlock_irqrestore(&msi_lock, flags);
1347 else if (vector != head) /* Release MSI-X vector */
1348 msi_free_vector(dev, vector, 0);
1351 msi_free_vector(dev, vector, 0);
1353 /* Force to release the MSI-X memory-mapped table */
1355 unsigned long phys_addr;
1360 pci_read_config_word(dev, msi_control_reg(pos),
1362 pci_read_config_dword(dev, msix_table_offset_reg(pos),
1364 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
1365 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
1366 phys_addr = pci_resource_start(dev, bir) + table_offset;
1368 * FIXME! and what did you want to do with phys_addr?
1372 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
1373 "called without free_irq() on all MSI-X vectors\n",
1375 BUG_ON(warning > 0);
1377 dev->irq = temp; /* Restore IOAPIC IRQ */
1381 void pci_no_msi(void)
1386 EXPORT_SYMBOL(pci_enable_msi);
1387 EXPORT_SYMBOL(pci_disable_msi);
1388 EXPORT_SYMBOL(pci_enable_msix);
1389 EXPORT_SYMBOL(pci_disable_msix);