2 * drivers/serial/serial_txx9.c
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
20 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/delay.h>
29 #include <linux/platform_device.h>
30 #include <linux/pci.h>
31 #include <linux/serial_core.h>
32 #include <linux/serial.h>
36 static char *serial_version = "1.10";
37 static char *serial_name = "TX39/49 Serial driver";
39 #define PASS_LIMIT 256
41 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
42 /* "ttyS" is used for standard serial driver */
43 #define TXX9_TTY_NAME "ttyTX"
44 #define TXX9_TTY_MINOR_START 196
45 #define TXX9_TTY_MAJOR 204
47 /* acts like standard serial driver */
48 #define TXX9_TTY_NAME "ttyS"
49 #define TXX9_TTY_MINOR_START 64
50 #define TXX9_TTY_MAJOR TTY_MAJOR
54 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
55 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
58 /* support for Toshiba TC86C001 SIO */
59 #define ENABLE_SERIAL_TXX9_PCI
63 * Number of serial ports
65 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
67 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
69 struct uart_txx9_port {
70 struct uart_port port;
71 /* No additional info for now */
74 #define TXX9_REGION_SIZE 0x24
76 /* TXX9 Serial Registers */
77 #define TXX9_SILCR 0x00
78 #define TXX9_SIDICR 0x04
79 #define TXX9_SIDISR 0x08
80 #define TXX9_SICISR 0x0c
81 #define TXX9_SIFCR 0x10
82 #define TXX9_SIFLCR 0x14
83 #define TXX9_SIBGR 0x18
84 #define TXX9_SITFIFO 0x1c
85 #define TXX9_SIRFIFO 0x20
87 /* SILCR : Line Control */
88 #define TXX9_SILCR_SCS_MASK 0x00000060
89 #define TXX9_SILCR_SCS_IMCLK 0x00000000
90 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
91 #define TXX9_SILCR_SCS_SCLK 0x00000040
92 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
93 #define TXX9_SILCR_UEPS 0x00000010
94 #define TXX9_SILCR_UPEN 0x00000008
95 #define TXX9_SILCR_USBL_MASK 0x00000004
96 #define TXX9_SILCR_USBL_1BIT 0x00000000
97 #define TXX9_SILCR_USBL_2BIT 0x00000004
98 #define TXX9_SILCR_UMODE_MASK 0x00000003
99 #define TXX9_SILCR_UMODE_8BIT 0x00000000
100 #define TXX9_SILCR_UMODE_7BIT 0x00000001
102 /* SIDICR : DMA/Int. Control */
103 #define TXX9_SIDICR_TDE 0x00008000
104 #define TXX9_SIDICR_RDE 0x00004000
105 #define TXX9_SIDICR_TIE 0x00002000
106 #define TXX9_SIDICR_RIE 0x00001000
107 #define TXX9_SIDICR_SPIE 0x00000800
108 #define TXX9_SIDICR_CTSAC 0x00000600
109 #define TXX9_SIDICR_STIE_MASK 0x0000003f
110 #define TXX9_SIDICR_STIE_OERS 0x00000020
111 #define TXX9_SIDICR_STIE_CTSS 0x00000010
112 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
113 #define TXX9_SIDICR_STIE_TRDY 0x00000004
114 #define TXX9_SIDICR_STIE_TXALS 0x00000002
115 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
117 /* SIDISR : DMA/Int. Status */
118 #define TXX9_SIDISR_UBRK 0x00008000
119 #define TXX9_SIDISR_UVALID 0x00004000
120 #define TXX9_SIDISR_UFER 0x00002000
121 #define TXX9_SIDISR_UPER 0x00001000
122 #define TXX9_SIDISR_UOER 0x00000800
123 #define TXX9_SIDISR_ERI 0x00000400
124 #define TXX9_SIDISR_TOUT 0x00000200
125 #define TXX9_SIDISR_TDIS 0x00000100
126 #define TXX9_SIDISR_RDIS 0x00000080
127 #define TXX9_SIDISR_STIS 0x00000040
128 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
130 /* SICISR : Change Int. Status */
131 #define TXX9_SICISR_OERS 0x00000020
132 #define TXX9_SICISR_CTSS 0x00000010
133 #define TXX9_SICISR_RBRKD 0x00000008
134 #define TXX9_SICISR_TRDY 0x00000004
135 #define TXX9_SICISR_TXALS 0x00000002
136 #define TXX9_SICISR_UBRKD 0x00000001
138 /* SIFCR : FIFO Control */
139 #define TXX9_SIFCR_SWRST 0x00008000
140 #define TXX9_SIFCR_RDIL_MASK 0x00000180
141 #define TXX9_SIFCR_RDIL_1 0x00000000
142 #define TXX9_SIFCR_RDIL_4 0x00000080
143 #define TXX9_SIFCR_RDIL_8 0x00000100
144 #define TXX9_SIFCR_RDIL_12 0x00000180
145 #define TXX9_SIFCR_RDIL_MAX 0x00000180
146 #define TXX9_SIFCR_TDIL_MASK 0x00000018
147 #define TXX9_SIFCR_TDIL_MASK 0x00000018
148 #define TXX9_SIFCR_TDIL_1 0x00000000
149 #define TXX9_SIFCR_TDIL_4 0x00000001
150 #define TXX9_SIFCR_TDIL_8 0x00000010
151 #define TXX9_SIFCR_TDIL_MAX 0x00000010
152 #define TXX9_SIFCR_TFRST 0x00000004
153 #define TXX9_SIFCR_RFRST 0x00000002
154 #define TXX9_SIFCR_FRSTE 0x00000001
155 #define TXX9_SIO_TX_FIFO 8
156 #define TXX9_SIO_RX_FIFO 16
158 /* SIFLCR : Flow Control */
159 #define TXX9_SIFLCR_RCS 0x00001000
160 #define TXX9_SIFLCR_TES 0x00000800
161 #define TXX9_SIFLCR_RTSSC 0x00000200
162 #define TXX9_SIFLCR_RSDE 0x00000100
163 #define TXX9_SIFLCR_TSDE 0x00000080
164 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
165 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
166 #define TXX9_SIFLCR_TBRK 0x00000001
168 /* SIBGR : Baudrate Control */
169 #define TXX9_SIBGR_BCLK_MASK 0x00000300
170 #define TXX9_SIBGR_BCLK_T0 0x00000000
171 #define TXX9_SIBGR_BCLK_T2 0x00000100
172 #define TXX9_SIBGR_BCLK_T4 0x00000200
173 #define TXX9_SIBGR_BCLK_T6 0x00000300
174 #define TXX9_SIBGR_BRD_MASK 0x000000ff
176 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
178 switch (up->port.iotype) {
180 return __raw_readl(up->port.membase + offset);
182 return inl(up->port.iobase + offset);
187 sio_out(struct uart_txx9_port *up, int offset, int value)
189 switch (up->port.iotype) {
191 __raw_writel(value, up->port.membase + offset);
194 outl(value, up->port.iobase + offset);
200 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
202 sio_out(up, offset, sio_in(up, offset) & ~value);
205 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
207 sio_out(up, offset, sio_in(up, offset) | value);
211 sio_quot_set(struct uart_txx9_port *up, int quot)
215 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
216 else if (quot < (256 << 2))
217 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
218 else if (quot < (256 << 4))
219 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
220 else if (quot < (256 << 6))
221 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
223 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
226 static void serial_txx9_stop_tx(struct uart_port *port)
228 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
229 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
232 static void serial_txx9_start_tx(struct uart_port *port)
234 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
235 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
238 static void serial_txx9_stop_rx(struct uart_port *port)
240 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
241 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
244 static void serial_txx9_enable_ms(struct uart_port *port)
246 /* TXX9-SIO can not control DTR... */
249 static void serial_txx9_initialize(struct uart_port *port)
251 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
252 unsigned int tmout = 10000;
254 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
255 /* TX4925 BUG WORKAROUND. Accessing SIOC register
256 * immediately after soft reset causes bus error. */
259 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
261 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
262 sio_set(up, TXX9_SIFCR,
263 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
264 /* initial settings */
265 sio_out(up, TXX9_SILCR,
266 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
267 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
268 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
269 sio_quot_set(up, uart_get_divisor(port, 9600));
270 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
271 sio_out(up, TXX9_SIDICR, 0);
275 receive_chars(struct uart_txx9_port *up, unsigned int *status)
277 struct tty_struct *tty = up->port.info->tty;
279 unsigned int disr = *status;
282 unsigned int next_ignore_status_mask;
285 ch = sio_in(up, TXX9_SIRFIFO);
287 up->port.icount.rx++;
289 /* mask out RFDN_MASK bit added by previous overrun */
290 next_ignore_status_mask =
291 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
292 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
293 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
295 * For statistics only
297 if (disr & TXX9_SIDISR_UBRK) {
298 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
299 up->port.icount.brk++;
301 * We do the SysRQ and SAK checking
302 * here because otherwise the break
303 * may get masked by ignore_status_mask
304 * or read_status_mask.
306 if (uart_handle_break(&up->port))
308 } else if (disr & TXX9_SIDISR_UPER)
309 up->port.icount.parity++;
310 else if (disr & TXX9_SIDISR_UFER)
311 up->port.icount.frame++;
312 if (disr & TXX9_SIDISR_UOER) {
313 up->port.icount.overrun++;
315 * The receiver read buffer still hold
316 * a char which caused overrun.
317 * Ignore next char by adding RFDN_MASK
318 * to ignore_status_mask temporarily.
320 next_ignore_status_mask |=
321 TXX9_SIDISR_RFDN_MASK;
325 * Mask off conditions which should be ingored.
327 disr &= up->port.read_status_mask;
329 if (disr & TXX9_SIDISR_UBRK) {
331 } else if (disr & TXX9_SIDISR_UPER)
333 else if (disr & TXX9_SIDISR_UFER)
336 if (uart_handle_sysrq_char(&up->port, ch))
339 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
342 up->port.ignore_status_mask = next_ignore_status_mask;
343 disr = sio_in(up, TXX9_SIDISR);
344 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
345 spin_unlock(&up->port.lock);
346 tty_flip_buffer_push(tty);
347 spin_lock(&up->port.lock);
351 static inline void transmit_chars(struct uart_txx9_port *up)
353 struct circ_buf *xmit = &up->port.info->xmit;
356 if (up->port.x_char) {
357 sio_out(up, TXX9_SITFIFO, up->port.x_char);
358 up->port.icount.tx++;
362 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
363 serial_txx9_stop_tx(&up->port);
367 count = TXX9_SIO_TX_FIFO;
369 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
370 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
371 up->port.icount.tx++;
372 if (uart_circ_empty(xmit))
374 } while (--count > 0);
376 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
377 uart_write_wakeup(&up->port);
379 if (uart_circ_empty(xmit))
380 serial_txx9_stop_tx(&up->port);
383 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
385 int pass_counter = 0;
386 struct uart_txx9_port *up = dev_id;
390 spin_lock(&up->port.lock);
391 status = sio_in(up, TXX9_SIDISR);
392 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
393 status &= ~TXX9_SIDISR_TDIS;
394 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
395 TXX9_SIDISR_TOUT))) {
396 spin_unlock(&up->port.lock);
400 if (status & TXX9_SIDISR_RDIS)
401 receive_chars(up, &status);
402 if (status & TXX9_SIDISR_TDIS)
404 /* Clear TX/RX Int. Status */
405 sio_mask(up, TXX9_SIDISR,
406 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
408 spin_unlock(&up->port.lock);
410 if (pass_counter++ > PASS_LIMIT)
414 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
417 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
419 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
423 spin_lock_irqsave(&up->port.lock, flags);
424 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
425 spin_unlock_irqrestore(&up->port.lock, flags);
430 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
432 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
435 /* no modem control lines */
436 ret = TIOCM_CAR | TIOCM_DSR;
437 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
438 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
443 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
445 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
447 if (mctrl & TIOCM_RTS)
448 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
450 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
453 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
455 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
458 spin_lock_irqsave(&up->port.lock, flags);
459 if (break_state == -1)
460 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
462 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
463 spin_unlock_irqrestore(&up->port.lock, flags);
466 static int serial_txx9_startup(struct uart_port *port)
468 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
473 * Clear the FIFO buffers and disable them.
474 * (they will be reenabled in set_termios())
476 sio_set(up, TXX9_SIFCR,
477 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
479 sio_mask(up, TXX9_SIFCR,
480 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
481 sio_out(up, TXX9_SIDICR, 0);
484 * Clear the interrupt registers.
486 sio_out(up, TXX9_SIDISR, 0);
488 retval = request_irq(up->port.irq, serial_txx9_interrupt,
489 IRQF_SHARED, "serial_txx9", up);
494 * Now, initialize the UART
496 spin_lock_irqsave(&up->port.lock, flags);
497 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
498 spin_unlock_irqrestore(&up->port.lock, flags);
501 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
504 * Finally, enable interrupts.
506 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
511 static void serial_txx9_shutdown(struct uart_port *port)
513 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
517 * Disable interrupts from this port
519 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
521 spin_lock_irqsave(&up->port.lock, flags);
522 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
523 spin_unlock_irqrestore(&up->port.lock, flags);
526 * Disable break condition
528 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
530 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
531 if (up->port.cons && up->port.line == up->port.cons->index) {
532 free_irq(up->port.irq, up);
537 sio_set(up, TXX9_SIFCR,
538 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
540 sio_mask(up, TXX9_SIFCR,
541 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
544 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
546 free_irq(up->port.irq, up);
550 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
551 struct ktermios *old)
553 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
554 unsigned int cval, fcr = 0;
556 unsigned int baud, quot;
559 * We don't support modem control lines.
561 termios->c_cflag &= ~(HUPCL | CMSPAR);
562 termios->c_cflag |= CLOCAL;
564 cval = sio_in(up, TXX9_SILCR);
565 /* byte size and parity */
566 cval &= ~TXX9_SILCR_UMODE_MASK;
567 switch (termios->c_cflag & CSIZE) {
569 cval |= TXX9_SILCR_UMODE_7BIT;
572 case CS5: /* not supported */
573 case CS6: /* not supported */
575 cval |= TXX9_SILCR_UMODE_8BIT;
579 cval &= ~TXX9_SILCR_USBL_MASK;
580 if (termios->c_cflag & CSTOPB)
581 cval |= TXX9_SILCR_USBL_2BIT;
583 cval |= TXX9_SILCR_USBL_1BIT;
584 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
585 if (termios->c_cflag & PARENB)
586 cval |= TXX9_SILCR_UPEN;
587 if (!(termios->c_cflag & PARODD))
588 cval |= TXX9_SILCR_UEPS;
591 * Ask the core to calculate the divisor for us.
593 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
594 quot = uart_get_divisor(port, baud);
597 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
598 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
601 * Ok, we're now changing the port state. Do it with
602 * interrupts disabled.
604 spin_lock_irqsave(&up->port.lock, flags);
607 * Update the per-port timeout.
609 uart_update_timeout(port, termios->c_cflag, baud);
611 up->port.read_status_mask = TXX9_SIDISR_UOER |
612 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
613 if (termios->c_iflag & INPCK)
614 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
615 if (termios->c_iflag & (BRKINT | PARMRK))
616 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
619 * Characteres to ignore
621 up->port.ignore_status_mask = 0;
622 if (termios->c_iflag & IGNPAR)
623 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
624 if (termios->c_iflag & IGNBRK) {
625 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
627 * If we're ignoring parity and break indicators,
628 * ignore overruns too (for real raw support).
630 if (termios->c_iflag & IGNPAR)
631 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
635 * ignore all characters if CREAD is not set
637 if ((termios->c_cflag & CREAD) == 0)
638 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
640 /* CTS flow control flag */
641 if ((termios->c_cflag & CRTSCTS) &&
642 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
643 sio_set(up, TXX9_SIFLCR,
644 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
646 sio_mask(up, TXX9_SIFLCR,
647 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
650 sio_out(up, TXX9_SILCR, cval);
651 sio_quot_set(up, quot);
652 sio_out(up, TXX9_SIFCR, fcr);
654 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
655 spin_unlock_irqrestore(&up->port.lock, flags);
659 serial_txx9_pm(struct uart_port *port, unsigned int state,
660 unsigned int oldstate)
663 serial_txx9_initialize(port);
666 static int serial_txx9_request_resource(struct uart_txx9_port *up)
668 unsigned int size = TXX9_REGION_SIZE;
671 switch (up->port.iotype) {
673 if (!up->port.mapbase)
676 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
681 if (up->port.flags & UPF_IOREMAP) {
682 up->port.membase = ioremap(up->port.mapbase, size);
683 if (!up->port.membase) {
684 release_mem_region(up->port.mapbase, size);
691 if (!request_region(up->port.iobase, size, "serial_txx9"))
698 static void serial_txx9_release_resource(struct uart_txx9_port *up)
700 unsigned int size = TXX9_REGION_SIZE;
702 switch (up->port.iotype) {
704 if (!up->port.mapbase)
707 if (up->port.flags & UPF_IOREMAP) {
708 iounmap(up->port.membase);
709 up->port.membase = NULL;
712 release_mem_region(up->port.mapbase, size);
716 release_region(up->port.iobase, size);
721 static void serial_txx9_release_port(struct uart_port *port)
723 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
724 serial_txx9_release_resource(up);
727 static int serial_txx9_request_port(struct uart_port *port)
729 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
730 return serial_txx9_request_resource(up);
733 static void serial_txx9_config_port(struct uart_port *port, int uflags)
735 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
739 * Find the region that we can probe for. This in turn
740 * tells us whether we can probe for the type of port.
742 ret = serial_txx9_request_resource(up);
745 port->type = PORT_TXX9;
746 up->port.fifosize = TXX9_SIO_TX_FIFO;
748 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
749 if (up->port.line == up->port.cons->index)
752 serial_txx9_initialize(port);
756 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
758 unsigned long new_port = ser->port;
759 if (HIGH_BITS_OFFSET)
760 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
761 if (ser->type != port->type ||
762 ser->irq != port->irq ||
763 ser->io_type != port->iotype ||
764 new_port != port->iobase ||
765 (unsigned long)ser->iomem_base != port->mapbase)
771 serial_txx9_type(struct uart_port *port)
776 static struct uart_ops serial_txx9_pops = {
777 .tx_empty = serial_txx9_tx_empty,
778 .set_mctrl = serial_txx9_set_mctrl,
779 .get_mctrl = serial_txx9_get_mctrl,
780 .stop_tx = serial_txx9_stop_tx,
781 .start_tx = serial_txx9_start_tx,
782 .stop_rx = serial_txx9_stop_rx,
783 .enable_ms = serial_txx9_enable_ms,
784 .break_ctl = serial_txx9_break_ctl,
785 .startup = serial_txx9_startup,
786 .shutdown = serial_txx9_shutdown,
787 .set_termios = serial_txx9_set_termios,
788 .pm = serial_txx9_pm,
789 .type = serial_txx9_type,
790 .release_port = serial_txx9_release_port,
791 .request_port = serial_txx9_request_port,
792 .config_port = serial_txx9_config_port,
793 .verify_port = serial_txx9_verify_port,
796 static struct uart_txx9_port serial_txx9_ports[UART_NR];
798 static void __init serial_txx9_register_ports(struct uart_driver *drv,
803 for (i = 0; i < UART_NR; i++) {
804 struct uart_txx9_port *up = &serial_txx9_ports[i];
807 up->port.ops = &serial_txx9_pops;
809 if (up->port.iobase || up->port.mapbase)
810 uart_add_one_port(drv, &up->port);
814 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
817 * Wait for transmitter & holding register to empty
819 static inline void wait_for_xmitr(struct uart_txx9_port *up)
821 unsigned int tmout = 10000;
823 /* Wait up to 10ms for the character(s) to be sent. */
825 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
828 /* Wait up to 1s for flow control if necessary */
829 if (up->port.flags & UPF_CONS_FLOW) {
832 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
837 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
839 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
842 sio_out(up, TXX9_SITFIFO, ch);
846 * Print a string to the serial port trying not to disturb
847 * any possible real use of the port...
849 * The console_lock must be held when we get here.
852 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
854 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
855 unsigned int ier, flcr;
858 * First save the UER then disable the interrupts
860 ier = sio_in(up, TXX9_SIDICR);
861 sio_out(up, TXX9_SIDICR, 0);
863 * Disable flow-control if enabled (and unnecessary)
865 flcr = sio_in(up, TXX9_SIFLCR);
866 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
867 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
869 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
872 * Finally, wait for transmitter to become empty
873 * and restore the IER
876 sio_out(up, TXX9_SIFLCR, flcr);
877 sio_out(up, TXX9_SIDICR, ier);
880 static int __init serial_txx9_console_setup(struct console *co, char *options)
882 struct uart_port *port;
883 struct uart_txx9_port *up;
890 * Check whether an invalid uart number has been specified, and
891 * if so, search for the first available port that does have
894 if (co->index >= UART_NR)
896 up = &serial_txx9_ports[co->index];
901 serial_txx9_initialize(&up->port);
904 uart_parse_options(options, &baud, &parity, &bits, &flow);
906 return uart_set_options(port, co, baud, parity, bits, flow);
909 static struct uart_driver serial_txx9_reg;
910 static struct console serial_txx9_console = {
911 .name = TXX9_TTY_NAME,
912 .write = serial_txx9_console_write,
913 .device = uart_console_device,
914 .setup = serial_txx9_console_setup,
915 .flags = CON_PRINTBUFFER,
917 .data = &serial_txx9_reg,
920 static int __init serial_txx9_console_init(void)
922 register_console(&serial_txx9_console);
925 console_initcall(serial_txx9_console_init);
927 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
929 #define SERIAL_TXX9_CONSOLE NULL
932 static struct uart_driver serial_txx9_reg = {
933 .owner = THIS_MODULE,
934 .driver_name = "serial_txx9",
935 .dev_name = TXX9_TTY_NAME,
936 .major = TXX9_TTY_MAJOR,
937 .minor = TXX9_TTY_MINOR_START,
939 .cons = SERIAL_TXX9_CONSOLE,
942 int __init early_serial_txx9_setup(struct uart_port *port)
944 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
947 serial_txx9_ports[port->line].port = *port;
948 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
949 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
953 static DEFINE_MUTEX(serial_txx9_mutex);
956 * serial_txx9_register_port - register a serial port
957 * @port: serial port template
959 * Configure the serial port specified by the request.
961 * The port is then probed and if necessary the IRQ is autodetected
962 * If this fails an error is returned.
964 * On success the port is ready to use and the line number is returned.
966 static int __devinit serial_txx9_register_port(struct uart_port *port)
969 struct uart_txx9_port *uart;
972 mutex_lock(&serial_txx9_mutex);
973 for (i = 0; i < UART_NR; i++) {
974 uart = &serial_txx9_ports[i];
975 if (uart_match_port(&uart->port, port)) {
976 uart_remove_one_port(&serial_txx9_reg, &uart->port);
981 /* Find unused port */
982 for (i = 0; i < UART_NR; i++) {
983 uart = &serial_txx9_ports[i];
984 if (!(uart->port.iobase || uart->port.mapbase))
989 uart->port.iobase = port->iobase;
990 uart->port.membase = port->membase;
991 uart->port.irq = port->irq;
992 uart->port.uartclk = port->uartclk;
993 uart->port.iotype = port->iotype;
994 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
995 uart->port.mapbase = port->mapbase;
997 uart->port.dev = port->dev;
998 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1000 ret = uart->port.line;
1002 mutex_unlock(&serial_txx9_mutex);
1007 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1008 * @line: serial line number
1010 * Remove one serial port. This may not be called from interrupt
1011 * context. We hand the port back to the our control.
1013 static void __devexit serial_txx9_unregister_port(int line)
1015 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1017 mutex_lock(&serial_txx9_mutex);
1018 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1019 uart->port.flags = 0;
1020 uart->port.type = PORT_UNKNOWN;
1021 uart->port.iobase = 0;
1022 uart->port.mapbase = 0;
1023 uart->port.membase = NULL;
1024 uart->port.dev = NULL;
1025 mutex_unlock(&serial_txx9_mutex);
1029 * Register a set of serial devices attached to a platform device.
1031 static int __devinit serial_txx9_probe(struct platform_device *dev)
1033 struct uart_port *p = dev->dev.platform_data;
1034 struct uart_port port;
1037 memset(&port, 0, sizeof(struct uart_port));
1038 for (i = 0; p && p->uartclk != 0; p++, i++) {
1039 port.iobase = p->iobase;
1040 port.membase = p->membase;
1042 port.uartclk = p->uartclk;
1043 port.iotype = p->iotype;
1044 port.flags = p->flags;
1045 port.mapbase = p->mapbase;
1046 port.dev = &dev->dev;
1047 ret = serial_txx9_register_port(&port);
1049 dev_err(&dev->dev, "unable to register port at index %d "
1050 "(IO%x MEM%llx IRQ%d): %d\n", i,
1051 p->iobase, (unsigned long long)p->mapbase,
1059 * Remove serial ports registered against a platform device.
1061 static int __devexit serial_txx9_remove(struct platform_device *dev)
1065 for (i = 0; i < UART_NR; i++) {
1066 struct uart_txx9_port *up = &serial_txx9_ports[i];
1068 if (up->port.dev == &dev->dev)
1069 serial_txx9_unregister_port(i);
1075 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1079 for (i = 0; i < UART_NR; i++) {
1080 struct uart_txx9_port *up = &serial_txx9_ports[i];
1082 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1083 uart_suspend_port(&serial_txx9_reg, &up->port);
1089 static int serial_txx9_resume(struct platform_device *dev)
1093 for (i = 0; i < UART_NR; i++) {
1094 struct uart_txx9_port *up = &serial_txx9_ports[i];
1096 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1097 uart_resume_port(&serial_txx9_reg, &up->port);
1104 static struct platform_driver serial_txx9_plat_driver = {
1105 .probe = serial_txx9_probe,
1106 .remove = __devexit_p(serial_txx9_remove),
1108 .suspend = serial_txx9_suspend,
1109 .resume = serial_txx9_resume,
1112 .name = "serial_txx9",
1113 .owner = THIS_MODULE,
1117 #ifdef ENABLE_SERIAL_TXX9_PCI
1119 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1120 * to the arrangement of serial ports on a PCI card.
1122 static int __devinit
1123 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1125 struct uart_port port;
1129 rc = pci_enable_device(dev);
1133 memset(&port, 0, sizeof(port));
1134 port.ops = &serial_txx9_pops;
1135 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1136 port.uartclk = 66670000;
1137 port.irq = dev->irq;
1138 port.iotype = UPIO_PORT;
1139 port.iobase = pci_resource_start(dev, 1);
1140 port.dev = &dev->dev;
1141 line = serial_txx9_register_port(&port);
1143 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1144 pci_disable_device(dev);
1147 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1152 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1154 struct uart_txx9_port *up = pci_get_drvdata(dev);
1156 pci_set_drvdata(dev, NULL);
1159 serial_txx9_unregister_port(up->port.line);
1160 pci_disable_device(dev);
1165 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1167 struct uart_txx9_port *up = pci_get_drvdata(dev);
1170 uart_suspend_port(&serial_txx9_reg, &up->port);
1171 pci_save_state(dev);
1172 pci_set_power_state(dev, pci_choose_state(dev, state));
1176 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1178 struct uart_txx9_port *up = pci_get_drvdata(dev);
1180 pci_set_power_state(dev, PCI_D0);
1181 pci_restore_state(dev);
1183 uart_resume_port(&serial_txx9_reg, &up->port);
1188 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1189 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1193 static struct pci_driver serial_txx9_pci_driver = {
1194 .name = "serial_txx9",
1195 .probe = pciserial_txx9_init_one,
1196 .remove = __devexit_p(pciserial_txx9_remove_one),
1198 .suspend = pciserial_txx9_suspend_one,
1199 .resume = pciserial_txx9_resume_one,
1201 .id_table = serial_txx9_pci_tbl,
1204 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1205 #endif /* ENABLE_SERIAL_TXX9_PCI */
1207 static struct platform_device *serial_txx9_plat_devs;
1209 static int __init serial_txx9_init(void)
1213 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1215 ret = uart_register_driver(&serial_txx9_reg);
1219 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1220 if (!serial_txx9_plat_devs) {
1222 goto unreg_uart_drv;
1225 ret = platform_device_add(serial_txx9_plat_devs);
1229 serial_txx9_register_ports(&serial_txx9_reg,
1230 &serial_txx9_plat_devs->dev);
1232 ret = platform_driver_register(&serial_txx9_plat_driver);
1236 #ifdef ENABLE_SERIAL_TXX9_PCI
1237 ret = pci_register_driver(&serial_txx9_pci_driver);
1243 platform_device_del(serial_txx9_plat_devs);
1245 platform_device_put(serial_txx9_plat_devs);
1247 uart_unregister_driver(&serial_txx9_reg);
1252 static void __exit serial_txx9_exit(void)
1256 #ifdef ENABLE_SERIAL_TXX9_PCI
1257 pci_unregister_driver(&serial_txx9_pci_driver);
1259 platform_driver_unregister(&serial_txx9_plat_driver);
1260 platform_device_unregister(serial_txx9_plat_devs);
1261 for (i = 0; i < UART_NR; i++) {
1262 struct uart_txx9_port *up = &serial_txx9_ports[i];
1263 if (up->port.iobase || up->port.mapbase)
1264 uart_remove_one_port(&serial_txx9_reg, &up->port);
1267 uart_unregister_driver(&serial_txx9_reg);
1270 module_init(serial_txx9_init);
1271 module_exit(serial_txx9_exit);
1273 MODULE_LICENSE("GPL");
1274 MODULE_DESCRIPTION("TX39/49 serial driver");
1276 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);