2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
58 //! Initialize the debugger
60 //Two positive debug clock pulses while !RST is low.
61 //Take RST low, pulse twice, then high.
79 //! Read and write a CC bit.
80 unsigned char cctrans8(unsigned char byte){
82 //This function came from the SPI Wikipedia article.
85 for (bit = 0; bit < 8; bit++) {
86 /* write MOSI on trailing edge of previous clock */
93 /* half a clock cycle before leading/rising edge */
97 /* half a clock cycle before trailing/falling edge */
100 /* read MISO on trailing edge */
108 //! Send a command from txbytes.
109 void cccmd(unsigned char len){
113 cctrans8(cmddata[i]);
116 //! Fetch a reply, usually 1 byte.
117 void ccread(unsigned char len){
121 cmddata[i]=cctrans8(0);
124 //! Handles a monitor command.
125 void cchandle(unsigned char app,
128 //Always init. Might help with buggy lines.
133 //CC_PEEK and CC_POKE will come later.
134 case READ: //Write a command and return 1-byte reply.
139 case WRITE: //Write a command with no reply.
143 case START://enter debugger
147 case STOP://exit debugger
148 //Take RST low, then high.
165 cc_wr_config(cmddata[0]);
180 case CC_SET_HW_BRKPNT:
181 cc_set_hw_brkpnt(cmddataword[0]);
200 case CC_STEP_REPLACE:
201 txdata(app,NOK,0);//TODO add me
210 case CC_READ_CODE_MEMORY:
211 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
214 case CC_READ_XDATA_MEMORY:
215 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
218 case CC_WRITE_XDATA_MEMORY:
219 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
223 cc_set_pc(cmddatalong[0]);
226 case CC_WRITE_FLASH_PAGE:
227 cc_write_flash_page(cmddatalong[0]);
230 case CC_MASS_ERASE_FLASH:
232 case CC_PROGRAM_FLASH:
233 debugstr("This Chipcon command is not yet implemented.");
234 txdata(app,NOK,0);//TODO implement me.
239 //! Set the Chipcon's Program Counter
240 void cc_set_pc(u32 adr){
241 cmddata[0]=0x02; //SetPC
242 cmddata[1]=((adr>>8)&0xff); //HIBYTE
243 cmddata[2]=adr&0xff; //LOBYTE
248 //! Erase all of a Chipcon's memory.
249 void cc_chip_erase(){
250 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
254 //! Write the configuration byte.
255 void cc_wr_config(unsigned char config){
256 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
261 //! Read the configuration byte.
262 unsigned char cc_rd_config(){
263 cmddata[0]=CCCMD_RD_CONFIG; //0x24
270 //! Read the status register
271 unsigned char cc_read_status(){
272 cmddata[0]=CCCMD_READ_STATUS; //0x3f
278 //! Read the CHIP ID bytes.
279 unsigned short cc_get_chip_id(){
280 unsigned short toret;
281 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
287 toret=(toret<<8)+cmddata[1];
291 //! Populates flash buffer in xdata.
292 void cc_write_flash_buffer(u8 *data, u16 len){
293 cc_write_xdata(0xf000, data, len);
295 //! Populates flash buffer in xdata.
296 void cc_write_xdata(u16 adr, u8 *data, u16 len){
298 for(i=0; i<len; i++){
299 cc_pokedatabyte(adr+i,
305 //32-bit words, 2KB pages
306 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
307 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
308 #define FLASHPAGE_SIZE 0x800
311 #define FLASH_WORD_SIZE 0x4
313 const u8 flash_routine[] = {
316 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
318 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
320 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
321 // ; Wait for flash erase to complete
322 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
323 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
325 // ; Initialize the data pointer
326 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
328 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
329 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
330 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
332 0x7D, FLASH_WORD_SIZE, // writeLoop: MOV R5, #imm;
333 0xE0, // writeWordLoop: MOVX A, @DPTR;
335 0xF5, 0xAF, // MOV FWDATA, A;
336 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
337 // ; Wait for completion
338 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
339 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
340 0xDE, 0xF1, // DJNZ R6, writeLoop;
341 0xDF, 0xEF, // DJNZ R7, writeLoop;
342 // ; Done, fake a breakpoint
346 //! Copies flash buffer to flash.
347 void cc_write_flash_page(u32 adr){
348 //Assumes that page has already been written to XDATA 0xF000
349 debugstr("Flashing 2kb at 0xF000 to given adr.");
352 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
353 cc_write_xdata(0xF000+FLASHPAGE_SIZE,
354 (u8*) flash_routine, sizeof(flash_routine));
355 //Patch routine's third byte with
356 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
357 cc_pokedatabyte(0xF000+FLASHPAGE_SIZE+2,
358 ((adr>>8)/FLASH_WORD_SIZE)&0x7E);
359 debugstr("Wrote flash routine.");
362 //MOV MEMCTR, (bank * 16) + 1;
367 debugstr("Loaded bank info.");
369 cc_set_pc(0xf000+FLASHPAGE_SIZE);//execute code fragment
371 debugstr("Executing.");
374 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
378 debugstr("Done flashing.");
380 P1OUT&=~1;//clear LED
384 unsigned short cc_get_pc(){
385 cmddata[0]=CCCMD_GET_PC; //0x28
390 return cmddataword[0];
393 //! Set a hardware breakpoint.
394 void cc_set_hw_brkpnt(unsigned short adr){
395 debugstr("FIXME: This certainly won't work.");
405 cmddata[0]=CCCMD_HALT; //0x44
412 cmddata[0]=CCCMD_RESUME; //0x4C
419 //! Step an instruction
420 void cc_step_instr(){
421 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
427 //! Debug an instruction.
428 void cc_debug_instr(unsigned char len){
429 //Bottom two bits of command indicate length.
430 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
432 cctrans8(cmd); //Second command code
433 cccmd(len&0x3); //Command itself.
438 //! Debug an instruction, for local use.
439 unsigned char cc_debug(unsigned char len,
443 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
453 return cctrans8(0x00);
456 //! Fetch a byte of code memory.
457 unsigned char cc_peekcodebyte(unsigned long adr){
458 /** See page 9 of SWRA124 */
459 unsigned char bank=adr>>15,
465 //MOV MEMCTR, (bank*16)+1
466 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
468 cc_debug(3, 0x90, hb, lb);
472 cc_debug(2, 0xE4, 0, 0);
474 toret=cc_debug(3, 0x93, 0, 0);
476 //cc_debug(1, 0xA3, 0, 0);
482 //! Set a byte of data memory.
483 unsigned char cc_pokedatabyte(unsigned int adr,
490 cc_debug(3, 0x90, hb, lb);
492 cc_debug(2, 0x74, val, 0);
494 cc_debug(1, 0xF0, 0, 0);
498 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
499 for (n = 0; n < count; n++) {
500 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
501 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
502 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
507 //! Fetch a byte of data memory.
508 unsigned char cc_peekdatabyte(unsigned int adr){
515 cc_debug(3, 0x90, hb, lb);
517 //Must be 2, perhaps for clocking?
518 toret=cc_debug(3, 0xE0, 0, 0);
522 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
523 for (n = 0; n < count; n++) {
524 DEBUG_INSTR(IN: 0xE0, OUT: outputArray[n]);
525 DEBUG_INSTR(IN: 0xA3, OUT: Discard);