2 \author Travis Goodspeed
3 \brief Chipcon 8051 debugging.
7 //This is like SPI, except that you read or write, not both.
9 /* N.B. The READ verb performs a write of all (any) supplied data,
10 then reads a single byte reply from the target. The WRITE verb
23 /* Concerning clock rates, the maximimum clock rates are defined on
24 page 4 of the spec. They vary, but are roughly 30MHz. Raising
25 this clock rate might allow for clock glitching, but the GoodFET
26 isn't sufficient fast for that. Perhaps a 200MHz ARM or an FPGA in
31 //MISO and MOSI are the same pin, direction changes.
37 //This could be more accurate.
38 //Does it ever need to be?
40 #define CCDELAY(x) delay(x)
42 #define SETMOSI P5OUT|=MOSI
43 #define CLRMOSI P5OUT&=~MOSI
44 #define SETCLK P5OUT|=SCK
45 #define CLRCLK P5OUT&=~SCK
46 #define READMISO (P5IN&MISO?1:0)
48 #define CCWRITE P5DIR|=MOSI
49 #define CCREAD P5DIR&=~MISO
51 //! Set up the pins for CC mode. Does not init debugger.
55 //P5DIR&=~MISO; //MOSI is MISO
58 //! Initialize the debugger
60 //Two positive debug clock pulses while !RST is low.
61 //Take RST low, pulse twice, then high.
79 //! Read and write a CC bit.
80 unsigned char cctrans8(unsigned char byte){
82 //This function came from the SPI Wikipedia article.
85 for (bit = 0; bit < 8; bit++) {
86 /* write MOSI on trailing edge of previous clock */
93 /* half a clock cycle before leading/rising edge */
97 /* half a clock cycle before trailing/falling edge */
100 /* read MISO on trailing edge */
108 //! Send a command from txbytes.
109 void cccmd(unsigned char len){
113 cctrans8(cmddata[i]);
116 //! Fetch a reply, usually 1 byte.
117 void ccread(unsigned char len){
121 cmddata[i]=cctrans8(0);
124 //! Handles a monitor command.
125 void cchandle(unsigned char app,
128 //Always init. Might help with buggy lines.
134 //CC_PEEK and CC_POKE will come later.
135 case READ: //Write a command and return 1-byte reply.
140 case WRITE: //Write a command with no reply.
144 case START://enter debugger
148 case STOP://exit debugger
149 //Take RST low, then high.
166 cc_wr_config(cmddata[0]);
181 case CC_SET_HW_BRKPNT:
182 cc_set_hw_brkpnt(cmddataword[0]);
201 case CC_STEP_REPLACE:
202 txdata(app,NOK,0);//TODO add me
211 case CC_READ_CODE_MEMORY:
212 cmddata[0]=cc_peekcodebyte(cmddataword[0]);
215 case CC_READ_XDATA_MEMORY:
216 cmddata[0]=cc_peekdatabyte(cmddataword[0]);
219 case CC_WRITE_XDATA_MEMORY:
220 cmddata[0]=cc_pokedatabyte(cmddataword[0], cmddata[2]);
224 cc_set_pc(cmddatalong[0]);
227 case CC_WRITE_FLASH_PAGE:
228 cc_write_flash_page(cmddatalong[0]);
231 case CC_WIPEFLASHBUFFER:
232 for(i=0xf000;i<0xf800;i++)
233 cc_pokedatabyte(i,0xFF);
236 case CC_MASS_ERASE_FLASH:
238 case CC_PROGRAM_FLASH:
239 debugstr("This Chipcon command is not yet implemented.");
240 txdata(app,NOK,0);//TODO implement me.
245 //! Set the Chipcon's Program Counter
246 void cc_set_pc(u32 adr){
247 cmddata[0]=0x02; //SetPC
248 cmddata[1]=((adr>>8)&0xff); //HIBYTE
249 cmddata[2]=adr&0xff; //LOBYTE
254 //! Erase all of a Chipcon's memory.
255 void cc_chip_erase(){
256 cmddata[0]=CCCMD_CHIP_ERASE; //0x14
260 //! Write the configuration byte.
261 void cc_wr_config(unsigned char config){
262 cmddata[0]=CCCMD_WR_CONFIG; //0x1D
267 //! Read the configuration byte.
268 unsigned char cc_rd_config(){
269 cmddata[0]=CCCMD_RD_CONFIG; //0x24
276 //! Read the status register
277 unsigned char cc_read_status(){
278 cmddata[0]=CCCMD_READ_STATUS; //0x3f
284 //! Read the CHIP ID bytes.
285 unsigned short cc_get_chip_id(){
286 unsigned short toret;
287 cmddata[0]=CCCMD_GET_CHIP_ID; //0x68
293 toret=(toret<<8)+cmddata[1];
297 //! Populates flash buffer in xdata.
298 void cc_write_flash_buffer(u8 *data, u16 len){
299 cc_write_xdata(0xf000, data, len);
301 //! Populates flash buffer in xdata.
302 void cc_write_xdata(u16 adr, u8 *data, u16 len){
304 for(i=0; i<len; i++){
305 cc_pokedatabyte(adr+i,
311 //32-bit words, 2KB pages
312 #define HIBYTE_WORDS_PER_FLASH_PAGE 0x02
313 #define LOBYTE_WORDS_PER_FLASH_PAGE 0x00
314 #define FLASHPAGE_SIZE 0x800
317 #define FLASH_WORD_SIZE 0x4
319 const u8 flash_routine[] = {
322 0x00,//#imm=((address >> 8) / FLASH_WORD_SIZE) & 0x7E,
324 0x75, 0xAC, 0x00, // MOV FADDRL, #00;
326 0x75, 0xAE, 0x01, // MOV FLC, #01H; // ERASE
327 // ; Wait for flash erase to complete
328 0xE5, 0xAE, // eraseWaitLoop: MOV A, FLC;
329 0x20, 0xE7, 0xFB, // JB ACC_BUSY, eraseWaitLoop;
330 /* End erase page. */
331 // ; Initialize the data pointer
332 0x90, 0xF0, 0x00, // MOV DPTR, #0F000H;
334 0x7F, HIBYTE_WORDS_PER_FLASH_PAGE, // MOV R7, #imm;
335 0x7E, LOBYTE_WORDS_PER_FLASH_PAGE, // MOV R6, #imm;
336 0x75, 0xAE, 0x02, // MOV FLC, #02H; // WRITE
338 0x7D, FLASH_WORD_SIZE, // writeLoop: MOV R5, #imm;
339 0xE0, // writeWordLoop: MOVX A, @DPTR;
341 0xF5, 0xAF, // MOV FWDATA, A;
342 0xDD, 0xFA, // DJNZ R5, writeWordLoop;
343 // ; Wait for completion
344 0xE5, 0xAE, // writeWaitLoop: MOV A, FLC;
345 0x20, 0xE6, 0xFB, // JB ACC_SWBSY, writeWaitLoop;
346 0xDE, 0xF1, // DJNZ R6, writeLoop;
347 0xDF, 0xEF, // DJNZ R7, writeLoop;
348 // ; Done, fake a breakpoint
352 //! Copies flash buffer to flash.
353 void cc_write_flash_page(u32 adr){
354 //Assumes that page has already been written to XDATA 0xF000
355 //debugstr("Flashing 2kb at 0xF000 to given adr.");
357 if(adr&(FLASHPAGE_SIZE-1)){
358 debugstr("Flash page address is not on a multiple of 2kB. Aborting.");
363 //WRITE_XDATA_MEMORY(IN: 0xF000 + FLASH_PAGE_SIZE, sizeof(routine), routine);
364 cc_write_xdata(0xF000+FLASHPAGE_SIZE,
365 (u8*) flash_routine, sizeof(flash_routine));
366 //Patch routine's third byte with
367 //((address >> 8) / FLASH_WORD_SIZE) & 0x7E
368 cc_pokedatabyte(0xF000+FLASHPAGE_SIZE+2,
369 ((adr>>8)/FLASH_WORD_SIZE)&0x7E);
370 //debugstr("Wrote flash routine.");
373 //MOV MEMCTR, (bank * 16) + 1;
378 //debugstr("Loaded bank info.");
380 cc_set_pc(0xf000+FLASHPAGE_SIZE);//execute code fragment
382 //debugstr("Executing.");
385 while(!(cc_read_status()&CC_STATUS_CPUHALTED)){
386 P1OUT^=1;//blink LED while flashing
389 //debugstr("Done flashing.");
391 P1OUT&=~1;//clear LED
395 unsigned short cc_get_pc(){
396 cmddata[0]=CCCMD_GET_PC; //0x28
401 return cmddataword[0];
404 //! Set a hardware breakpoint.
405 void cc_set_hw_brkpnt(unsigned short adr){
406 debugstr("FIXME: This certainly won't work.");
416 cmddata[0]=CCCMD_HALT; //0x44
423 cmddata[0]=CCCMD_RESUME; //0x4C
430 //! Step an instruction
431 void cc_step_instr(){
432 cmddata[0]=CCCMD_STEP_INSTR; //0x5C
438 //! Debug an instruction.
439 void cc_debug_instr(unsigned char len){
440 //Bottom two bits of command indicate length.
441 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3); //0x54+len
443 cctrans8(cmd); //Second command code
444 cccmd(len&0x3); //Command itself.
449 //! Debug an instruction, for local use.
450 unsigned char cc_debug(unsigned char len,
454 unsigned char cmd=CCCMD_DEBUG_INSTR+(len&0x3);//0x54+len
464 return cctrans8(0x00);
467 //! Fetch a byte of code memory.
468 unsigned char cc_peekcodebyte(unsigned long adr){
469 /** See page 9 of SWRA124 */
470 unsigned char bank=adr>>15,
476 //MOV MEMCTR, (bank*16)+1
477 cc_debug(3, 0x75, 0xC7, (bank<<4) + 1);
479 cc_debug(3, 0x90, hb, lb);
483 cc_debug(2, 0xE4, 0, 0);
485 toret=cc_debug(3, 0x93, 0, 0);
487 //cc_debug(1, 0xA3, 0, 0);
493 //! Set a byte of data memory.
494 unsigned char cc_pokedatabyte(unsigned int adr,
501 cc_debug(3, 0x90, hb, lb);
503 cc_debug(2, 0x74, val, 0);
505 cc_debug(1, 0xF0, 0, 0);
509 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
510 for (n = 0; n < count; n++) {
511 DEBUG_INSTR(IN: 0x74, inputArray[n], OUT: Discard);
512 DEBUG_INSTR(IN: 0xF0, OUT: Discard);
513 DEBUG_INSTR(IN: 0xA3, OUT: Discard);
518 //! Fetch a byte of data memory.
519 unsigned char cc_peekdatabyte(unsigned int adr){
526 cc_debug(3, 0x90, hb, lb);
528 //Must be 2, perhaps for clocking?
529 toret=cc_debug(3, 0xE0, 0, 0);
533 DEBUG_INSTR(IN: 0x90, HIBYTE(address), LOBYTE(address), OUT: Discard);
534 for (n = 0; n < count; n++) {
535 DEBUG_INSTR(IN: 0xE0, OUT: outputArray[n]);
536 DEBUG_INSTR(IN: 0xA3, OUT: Discard);