7 unsigned int jtag430mode=MSP430X2MODE;
9 //! Set the program counter.
10 void jtag430_setpc(unsigned int adr){
11 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
12 jtag_dr_shift16(0x3401);// release low byte
13 jtag_ir_shift8(IR_DATA_16BIT);
14 jtag_dr_shift16(0x4030);//Instruction to load PC
17 jtag_dr_shift16(adr);// Value for PC
19 jtag_ir_shift8(IR_ADDR_CAPTURE);
21 CLRTCLK ;// Now PC is set to "PC_Value"
22 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
23 jtag_dr_shift16(0x2401);// low byte controlled by JTAG
27 void jtag430_haltcpu(){
28 //jtag430_setinstrfetch();
30 jtag_ir_shift8(IR_DATA_16BIT);
31 jtag_dr_shift16(0x3FFF);//JMP $+0
34 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
35 jtag_dr_shift16(0x2409);//set JTAG_HALT bit
40 void jtag430_releasecpu(){
42 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
43 jtag_dr_shift16(0x2401);
44 jtag_ir_shift8(IR_ADDR_CAPTURE);
48 //! Read data from address
49 unsigned int jtag430_readmem(unsigned int adr){
53 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
55 jtag_dr_shift16(0x2409);//word read
57 jtag_dr_shift16(0x2419);//byte read
58 jtag_ir_shift8(IR_ADDR_16BIT);
59 jtag_dr_shift16(adr);//address
60 jtag_ir_shift8(IR_DATA_TO_ADDR);
64 toret=jtag_dr_shift16(0x0000);//16 bit return
69 //! Write data to address.
70 void jtag430_writemem(unsigned int adr, unsigned int data){
72 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
74 jtag_dr_shift16(0x2408);//word write
76 jtag_dr_shift16(0x2418);//byte write
77 jtag_ir_shift8(IR_ADDR_16BIT);
79 jtag_ir_shift8(IR_DATA_TO_ADDR);
80 jtag_dr_shift16(data);
85 //! Write data to flash memory. Must be preconfigured.
86 void jtag430_writeflashword(unsigned int adr, unsigned int data){
89 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
90 jtag_dr_shift16(0x2408);//word write
91 jtag_ir_shift8(IR_ADDR_16BIT);
93 jtag_ir_shift8(IR_DATA_TO_ADDR);
94 jtag_dr_shift16(data);
97 //Return to read mode.
99 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
100 jtag_dr_shift16(0x2409);
103 jtag430_writemem(adr,data);
105 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
106 jtag_dr_shift16(0x2409);
109 jtag430_tclk_flashpulses(35); //35 standard
113 //! Configure flash, then write a word.
114 void jtag430_writeflash(unsigned int adr, unsigned int data){
117 //FCTL1=0xA540, enabling flash write
118 jtag430_writemem(0x0128, 0xA540);
119 //FCTL2=0xA540, selecting MCLK as source, DIV=1
120 jtag430_writemem(0x012A, 0xA540);
121 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
122 jtag430_writemem(0x012C, 0xA500);
124 //Write the word itself.
125 jtag430_writeflashword(adr,data);
127 //FCTL1=0xA500, disabling flash write
128 jtag430_writemem(0x0128, 0xA500);
130 jtag430_releasecpu();
140 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
141 jtag_dr_shift16(0x2C01); // apply
142 jtag_dr_shift16(0x2401); // remove
148 jtagid = jtag_ir_shift8(IR_ADDR_CAPTURE); // get JTAG identifier
151 jtag430_writemem(0x0120, 0x5A80); // Diabled Watchdog
156 #define ERASE_GLOB 0xA50E
157 #define ERASE_ALLMAIN 0xA50C
158 #define ERASE_MASS 0xA506
159 #define ERASE_MAIN 0xA504
160 #define ERASE_SGMT 0xA502
162 //! Configure flash, then write a word.
163 void jtag430_eraseflash(unsigned int mode, unsigned int adr, unsigned int count){
167 jtag430_writemem(0x0128, mode);
168 //FCTL2=0xA540, selecting MCLK as source, DIV=1
169 jtag430_writemem(0x012A, 0xA540);
170 //FCTL3=0xA500, should be 0xA540 for Info Seg A on 2xx chips.
171 jtag430_writemem(0x012C, 0xA500);
173 //Write the erase word.
174 jtag430_writemem(adr, 0x55AA);
175 //Return to read mode.
177 jtag_ir_shift8(IR_CNTRL_SIG_16BIT);
178 jtag_dr_shift16(0x2409);
181 jtag430_tclk_flashpulses(count);
183 //FCTL1=0xA500, disabling flash write
184 jtag430_writemem(0x0128, 0xA500);
186 jtag430_releasecpu();
190 //! Reset the TAP state machine.
191 void jtag430_resettap(){
198 // Navigate to reset state.
199 // Should be at least six.
214 Sometimes this isn't necessary. */
226 //! Start JTAG, take pins
227 void jtag430_start(){
230 //Known-good starting position.
231 //Might be unnecessary.
236 //Entry sequence from Page 67 of SLAU265A for 4-wire MSP430 JTAG
247 //Perform a reset and disable watchdog.
251 //! Set CPU to Instruction Fetch
252 void jtag430_setinstrfetch(){
253 jtag_ir_shift8(IR_CNTRL_SIG_CAPTURE);
255 // Wait until instruction fetch state.
257 if (jtag_dr_shift16(0x0000) & 0x0080)
265 //! Handles classic MSP430 JTAG commands. Forwards others to JTAG.
266 void oldjtag430handle(unsigned char app,
274 //TAP setup, fuse check
278 case JTAG430_HALTCPU:
282 case JTAG430_RELEASECPU:
283 jtag430_releasecpu();
286 case JTAG430_SETINSTRFETCH:
287 jtag430_setinstrfetch();
292 case JTAG430_READMEM:
294 cmddataword[0]=jtag430_readmem(cmddataword[0]);
297 case JTAG430_WRITEMEM:
299 jtag430_writemem(cmddataword[0],cmddataword[1]);
300 cmddataword[0]=jtag430_readmem(cmddataword[0]);
303 case JTAG430_WRITEFLASH:
304 jtag430_writeflash(cmddataword[0],cmddataword[1]);
305 cmddataword[0]=jtag430_readmem(cmddataword[0]);
308 case JTAG430_ERASEFLASH:
309 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
310 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
311 jtag430_eraseflash(ERASE_MASS,0xFFFE,0xFFFF);
315 jtag430_setpc(cmddataword[0]);
319 jtaghandle(app,verb,len);
324 //! Handles unique MSP430 JTAG commands. Forwards others to JTAG.
325 void jtag430handle(unsigned char app,
330 return oldjtag430handle(app,verb,len);
332 return jtag430x2handle(app,verb,len);