2 \author Travis Goodspeed
3 \brief MSP430-generic functions.
7 //Silently be empty if not an MSP430.
27 //TODO define differently if needed for telos/apimote
41 //LED2 and LED3 are only used by the telosb and apimote for now
45 PLED2OUT &= ~PLED2PIN;
57 PLED3OUT &= ~PLED3PIN;
67 //! Initialize MSP430 registers and all that jazz.
69 WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
75 /* P5.0 out and low; this is chosen for the PIC app (in which P5.0
76 is !MCLR) to ensure that an attached PIC chip, if present, is
77 immediately driven to reset state. A brief explanation of why this
80 At least dsPIC33F and PIC24H --and very likely other 16-bit PIC
81 families-- draw a large amount of current when running, especially
82 when using a fast clock: from 60 mA up to approx. 90 mA. If the
83 PIC target begins to run before the client can request a new ICSP
84 session, which requires much less current (e.g., less than 2 mA),
85 then the MSP430 chip on the GoodFET will fail to start and the FTDI
86 may have trouble communicating with the client. The latter likely
87 relates to the FTDI on-chip 3V3 regulator being specified up to
91 //P5REN &= ~BIT0; //DO NOT UNCOMMENT. Breaks GF1x support.
93 //This will have to be cut soon. Use pulling resistors instead.
99 //Setup clocks, unique to each '430.
103 //DAC should be at full voltage if it exists.
105 //glitchvoltages(0xfff,0xfff);
106 ADC12CTL0 = REF2_5V + REFON; // Internal 2.5V ref on
107 //for(i=0;i!=0xFFFF;i++) asm("nop"); //DO NOT UNCOMMENT, breaks GCC4
108 DAC12_0CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
109 DAC12_0DAT = 0xFFF; //Max voltage 0xfff
110 DAC12_1CTL = DAC12IR + DAC12AMP_5 + DAC12ENC; // Int ref gain 1
111 DAC12_1DAT = 0x000; //Min voltage 0x000
116 This part is really ugly. GSEL (P5.7) must be high to select
117 normal voltage, but a lot of applications light to swing it low
118 to be a nuissance. To get around this, we assume that anyone
119 with a glitching FET will also have a DAC, then we set that DAC
122 At some point, each target must be sanitized to show that it
123 doesn't clear P5OUT or P5DIR.
125 P5DIR|=BIT7; P5OUT=BIT7; //Normal Supply
126 //P5DIR&=~BIT7; //Glitch Supply