md: allow reshape_position for md arrays to be set via sysfs
[powerpc.git] / include / asm-frv / system.h
1 /* system.h: FR-V CPU control definitions
2  *
3  * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
4  * Written by David Howells (dhowells@redhat.com)
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11
12 #ifndef _ASM_SYSTEM_H
13 #define _ASM_SYSTEM_H
14
15 #include <linux/linkage.h>
16
17 struct thread_struct;
18
19 /*
20  * switch_to(prev, next) should switch from task `prev' to `next'
21  * `prev' will never be the same as `next'.
22  * The `mb' is to tell GCC not to cache `current' across this call.
23  */
24 extern asmlinkage
25 struct task_struct *__switch_to(struct thread_struct *prev_thread,
26                                 struct thread_struct *next_thread,
27                                 struct task_struct *prev);
28
29 #define switch_to(prev, next, last)                                     \
30 do {                                                                    \
31         (prev)->thread.sched_lr =                                       \
32                 (unsigned long) __builtin_return_address(0);            \
33         (last) = __switch_to(&(prev)->thread, &(next)->thread, (prev)); \
34         mb();                                                           \
35 } while(0)
36
37 /*
38  * interrupt flag manipulation
39  * - use virtual interrupt management since touching the PSR is slow
40  *   - ICC2.Z: T if interrupts virtually disabled
41  *   - ICC2.C: F if interrupts really disabled
42  * - if Z==1 upon interrupt:
43  *   - C is set to 0
44  *   - interrupts are really disabled
45  *   - entry.S returns immediately
46  * - uses TIHI (TRAP if Z==0 && C==0) #2 to really reenable interrupts
47  *   - if taken, the trap:
48  *     - sets ICC2.C
49  *     - enables interrupts
50  */
51 #define local_irq_disable()                                     \
52 do {                                                            \
53         /* set Z flag, but don't change the C flag */           \
54         asm volatile("  andcc   gr0,gr0,gr0,icc2        \n"     \
55                      :                                          \
56                      :                                          \
57                      : "memory", "icc2"                         \
58                      );                                         \
59 } while(0)
60
61 #define local_irq_enable()                                      \
62 do {                                                            \
63         /* clear Z flag and then test the C flag */             \
64         asm volatile("  oricc   gr0,#1,gr0,icc2         \n"     \
65                      "  tihi    icc2,gr0,#2             \n"     \
66                      :                                          \
67                      :                                          \
68                      : "memory", "icc2"                         \
69                      );                                         \
70 } while(0)
71
72 #define local_save_flags(flags)                                 \
73 do {                                                            \
74         typecheck(unsigned long, flags);                        \
75         asm volatile("movsg ccr,%0"                             \
76                      : "=r"(flags)                              \
77                      :                                          \
78                      : "memory");                               \
79                                                                 \
80         /* shift ICC2.Z to bit 0 */                             \
81         flags >>= 26;                                           \
82                                                                 \
83         /* make flags 1 if interrupts disabled, 0 otherwise */  \
84         flags &= 1UL;                                           \
85 } while(0)
86
87 #define irqs_disabled() \
88         ({unsigned long flags; local_save_flags(flags); flags; })
89
90 #define local_irq_save(flags)                   \
91 do {                                            \
92         typecheck(unsigned long, flags);        \
93         local_save_flags(flags);                \
94         local_irq_disable();                    \
95 } while(0)
96
97 #define local_irq_restore(flags)                                        \
98 do {                                                                    \
99         typecheck(unsigned long, flags);                                \
100                                                                         \
101         /* load the Z flag by turning 1 if disabled into 0 if disabled  \
102          * and thus setting the Z flag but not the C flag */            \
103         asm volatile("  xoricc  %0,#1,gr0,icc2          \n"             \
104                      /* then test Z=0 and C=0 */                        \
105                      "  tihi    icc2,gr0,#2             \n"             \
106                      :                                                  \
107                      : "r"(flags)                                       \
108                      : "memory", "icc2"                                 \
109                      );                                                 \
110                                                                         \
111 } while(0)
112
113 /*
114  * real interrupt flag manipulation
115  */
116 #define __local_irq_disable()                           \
117 do {                                                    \
118         unsigned long psr;                              \
119         asm volatile("  movsg   psr,%0          \n"     \
120                      "  andi    %0,%2,%0        \n"     \
121                      "  ori     %0,%1,%0        \n"     \
122                      "  movgs   %0,psr          \n"     \
123                      : "=r"(psr)                        \
124                      : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
125                      : "memory");                       \
126 } while(0)
127
128 #define __local_irq_enable()                            \
129 do {                                                    \
130         unsigned long psr;                              \
131         asm volatile("  movsg   psr,%0          \n"     \
132                      "  andi    %0,%1,%0        \n"     \
133                      "  movgs   %0,psr          \n"     \
134                      : "=r"(psr)                        \
135                      : "i" (~PSR_PIL)                   \
136                      : "memory");                       \
137 } while(0)
138
139 #define __local_save_flags(flags)               \
140 do {                                            \
141         typecheck(unsigned long, flags);        \
142         asm("movsg psr,%0"                      \
143             : "=r"(flags)                       \
144             :                                   \
145             : "memory");                        \
146 } while(0)
147
148 #define __local_irq_save(flags)                         \
149 do {                                                    \
150         unsigned long npsr;                             \
151         typecheck(unsigned long, flags);                \
152         asm volatile("  movsg   psr,%0          \n"     \
153                      "  andi    %0,%3,%1        \n"     \
154                      "  ori     %1,%2,%1        \n"     \
155                      "  movgs   %1,psr          \n"     \
156                      : "=r"(flags), "=r"(npsr)          \
157                      : "i" (PSR_PIL_14), "i" (~PSR_PIL) \
158                      : "memory");                       \
159 } while(0)
160
161 #define __local_irq_restore(flags)                      \
162 do {                                                    \
163         typecheck(unsigned long, flags);                \
164         asm volatile("  movgs   %0,psr          \n"     \
165                      :                                  \
166                      : "r" (flags)                      \
167                      : "memory");                       \
168 } while(0)
169
170 #define __irqs_disabled() \
171         ((__get_PSR() & PSR_PIL) >= PSR_PIL_14)
172
173 /*
174  * Force strict CPU ordering.
175  */
176 #define nop()                   asm volatile ("nop"::)
177 #define mb()                    asm volatile ("membar" : : :"memory")
178 #define rmb()                   asm volatile ("membar" : : :"memory")
179 #define wmb()                   asm volatile ("membar" : : :"memory")
180 #define set_mb(var, value)      do { var = value; mb(); } while (0)
181
182 #define smp_mb()                mb()
183 #define smp_rmb()               rmb()
184 #define smp_wmb()               wmb()
185
186 #define read_barrier_depends()          do {} while(0)
187 #define smp_read_barrier_depends()      read_barrier_depends()
188
189 #define HARD_RESET_NOW()                        \
190 do {                                            \
191         cli();                                  \
192 } while(1)
193
194 extern void die_if_kernel(const char *, ...) __attribute__((format(printf, 1, 2)));
195 extern void free_initmem(void);
196
197 #define arch_align_stack(x) (x)
198
199 /*****************************************************************************/
200 /*
201  * compare and conditionally exchange value with memory
202  * - if (*ptr == test) then orig = *ptr; *ptr = test;
203  * - if (*ptr != test) then orig = *ptr;
204  */
205 #ifndef CONFIG_FRV_OUTOFLINE_ATOMIC_OPS
206
207 #define cmpxchg(ptr, test, new)                                                 \
208 ({                                                                              \
209         __typeof__(ptr) __xg_ptr = (ptr);                                       \
210         __typeof__(*(ptr)) __xg_orig, __xg_tmp;                                 \
211         __typeof__(*(ptr)) __xg_test = (test);                                  \
212         __typeof__(*(ptr)) __xg_new = (new);                                    \
213                                                                                 \
214         switch (sizeof(__xg_orig)) {                                            \
215         case 4:                                                                 \
216                 asm volatile(                                                   \
217                         "0:                                             \n"     \
218                         "       orcc            gr0,gr0,gr0,icc3        \n"     \
219                         "       ckeq            icc3,cc7                \n"     \
220                         "       ld.p            %M0,%1                  \n"     \
221                         "       orcr            cc7,cc7,cc3             \n"     \
222                         "       sub%I4cc        %1,%4,%2,icc0           \n"     \
223                         "       bne             icc0,#0,1f              \n"     \
224                         "       cst.p           %3,%M0          ,cc3,#1 \n"     \
225                         "       corcc           gr29,gr29,gr0   ,cc3,#1 \n"     \
226                         "       beq             icc3,#0,0b              \n"     \
227                         "1:                                             \n"     \
228                         : "+U"(*__xg_ptr), "=&r"(__xg_orig), "=&r"(__xg_tmp)    \
229                         : "r"(__xg_new), "NPr"(__xg_test)                       \
230                         : "memory", "cc7", "cc3", "icc3", "icc0"                \
231                         );                                                      \
232                 break;                                                          \
233                                                                                 \
234         default:                                                                \
235                 __xg_orig = 0;                                                  \
236                 asm volatile("break");                                          \
237                 break;                                                          \
238         }                                                                       \
239                                                                                 \
240         __xg_orig;                                                              \
241 })
242
243 #else
244
245 extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
246
247 #define cmpxchg(ptr, test, new)                                                 \
248 ({                                                                              \
249         __typeof__(ptr) __xg_ptr = (ptr);                                       \
250         __typeof__(*(ptr)) __xg_orig;                                           \
251         __typeof__(*(ptr)) __xg_test = (test);                                  \
252         __typeof__(*(ptr)) __xg_new = (new);                                    \
253                                                                                 \
254         switch (sizeof(__xg_orig)) {                                            \
255         case 4: __xg_orig = __cmpxchg_32(__xg_ptr, __xg_test, __xg_new); break; \
256         default:                                                                \
257                 __xg_orig = 0;                                                  \
258                 asm volatile("break");                                          \
259                 break;                                                          \
260         }                                                                       \
261                                                                                 \
262         __xg_orig;                                                              \
263 })
264
265 #endif
266
267
268 #endif /* _ASM_SYSTEM_H */