1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <rfid/rfid.h>
29 #include <rfid/rfid_asic.h>
30 #include <rfid/rfid_asic_rc632.h>
31 #include <rfid/rfid_reader_cm5121.h>
32 #include <rfid/rfid_layer2_iso14443a.h>
33 #include <rfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
101 rc632_clear_bits(struct rfid_asic_handle *handle,
108 ret = rc632_reg_read(handle, reg, &tmp);
110 DEBUGP("error during reg_read(%p, %d):%d\n",
114 /* if bits are already cleared, no need to clear them again */
115 if ((tmp & val) == 0)
118 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
124 rc632_turn_on_rf(struct rfid_asic_handle *handle)
127 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
131 rc632_turn_off_rf(struct rfid_asic_handle *handle)
134 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
138 rc632_power_up(struct rfid_asic_handle *handle)
141 return rc632_clear_bits(handle, RC632_REG_CONTROL,
142 RC632_CONTROL_POWERDOWN);
146 rc632_power_down(struct rfid_asic_handle *handle)
148 return rc632_set_bits(handle, RC632_REG_CONTROL,
149 RC632_CONTROL_POWERDOWN);
152 /* Stupid RC623 implementations don't evaluate interrupts but poll the
153 * command register for "status idle" */
155 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
161 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
166 /* FIXME: read second time ?? */
172 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
174 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
179 /* Fixme: Abort after some timeout */
186 rc632_transmit(struct rfid_asic_handle *handle,
193 ret = rc632_fifo_write(handle, len, buf, 0x03);
197 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSMIT);
201 return rc632_wait_idle(handle, timeout);
205 tcl_toggle_pcb(struct rfid_asic_handle *handle)
207 // FIXME: toggle something between 0x0a and 0x0b
212 rc632_transcieve(struct rfid_asic_handle *handle,
213 const u_int8_t *tx_buf,
222 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
226 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSCIEVE);
231 tcl_toggle_pcb(handle);
233 ret = rc632_wait_idle(handle, timer);
237 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
244 DEBUGP("rx_len == 0\n");
246 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
247 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
252 return rc632_fifo_read(handle, *rx_len, rx_buf);
256 rc632_read_eeprom(struct rfid_asic_handle *handle)
258 u_int8_t recvbuf[60];
266 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
270 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
276 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
280 // FIXME: do something with eeprom contents
285 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
287 u_int8_t sndbuf[2] = { 0x01, 0x02 };
288 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
291 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
295 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
299 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
303 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
307 usleep(10000); // FIXME: no checking for cmd completion?
309 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
313 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
317 // FIXME: what to do with crc result?
323 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
328 for (i = 0; i <= 0x3f; i++) {
329 ret = rc632_reg_read(handle, i, &buf[i]);
330 // do we want error checks?
337 /* generic FIFO access functions (if no more efficient ones provided by
338 * transport driver) */
343 // FIXME: implementation (not needed for CM 5121)
350 // FIXME: implementation (not neded for CM 5121)
355 rc632_init(struct rfid_asic_handle *ah)
359 /* switch off rf (make sure PICCs are reset at init time) */
360 ret = rc632_power_down(ah);
367 ret = rc632_power_up(ah);
371 /* disable register paging */
372 ret = rc632_reg_write(ah, 0x00, 0x00);
376 /* set some sane default values */
377 ret = rc632_reg_write(ah, 0x11, 0x5b);
382 ret = rc632_turn_on_rf(ah);
390 rc632_fini(struct rfid_asic_handle *ah)
395 ret = rc632_turn_off_rf(ah);
399 ret = rc632_power_down(ah);
406 struct rfid_asic_handle *
407 rc632_open(struct rfid_asic_transport_handle *th)
409 struct rfid_asic_handle *h;
411 h = malloc(sizeof(*h));
414 memset(h, 0, sizeof(*h));
419 h->mtu = h->mru = 40; /* FIXME */
421 if (rc632_init(h) < 0) {
430 rc632_close(struct rfid_asic_handle *h)
438 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
440 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
445 rc632_iso14443a_init(struct rfid_asic_handle *handle)
449 // FIXME: some fifo work (drain fifo?)
451 /* flush fifo (our way) */
452 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
454 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
455 (RC632_TXCTRL_TX1_RF_EN |
456 RC632_TXCTRL_TX2_RF_EN |
457 RC632_TXCTRL_TX2_INV |
458 RC632_TXCTRL_FORCE_100_ASK |
459 RC632_TXCTRL_MOD_SRC_INT));
463 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
464 CM5121_CW_CONDUCTANCE);
468 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
469 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
470 CM5121_MOD_CONDUCTANCE);
474 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
475 (RC632_CDRCTRL_TXCD_14443A |
476 RC632_CDRCTRL_RATE_106K));
480 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
484 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
488 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
492 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
493 (RC632_RXCTRL1_GAIN_35DB |
494 RC632_RXCTRL1_ISO14443 |
495 RC632_RXCTRL1_SUBCP_8));
499 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
500 (RC632_DECCTRL_MANCHESTER |
501 RC632_DECCTRL_RXFR_14443A));
505 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
506 CM5121_14443A_BITPHASE);
510 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
511 CM5121_14443A_THRESHOLD);
515 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
519 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
520 (RC632_RXCTRL2_DECSRC_INT |
521 RC632_RXCTRL2_CLK_Q));
525 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
526 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
530 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
531 (RC632_CR_PARITY_ENABLE |
532 RC632_CR_PARITY_ODD));
536 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
540 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
548 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
552 ret = rc632_turn_off_rf(handle);
562 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
564 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
566 struct iso14443a_atqa *atqa)
572 memset(atqa, 0, sizeof(atqa));
576 /* transfer only 7 bits of last byte in frame */
577 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
582 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
583 RC632_CONTROL_CRYPTO1_ON);
588 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
589 (RC632_CR_PARITY_ENABLE |
590 RC632_CR_PARITY_ODD));
592 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
593 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
599 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
600 (u_int8_t *)atqa, &rx_len, 0x32, 0);
602 DEBUGP("error during rc632_transcieve()\n");
606 /* switch back to normal 8bit last byte */
607 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
612 DEBUGP("rx_len(%d) != 2\n", rx_len);
619 /* transcieve regular frame */
621 rc632_iso14443a_transcieve(struct rfid_asic_handle *handle,
622 const u_int8_t *tx_buf, unsigned int tx_len,
623 u_int8_t *rx_buf, unsigned int *rx_len,
624 u_int64_t timeout, unsigned int flags)
627 u_int8_t rxl = *rx_len & 0xff;
630 memset(rx_buf, 0, *rx_len);
633 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
634 (RC632_CR_PARITY_ENABLE |
635 RC632_CR_PARITY_ODD |
636 RC632_CR_TX_CRC_ENABLE |
637 RC632_CR_RX_CRC_ENABLE));
639 ret = rc632_set_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
640 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
644 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
653 /* transcieve anti collission bitframe */
655 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
656 struct iso14443a_anticol_cmd *acf,
657 unsigned int *bit_of_col)
661 u_int8_t rx_len = sizeof(rx_buf);
662 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
665 *bit_of_col = ISO14443A_BITOFCOL_NONE;
666 memset(rx_buf, 0, sizeof(rx_buf));
668 /* disable mifare cryto */
669 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
670 RC632_CONTROL_CRYPTO1_ON);
674 /* disable CRC summing */
676 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
677 (RC632_CR_PARITY_ENABLE |
678 RC632_CR_PARITY_ODD));
680 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
681 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
686 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
687 tx_bytes = acf->nvb >> 4;
690 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
693 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
695 /* set RxAlign and TxLastBits*/
696 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
697 (rx_align << 4) | (tx_last_bits));
701 ret = rc632_transcieve(handle, (u_int8_t *)acf, tx_bytes,
702 rx_buf, &rx_len, 0x32, 0);
706 /* bitwise-OR the two halves of the split byte */
707 acf->uid_bits[tx_bytes-2] = (
708 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
711 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
713 /* determine whether there was a collission */
714 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
718 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
719 /* retrieve bit of collission */
720 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
724 /* bit of collission relative to start of part 1 of
725 * anticollision frame (!) */
726 *bit_of_col = 2*8 + boc;
732 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
736 // FIXME: some FIFO work
738 /* flush fifo (our way) */
739 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
743 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
744 (RC632_TXCTRL_TX1_RF_EN |
745 RC632_TXCTRL_TX2_RF_EN |
746 RC632_TXCTRL_TX2_INV |
747 RC632_TXCTRL_MOD_SRC_INT));
751 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
755 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
759 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
760 (RC632_CDRCTRL_TXCD_NRZ |
761 RC632_CDRCTRL_RATE_14443B));
765 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
769 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
773 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
774 (RC632_TBFRAMING_SOF_11L_3H |
775 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
776 RC632_TBFRAMING_EOF_11));
780 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
781 (RC632_RXCTRL1_GAIN_35DB |
782 RC632_RXCTRL1_ISO14443 |
783 RC632_RXCTRL1_SUBCP_8));
787 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
788 (RC632_DECCTRL_BPSK |
789 RC632_DECCTRL_RXFR_14443B));
793 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
794 CM5121_14443B_BITPHASE);
798 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
799 CM5121_14443B_THRESHOLD);
803 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
804 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
805 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
806 RC632_BPSKD_FILTER_AMP_DETECT |
807 RC632_BPSKD_NO_RX_EOF |
808 RC632_BPSKD_NO_RX_EGT));
812 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
813 (RC632_RXCTRL2_AUTO_PD |
814 RC632_RXCTRL2_DECSRC_INT));
818 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
822 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
823 (RC632_CR_TX_CRC_ENABLE |
824 RC632_CR_RX_CRC_ENABLE |
829 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
833 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
841 rc632_iso15693_init(struct rfid_asic_handle *h)
845 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
846 (RC632_TXCTRL_MOD_SRC_INT |
847 RC632_TXCTRL_TX2_INV |
848 RC632_TXCTRL_TX2_RF_EN |
849 RC632_TXCTRL_TX1_RF_EN));
853 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
857 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
861 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
862 (RC632_CDRCTRL_RATE_15693 |
867 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
871 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
875 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
879 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
880 (RC632_RXCTRL1_SUBCP_16 |
881 RC632_RXCTRL1_ISO15693 |
882 RC632_RXCTRL1_GAIN_35DB));
886 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
887 (RC632_DECCTRL_RXFR_15693 |
888 RC632_DECCTRL_RX_INVERT));
892 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
896 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
900 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
904 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
905 (RC632_RXCTRL2_AUTO_PD |
906 RC632_RXCTRL2_DECSRC_INT));
910 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
912 RC632_CR_RX_CRC_ENABLE |
913 RC632_CR_TX_CRC_ENABLE));
917 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
921 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
929 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
933 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
934 (RC632_TXCTRL_MOD_SRC_INT |
935 RC632_TXCTRL_TX2_INV |
936 RC632_TXCTRL_TX2_RF_EN |
937 RC632_TXCTRL_TX1_RF_EN));
941 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
945 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
949 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
953 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
957 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
961 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
965 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
969 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
973 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
977 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
981 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
985 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
989 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
990 RC632_RXCTRL2_DECSRC_INT);
994 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
995 (RC632_CR_RX_CRC_ENABLE |
996 RC632_CR_TX_CRC_ENABLE));
997 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1001 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1009 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1015 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1016 (RC632_TXCTRL_MOD_SRC_INT |
1017 RC632_TXCTRL_TX2_INV |
1018 RC632_TXCTRL_TX2_RF_EN |
1019 RC632_TXCTRL_TX1_RF_EN));
1023 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1027 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1031 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1032 (RC632_CDRCTRL_RATE_15693 |
1033 RC632_CDRCTRL_TXCD_ICODE_STD |
1038 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1042 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1045 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1046 (RC632_RXCTRL1_SUBCP_16|
1047 RC632_RXCTRL1_ISO15693|
1048 RC632_RXCTRL1_GAIN_35DB));
1051 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1052 (RC632_DECCTRL_RX_INVERT|
1053 RC632_DECCTRL_RXFR_15693));
1057 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1061 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1065 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1069 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1070 RC632_RXCTRL2_DECSRC_INT);
1074 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1078 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1082 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1089 struct mifare_authcmd {
1091 u_int8_t block_address;
1092 u_int32_t serno; /* lsb 1 2 msb */
1093 } __attribute__ ((packed));
1096 #define RFID_MIFARE_KEY_LEN 6
1097 #define RFID_MIFARE_KEY_CODED_LEN 12
1099 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1101 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1107 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1108 ln = key6[i] & 0x0f;
1110 key12[i * 2 + 1] = (~ln << 4) | ln;
1111 key12[i * 2] = (~hn << 4) | hn;
1117 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1119 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1122 ret = rc632_mifare_transform_key(key, coded_key);
1126 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1130 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1134 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1142 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1146 struct mifare_authcmd acmd;
1149 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1152 /* Initialize acmd */
1153 acmd.block_address = block & 0xff;
1154 acmd.auth_cmd = cmd;
1157 /* Send Authent1 Command */
1158 ret = rc632_fifo_write(h, sizeof(acmd), &acmd, 0x03);
1162 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1166 /* Wait until transmitter is idle */
1167 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1171 /* Clear Rx/Tx CRC */
1172 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1173 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1177 /* Send Authent2 Command */
1178 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1182 /* Wait until transmitter is idle */
1183 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1187 /* Check whether authentication was successful */
1188 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1192 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1199 struct rfid_asic rc632 = {
1200 .name = "Philips CL RC632",
1201 .fc = ISO14443_FREQ_CARRIER,
1203 .fn.power_up = &rc632_power_up,
1204 .fn.power_down = &rc632_power_down,
1205 .fn.turn_on_rf = &rc632_turn_on_rf,
1206 .fn.turn_off_rf = &rc632_turn_off_rf,
1207 .fn.transcieve = &rc632_iso14443a_transcieve,
1209 .init = &rc632_iso14443a_init,
1210 .transcieve_sf = &rc632_iso14443a_transcieve_sf,
1211 .transcieve_acf = &rc632_iso14443a_transcieve_acf,
1214 .init = &rc632_iso14443b_init,
1217 .init = &rc632_iso15693_init,
1219 .fn.mifare_classic = {
1220 .setkey = &rc632_mifare_set_key,
1221 .auth = &rc632_mifare_auth,