1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <rfid/rfid.h>
29 #include <rfid/rfid_asic.h>
30 #include <rfid/rfid_asic_rc632.h>
31 #include <rfid/rfid_reader_cm5121.h>
32 #include <rfid/rfid_layer2_iso14443a.h>
33 #include <rfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
101 rc632_clear_bits(struct rfid_asic_handle *handle,
108 ret = rc632_reg_read(handle, reg, &tmp);
110 DEBUGP("error during reg_read(%p, %d):%d\n",
114 /* if bits are already cleared, no need to clear them again */
115 if ((tmp & val) == 0)
118 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
122 rc632_turn_on_rf(struct rfid_asic_handle *handle)
125 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
129 rc632_turn_off_rf(struct rfid_asic_handle *handle)
132 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
136 rc632_power_up(struct rfid_asic_handle *handle)
139 return rc632_clear_bits(handle, RC632_REG_CONTROL,
140 RC632_CONTROL_POWERDOWN);
144 rc632_power_down(struct rfid_asic_handle *handle)
146 return rc632_set_bits(handle, RC632_REG_CONTROL,
147 RC632_CONTROL_POWERDOWN);
150 /* Stupid RC623 implementations don't evaluate interrupts but poll the
151 * command register for "status idle" */
153 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
159 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
164 /* FIXME: read second time ?? */
170 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
172 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
177 /* Fixme: Abort after some timeout */
184 rc632_transmit(struct rfid_asic_handle *handle,
191 ret = rc632_fifo_write(handle, len, buf, 0x03);
195 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSMIT);
199 return rc632_wait_idle(handle, timeout);
203 tcl_toggle_pcb(struct rfid_asic_handle *handle)
205 // FIXME: toggle something between 0x0a and 0x0b
210 rc632_transcieve(struct rfid_asic_handle *handle,
211 const u_int8_t *tx_buf,
220 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
224 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSCIEVE);
229 tcl_toggle_pcb(handle);
231 ret = rc632_wait_idle(handle, timer);
235 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
242 DEBUGP("rx_len == 0\n");
244 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
245 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
250 return rc632_fifo_read(handle, *rx_len, rx_buf);
254 rc632_read_eeprom(struct rfid_asic_handle *handle)
256 u_int8_t recvbuf[60];
264 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
268 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
274 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
278 // FIXME: do something with eeprom contents
283 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
285 u_int8_t sndbuf[2] = { 0x01, 0x02 };
286 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
289 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
293 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
297 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
301 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
305 usleep(10000); // FIXME: no checking for cmd completion?
307 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
311 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
315 // FIXME: what to do with crc result?
321 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
326 for (i = 0; i <= 0x3f; i++) {
327 ret = rc632_reg_read(handle, i, &buf[i]);
328 // do we want error checks?
335 /* generic FIFO access functions (if no more efficient ones provided by
336 * transport driver) */
341 // FIXME: implementation (not needed for CM 5121)
348 // FIXME: implementation (not neded for CM 5121)
353 rc632_init(struct rfid_asic_handle *ah)
357 /* switch off rf (make sure PICCs are reset at init time) */
358 ret = rc632_power_down(ah);
365 ret = rc632_power_up(ah);
369 /* disable register paging */
370 ret = rc632_reg_write(ah, 0x00, 0x00);
374 /* set some sane default values */
375 ret = rc632_reg_write(ah, 0x11, 0x5b);
380 ret = rc632_turn_on_rf(ah);
388 rc632_fini(struct rfid_asic_handle *ah)
393 ret = rc632_turn_off_rf(ah);
397 ret = rc632_power_down(ah);
404 struct rfid_asic_handle *
405 rc632_open(struct rfid_asic_transport_handle *th)
407 struct rfid_asic_handle *h;
409 h = malloc(sizeof(*h));
412 memset(h, 0, sizeof(*h));
417 h->mtu = h->mru = 40; /* FIXME */
419 if (rc632_init(h) < 0) {
428 rc632_close(struct rfid_asic_handle *h)
436 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
438 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
443 rc632_iso14443a_init(struct rfid_asic_handle *handle)
447 // FIXME: some fifo work (drain fifo?)
449 /* flush fifo (our way) */
450 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
452 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
453 (RC632_TXCTRL_TX1_RF_EN |
454 RC632_TXCTRL_TX2_RF_EN |
455 RC632_TXCTRL_TX2_INV |
456 RC632_TXCTRL_FORCE_100_ASK |
457 RC632_TXCTRL_MOD_SRC_INT));
461 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
462 CM5121_CW_CONDUCTANCE);
466 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
467 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
468 CM5121_MOD_CONDUCTANCE);
472 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
473 (RC632_CDRCTRL_TXCD_14443A |
474 RC632_CDRCTRL_RATE_106K));
478 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
482 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
486 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
490 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
491 (RC632_RXCTRL1_GAIN_35DB |
492 RC632_RXCTRL1_ISO14443 |
493 RC632_RXCTRL1_SUBCP_8));
497 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
498 (RC632_DECCTRL_MANCHESTER |
499 RC632_DECCTRL_RXFR_14443A));
503 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
504 CM5121_14443A_BITPHASE);
508 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
509 CM5121_14443A_THRESHOLD);
513 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
517 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
518 (RC632_RXCTRL2_DECSRC_INT |
519 RC632_RXCTRL2_CLK_Q));
523 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
524 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
528 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
529 (RC632_CR_PARITY_ENABLE |
530 RC632_CR_PARITY_ODD));
534 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
538 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
546 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
550 ret = rc632_turn_off_rf(handle);
560 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
562 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
564 struct iso14443a_atqa *atqa)
570 memset(atqa, 0, sizeof(atqa));
574 /* transfer only 7 bits of last byte in frame */
575 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
579 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
580 RC632_CONTROL_CRYPTO1_ON);
585 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
586 (RC632_CR_PARITY_ENABLE |
587 RC632_CR_PARITY_ODD));
589 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
590 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
596 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
597 (u_int8_t *)atqa, &rx_len, 0x32, 0);
599 DEBUGP("error during rc632_transcieve()\n");
603 /* switch back to normal 8bit last byte */
604 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
609 DEBUGP("rx_len(%d) != 2\n", rx_len);
616 /* transcieve regular frame */
618 rc632_iso14443ab_transcieve(struct rfid_asic_handle *handle,
619 unsigned int frametype,
620 const u_int8_t *tx_buf, unsigned int tx_len,
621 u_int8_t *rx_buf, unsigned int *rx_len,
622 u_int64_t timeout, unsigned int flags)
625 u_int8_t rxl = *rx_len & 0xff;
626 u_int8_t channel_red;
628 memset(rx_buf, 0, *rx_len);
631 case RFID_14443A_FRAME_REGULAR:
632 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
633 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
635 case RFID_14443B_FRAME_REGULAR:
636 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
639 case RFID_MIFARE_FRAME:
640 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
644 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
645 (RC632_CR_PARITY_ENABLE |
646 RC632_CR_PARITY_ODD |
647 RC632_CR_TX_CRC_ENABLE |
648 RC632_CR_RX_CRC_ENABLE));
650 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
655 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
664 /* transcieve anti collission bitframe */
666 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
667 struct iso14443a_anticol_cmd *acf,
668 unsigned int *bit_of_col)
672 u_int8_t rx_len = sizeof(rx_buf);
673 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
676 *bit_of_col = ISO14443A_BITOFCOL_NONE;
677 memset(rx_buf, 0, sizeof(rx_buf));
679 /* disable mifare cryto */
680 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
681 RC632_CONTROL_CRYPTO1_ON);
685 /* disable CRC summing */
687 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
688 (RC632_CR_PARITY_ENABLE |
689 RC632_CR_PARITY_ODD));
691 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
692 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
697 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
698 tx_bytes = acf->nvb >> 4;
701 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
704 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
706 /* set RxAlign and TxLastBits*/
707 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
708 (rx_align << 4) | (tx_last_bits));
712 ret = rc632_transcieve(handle, (u_int8_t *)acf, tx_bytes,
713 rx_buf, &rx_len, 0x32, 0);
717 /* bitwise-OR the two halves of the split byte */
718 acf->uid_bits[tx_bytes-2] = (
719 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
722 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
724 /* determine whether there was a collission */
725 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
729 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
730 /* retrieve bit of collission */
731 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
735 /* bit of collission relative to start of part 1 of
736 * anticollision frame (!) */
737 *bit_of_col = 2*8 + boc;
743 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
747 // FIXME: some FIFO work
749 /* flush fifo (our way) */
750 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
754 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
755 (RC632_TXCTRL_TX1_RF_EN |
756 RC632_TXCTRL_TX2_RF_EN |
757 RC632_TXCTRL_TX2_INV |
758 RC632_TXCTRL_MOD_SRC_INT));
762 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
766 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
770 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
771 (RC632_CDRCTRL_TXCD_NRZ |
772 RC632_CDRCTRL_RATE_14443B));
776 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
780 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
784 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
785 (RC632_TBFRAMING_SOF_11L_3H |
786 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
787 RC632_TBFRAMING_EOF_11));
791 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
792 (RC632_RXCTRL1_GAIN_35DB |
793 RC632_RXCTRL1_ISO14443 |
794 RC632_RXCTRL1_SUBCP_8));
798 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
799 (RC632_DECCTRL_BPSK |
800 RC632_DECCTRL_RXFR_14443B));
804 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
805 CM5121_14443B_BITPHASE);
809 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
810 CM5121_14443B_THRESHOLD);
814 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
815 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
816 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
817 RC632_BPSKD_FILTER_AMP_DETECT |
818 RC632_BPSKD_NO_RX_EOF |
819 RC632_BPSKD_NO_RX_EGT));
823 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
824 (RC632_RXCTRL2_AUTO_PD |
825 RC632_RXCTRL2_DECSRC_INT));
829 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
833 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
834 (RC632_CR_TX_CRC_ENABLE |
835 RC632_CR_RX_CRC_ENABLE |
840 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
844 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
852 rc632_iso15693_init(struct rfid_asic_handle *h)
856 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
857 (RC632_TXCTRL_MOD_SRC_INT |
858 RC632_TXCTRL_TX2_INV |
859 RC632_TXCTRL_TX2_RF_EN |
860 RC632_TXCTRL_TX1_RF_EN));
864 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
868 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
872 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
873 (RC632_CDRCTRL_RATE_15693 |
878 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
882 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
886 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
890 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
891 (RC632_RXCTRL1_SUBCP_16 |
892 RC632_RXCTRL1_ISO15693 |
893 RC632_RXCTRL1_GAIN_35DB));
897 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
898 (RC632_DECCTRL_RXFR_15693 |
899 RC632_DECCTRL_RX_INVERT));
903 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
907 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
911 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
915 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
916 (RC632_RXCTRL2_AUTO_PD |
917 RC632_RXCTRL2_DECSRC_INT));
921 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
923 RC632_CR_RX_CRC_ENABLE |
924 RC632_CR_TX_CRC_ENABLE));
928 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
932 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
940 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
944 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
945 (RC632_TXCTRL_MOD_SRC_INT |
946 RC632_TXCTRL_TX2_INV |
947 RC632_TXCTRL_TX2_RF_EN |
948 RC632_TXCTRL_TX1_RF_EN));
952 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
956 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
960 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
964 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
968 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
972 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
976 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
980 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
984 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
988 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
992 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
996 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1000 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1001 RC632_RXCTRL2_DECSRC_INT);
1005 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1006 (RC632_CR_RX_CRC_ENABLE |
1007 RC632_CR_TX_CRC_ENABLE));
1008 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1012 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1020 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1026 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1027 (RC632_TXCTRL_MOD_SRC_INT |
1028 RC632_TXCTRL_TX2_INV |
1029 RC632_TXCTRL_TX2_RF_EN |
1030 RC632_TXCTRL_TX1_RF_EN));
1034 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1038 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1042 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1043 (RC632_CDRCTRL_RATE_15693 |
1044 RC632_CDRCTRL_TXCD_ICODE_STD |
1049 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1053 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1056 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1057 (RC632_RXCTRL1_SUBCP_16|
1058 RC632_RXCTRL1_ISO15693|
1059 RC632_RXCTRL1_GAIN_35DB));
1062 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1063 (RC632_DECCTRL_RX_INVERT|
1064 RC632_DECCTRL_RXFR_15693));
1068 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1072 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1076 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1080 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1081 RC632_RXCTRL2_DECSRC_INT);
1085 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1089 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1093 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1100 struct mifare_authcmd {
1102 u_int8_t block_address;
1103 u_int32_t serno; /* lsb 1 2 msb */
1104 } __attribute__ ((packed));
1107 #define RFID_MIFARE_KEY_LEN 6
1108 #define RFID_MIFARE_KEY_CODED_LEN 12
1110 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1112 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1118 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1119 ln = key6[i] & 0x0f;
1121 key12[i * 2 + 1] = (~ln << 4) | ln;
1122 key12[i * 2] = (~hn << 4) | hn;
1128 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1130 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1134 ret = rc632_mifare_transform_key(key, coded_key);
1138 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1142 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1146 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1150 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1154 if (reg & RC632_ERR_FLAG_KEY_ERR)
1161 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1165 struct mifare_authcmd acmd;
1168 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1171 /* Initialize acmd */
1172 acmd.block_address = block & 0xff;
1173 acmd.auth_cmd = cmd;
1174 //acmd.serno = htonl(serno);
1177 ret = rc632_clear_bits(h, RC632_REG_CONTROL,
1178 RC632_CONTROL_CRYPTO1_ON);
1181 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1182 RC632_CR_RX_CRC_ENABLE);
1186 /* Send Authent1 Command */
1187 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1191 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1195 /* Wait until transmitter is idle */
1196 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1200 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1207 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1208 RC632_CR_TX_CRC_ENABLE);
1212 /* Send Authent2 Command */
1213 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1218 /* Wait until transmitter is idle */
1219 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1226 /* Check whether authentication was successful */
1227 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1231 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1238 /* transcieve regular frame */
1240 rc632_mifare_transcieve(struct rfid_asic_handle *handle,
1241 const u_int8_t *tx_buf, unsigned int tx_len,
1242 u_int8_t *rx_buf, unsigned int *rx_len,
1243 u_int64_t timeout, unsigned int flags)
1246 u_int8_t rxl = *rx_len & 0xff;
1248 DEBUGP("entered\n");
1249 memset(rx_buf, 0, *rx_len);
1252 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1253 (RC632_CR_PARITY_ENABLE |
1254 RC632_CR_PARITY_ODD |
1255 RC632_CR_TX_CRC_ENABLE |
1256 RC632_CR_RX_CRC_ENABLE));
1258 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1259 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1263 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1272 struct rfid_asic rc632 = {
1273 .name = "Philips CL RC632",
1274 .fc = ISO14443_FREQ_CARRIER,
1277 .power_up = &rc632_power_up,
1278 .power_down = &rc632_power_down,
1279 .turn_on_rf = &rc632_turn_on_rf,
1280 .turn_off_rf = &rc632_turn_off_rf,
1281 .transcieve = &rc632_iso14443ab_transcieve,
1283 .init = &rc632_iso14443a_init,
1284 .transcieve_sf = &rc632_iso14443a_transcieve_sf,
1285 .transcieve_acf = &rc632_iso14443a_transcieve_acf,
1288 .init = &rc632_iso14443b_init,
1291 .init = &rc632_iso15693_init,
1294 .setkey = &rc632_mifare_set_key,
1295 .auth = &rc632_mifare_auth,