1 /* Generic Philips CL RC632 Routines
3 * (C) Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 #include <sys/types.h>
28 #include <rfid/rfid.h>
29 #include <rfid/rfid_asic.h>
30 #include <rfid/rfid_asic_rc632.h>
31 #include <rfid/rfid_reader_cm5121.h>
32 #include <rfid/rfid_layer2_iso14443a.h>
33 #include <rfid/rfid_protocol_mifare_classic.h>
35 #include "rfid_iso14443_common.h"
37 //#include "rc632_14443a.h"
40 #define RC632_TMO_AUTH1 14000
42 #define ENTER() DEBUGP("entering\n")
43 struct rfid_asic rc632;
45 /* Register and FIFO Access functions */
47 rc632_reg_write(struct rfid_asic_handle *handle,
51 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
55 rc632_reg_read(struct rfid_asic_handle *handle,
59 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
63 rc632_fifo_write(struct rfid_asic_handle *handle,
68 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
73 rc632_fifo_read(struct rfid_asic_handle *handle,
77 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
82 rc632_set_bits(struct rfid_asic_handle *handle,
89 ret = rc632_reg_read(handle, reg, &tmp);
93 /* if bits are already set, no need to set them again */
94 if ((tmp & val) == val)
97 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
101 rc632_clear_bits(struct rfid_asic_handle *handle,
108 ret = rc632_reg_read(handle, reg, &tmp);
110 DEBUGP("error during reg_read(%p, %d):%d\n",
114 /* if bits are already cleared, no need to clear them again */
115 if ((tmp & val) == 0)
118 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
122 rc632_turn_on_rf(struct rfid_asic_handle *handle)
125 return rc632_set_bits(handle, RC632_REG_TX_CONTROL, 0x03);
129 rc632_turn_off_rf(struct rfid_asic_handle *handle)
132 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL, 0x03);
136 rc632_power_up(struct rfid_asic_handle *handle)
139 return rc632_clear_bits(handle, RC632_REG_CONTROL,
140 RC632_CONTROL_POWERDOWN);
144 rc632_power_down(struct rfid_asic_handle *handle)
146 return rc632_set_bits(handle, RC632_REG_CONTROL,
147 RC632_CONTROL_POWERDOWN);
150 /* Stupid RC623 implementations don't evaluate interrupts but poll the
151 * command register for "status idle" */
153 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
159 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
164 /* FIXME: read second time ?? */
170 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
172 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
177 /* Fixme: Abort after some timeout */
184 rc632_transmit(struct rfid_asic_handle *handle,
191 ret = rc632_fifo_write(handle, len, buf, 0x03);
195 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSMIT);
199 return rc632_wait_idle(handle, timeout);
203 tcl_toggle_pcb(struct rfid_asic_handle *handle)
205 // FIXME: toggle something between 0x0a and 0x0b
210 rc632_transcieve(struct rfid_asic_handle *handle,
211 const u_int8_t *tx_buf,
220 ret = rc632_fifo_write(handle, tx_len, tx_buf, 0x03);
224 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_TRANSCIEVE);
229 tcl_toggle_pcb(handle);
231 ret = rc632_wait_idle(handle, timer);
235 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, rx_len);
242 DEBUGP("rx_len == 0\n");
244 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
245 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
250 return rc632_fifo_read(handle, *rx_len, rx_buf);
254 rc632_read_eeprom(struct rfid_asic_handle *handle)
256 u_int8_t recvbuf[60];
264 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
268 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
274 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
278 // FIXME: do something with eeprom contents
283 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
285 u_int8_t sndbuf[2] = { 0x01, 0x02 };
286 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
289 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
293 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
297 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
301 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
305 usleep(10000); // FIXME: no checking for cmd completion?
307 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
311 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
315 // FIXME: what to do with crc result?
321 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
326 for (i = 0; i <= 0x3f; i++) {
327 ret = rc632_reg_read(handle, i, &buf[i]);
328 // do we want error checks?
335 /* generic FIFO access functions (if no more efficient ones provided by
336 * transport driver) */
341 // FIXME: implementation (not needed for CM 5121)
348 // FIXME: implementation (not neded for CM 5121)
353 rc632_init(struct rfid_asic_handle *ah)
357 /* switch off rf (make sure PICCs are reset at init time) */
358 ret = rc632_power_down(ah);
365 ret = rc632_power_up(ah);
369 /* disable register paging */
370 ret = rc632_reg_write(ah, 0x00, 0x00);
374 /* set some sane default values */
375 ret = rc632_reg_write(ah, 0x11, 0x5b);
380 ret = rc632_turn_on_rf(ah);
388 rc632_fini(struct rfid_asic_handle *ah)
393 ret = rc632_turn_off_rf(ah);
397 ret = rc632_power_down(ah);
404 struct rfid_asic_handle *
405 rc632_open(struct rfid_asic_transport_handle *th)
407 struct rfid_asic_handle *h;
409 h = malloc(sizeof(*h));
412 memset(h, 0, sizeof(*h));
417 h->mtu = h->mru = 40; /* FIXME */
419 if (rc632_init(h) < 0) {
428 rc632_close(struct rfid_asic_handle *h)
436 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
438 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
443 rc632_iso14443a_init(struct rfid_asic_handle *handle)
447 // FIXME: some fifo work (drain fifo?)
449 /* flush fifo (our way) */
450 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
452 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
453 (RC632_TXCTRL_TX1_RF_EN |
454 RC632_TXCTRL_TX2_RF_EN |
455 RC632_TXCTRL_TX2_INV |
456 RC632_TXCTRL_FORCE_100_ASK |
457 RC632_TXCTRL_MOD_SRC_INT));
461 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
462 CM5121_CW_CONDUCTANCE);
466 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
467 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
468 CM5121_MOD_CONDUCTANCE);
472 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
473 (RC632_CDRCTRL_TXCD_14443A |
474 RC632_CDRCTRL_RATE_106K));
478 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
482 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
486 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
490 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
491 (RC632_RXCTRL1_GAIN_35DB |
492 RC632_RXCTRL1_ISO14443 |
493 RC632_RXCTRL1_SUBCP_8));
497 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
498 (RC632_DECCTRL_MANCHESTER |
499 RC632_DECCTRL_RXFR_14443A));
503 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
504 CM5121_14443A_BITPHASE);
508 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
509 CM5121_14443A_THRESHOLD);
513 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
517 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
518 (RC632_RXCTRL2_DECSRC_INT |
519 RC632_RXCTRL2_CLK_Q));
523 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
524 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
528 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
529 (RC632_CR_PARITY_ENABLE |
530 RC632_CR_PARITY_ODD));
534 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
538 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
546 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
550 ret = rc632_turn_off_rf(handle);
560 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
562 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
564 struct iso14443a_atqa *atqa)
570 memset(atqa, 0, sizeof(atqa));
574 /* transfer only 7 bits of last byte in frame */
575 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
579 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
580 RC632_CONTROL_CRYPTO1_ON);
585 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
586 (RC632_CR_PARITY_ENABLE |
587 RC632_CR_PARITY_ODD));
589 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
590 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
596 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
597 (u_int8_t *)atqa, &rx_len, 0x32, 0);
599 DEBUGP("error during rc632_transcieve()\n");
603 /* switch back to normal 8bit last byte */
604 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
609 DEBUGP("rx_len(%d) != 2\n", rx_len);
616 /* transcieve regular frame */
618 rc632_iso14443ab_transcieve(struct rfid_asic_handle *handle,
619 unsigned int frametype,
620 const u_int8_t *tx_buf, unsigned int tx_len,
621 u_int8_t *rx_buf, unsigned int *rx_len,
622 u_int64_t timeout, unsigned int flags)
625 u_int8_t rxl = *rx_len & 0xff;
626 u_int8_t channel_red;
629 memset(rx_buf, 0, *rx_len);
632 case RFID_14443A_FRAME_REGULAR:
633 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
634 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
636 case RFID_14443B_FRAME_REGULAR:
637 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
640 case RFID_MIFARE_FRAME:
641 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
645 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
646 (RC632_CR_PARITY_ENABLE |
647 RC632_CR_PARITY_ODD |
648 RC632_CR_TX_CRC_ENABLE |
649 RC632_CR_RX_CRC_ENABLE));
651 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
656 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
665 /* transcieve anti collission bitframe */
667 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
668 struct iso14443a_anticol_cmd *acf,
669 unsigned int *bit_of_col)
673 u_int8_t rx_len = sizeof(rx_buf);
674 u_int8_t rx_align = 0, tx_last_bits, tx_bytes;
677 *bit_of_col = ISO14443A_BITOFCOL_NONE;
678 memset(rx_buf, 0, sizeof(rx_buf));
680 /* disable mifare cryto */
681 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
682 RC632_CONTROL_CRYPTO1_ON);
686 /* disable CRC summing */
688 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
689 (RC632_CR_PARITY_ENABLE |
690 RC632_CR_PARITY_ODD));
692 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
693 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
698 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
699 tx_bytes = acf->nvb >> 4;
702 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
705 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
707 /* set RxAlign and TxLastBits*/
708 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
709 (rx_align << 4) | (tx_last_bits));
713 ret = rc632_transcieve(handle, (u_int8_t *)acf, tx_bytes,
714 rx_buf, &rx_len, 0x32, 0);
718 /* bitwise-OR the two halves of the split byte */
719 acf->uid_bits[tx_bytes-2] = (
720 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
723 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
725 /* determine whether there was a collission */
726 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
730 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
731 /* retrieve bit of collission */
732 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
736 /* bit of collission relative to start of part 1 of
737 * anticollision frame (!) */
738 *bit_of_col = 2*8 + boc;
744 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
748 // FIXME: some FIFO work
750 /* flush fifo (our way) */
751 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
755 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
756 (RC632_TXCTRL_TX1_RF_EN |
757 RC632_TXCTRL_TX2_RF_EN |
758 RC632_TXCTRL_TX2_INV |
759 RC632_TXCTRL_MOD_SRC_INT));
763 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
767 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
771 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
772 (RC632_CDRCTRL_TXCD_NRZ |
773 RC632_CDRCTRL_RATE_14443B));
777 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
781 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
785 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
786 (RC632_TBFRAMING_SOF_11L_3H |
787 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
788 RC632_TBFRAMING_EOF_11));
792 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
793 (RC632_RXCTRL1_GAIN_35DB |
794 RC632_RXCTRL1_ISO14443 |
795 RC632_RXCTRL1_SUBCP_8));
799 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
800 (RC632_DECCTRL_BPSK |
801 RC632_DECCTRL_RXFR_14443B));
805 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
806 CM5121_14443B_BITPHASE);
810 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
811 CM5121_14443B_THRESHOLD);
815 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
816 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
817 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
818 RC632_BPSKD_FILTER_AMP_DETECT |
819 RC632_BPSKD_NO_RX_EOF |
820 RC632_BPSKD_NO_RX_EGT));
824 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
825 (RC632_RXCTRL2_AUTO_PD |
826 RC632_RXCTRL2_DECSRC_INT));
830 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
834 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
835 (RC632_CR_TX_CRC_ENABLE |
836 RC632_CR_RX_CRC_ENABLE |
841 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
845 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
853 rc632_iso15693_init(struct rfid_asic_handle *h)
857 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
858 (RC632_TXCTRL_MOD_SRC_INT |
859 RC632_TXCTRL_TX2_INV |
860 RC632_TXCTRL_TX2_RF_EN |
861 RC632_TXCTRL_TX1_RF_EN));
865 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
869 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x03);
873 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
874 (RC632_CDRCTRL_RATE_15693 |
879 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
883 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
887 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
891 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
892 (RC632_RXCTRL1_SUBCP_16 |
893 RC632_RXCTRL1_ISO15693 |
894 RC632_RXCTRL1_GAIN_35DB));
898 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
899 (RC632_DECCTRL_RXFR_15693 |
900 RC632_DECCTRL_RX_INVERT));
904 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xe0);
908 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
912 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
916 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
917 (RC632_RXCTRL2_AUTO_PD |
918 RC632_RXCTRL2_DECSRC_INT));
922 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
924 RC632_CR_RX_CRC_ENABLE |
925 RC632_CR_TX_CRC_ENABLE));
929 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xff);
933 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
941 rc632_iso15693_icode_init(struct rfid_asic_handle *h)
945 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
946 (RC632_TXCTRL_MOD_SRC_INT |
947 RC632_TXCTRL_TX2_INV |
948 RC632_TXCTRL_TX2_RF_EN |
949 RC632_TXCTRL_TX1_RF_EN));
953 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
957 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x02);
961 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL, 0x2c);
965 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
969 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
973 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
977 ret = rc632_reg_write(h, RC632_REG_TYPE_B_FRAMING, 0x00);
981 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1, 0x8b); /* FIXME */
985 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL, 0x00);
989 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0x52);
993 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0x66);
997 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1001 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1002 RC632_RXCTRL2_DECSRC_INT);
1006 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1007 (RC632_CR_RX_CRC_ENABLE |
1008 RC632_CR_TX_CRC_ENABLE));
1009 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0xfe);
1013 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xff);
1021 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1027 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1028 (RC632_TXCTRL_MOD_SRC_INT |
1029 RC632_TXCTRL_TX2_INV |
1030 RC632_TXCTRL_TX2_RF_EN |
1031 RC632_TXCTRL_TX1_RF_EN));
1035 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1039 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1043 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1044 (RC632_CDRCTRL_RATE_15693 |
1045 RC632_CDRCTRL_TXCD_ICODE_STD |
1050 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1054 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1057 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1058 (RC632_RXCTRL1_SUBCP_16|
1059 RC632_RXCTRL1_ISO15693|
1060 RC632_RXCTRL1_GAIN_35DB));
1063 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1064 (RC632_DECCTRL_RX_INVERT|
1065 RC632_DECCTRL_RXFR_15693));
1069 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1073 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1077 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1081 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1082 RC632_RXCTRL2_DECSRC_INT);
1086 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1090 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1094 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1101 struct mifare_authcmd {
1103 u_int8_t block_address;
1104 u_int32_t serno; /* lsb 1 2 msb */
1105 } __attribute__ ((packed));
1108 #define RFID_MIFARE_KEY_LEN 6
1109 #define RFID_MIFARE_KEY_CODED_LEN 12
1111 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1113 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1119 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1120 ln = key6[i] & 0x0f;
1122 key12[i * 2 + 1] = (~ln << 4) | ln;
1123 key12[i * 2] = (~hn << 4) | hn;
1129 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1131 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1135 ret = rc632_mifare_transform_key(key, coded_key);
1139 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1143 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1147 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1151 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1155 if (reg & RC632_ERR_FLAG_KEY_ERR)
1162 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1166 struct mifare_authcmd acmd;
1169 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B)
1172 /* Initialize acmd */
1173 acmd.block_address = block & 0xff;
1174 acmd.auth_cmd = cmd;
1175 //acmd.serno = htonl(serno);
1178 ret = rc632_clear_bits(h, RC632_REG_CONTROL,
1179 RC632_CONTROL_CRYPTO1_ON);
1182 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1183 RC632_CR_RX_CRC_ENABLE);
1187 /* Send Authent1 Command */
1188 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1192 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1196 /* Wait until transmitter is idle */
1197 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1201 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1208 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1209 RC632_CR_TX_CRC_ENABLE);
1213 /* Send Authent2 Command */
1214 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1219 /* Wait until transmitter is idle */
1220 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1227 /* Check whether authentication was successful */
1228 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1232 if (!(reg & RC632_CONTROL_CRYPTO1_ON))
1239 /* transcieve regular frame */
1241 rc632_mifare_transcieve(struct rfid_asic_handle *handle,
1242 const u_int8_t *tx_buf, unsigned int tx_len,
1243 u_int8_t *rx_buf, unsigned int *rx_len,
1244 u_int64_t timeout, unsigned int flags)
1247 u_int8_t rxl = *rx_len & 0xff;
1249 DEBUGP("entered\n");
1250 memset(rx_buf, 0, *rx_len);
1253 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1254 (RC632_CR_PARITY_ENABLE |
1255 RC632_CR_PARITY_ODD |
1256 RC632_CR_TX_CRC_ENABLE |
1257 RC632_CR_RX_CRC_ENABLE));
1259 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1260 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1264 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1273 struct rfid_asic rc632 = {
1274 .name = "Philips CL RC632",
1275 .fc = ISO14443_FREQ_CARRIER,
1278 .power_up = &rc632_power_up,
1279 .power_down = &rc632_power_down,
1280 .turn_on_rf = &rc632_turn_on_rf,
1281 .turn_off_rf = &rc632_turn_off_rf,
1282 .transcieve = &rc632_iso14443ab_transcieve,
1284 .init = &rc632_iso14443a_init,
1285 .transcieve_sf = &rc632_iso14443a_transcieve_sf,
1286 .transcieve_acf = &rc632_iso14443a_transcieve_acf,
1289 .init = &rc632_iso14443b_init,
1292 .init = &rc632_iso15693_init,
1295 .setkey = &rc632_mifare_set_key,
1296 .auth = &rc632_mifare_auth,