2 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
4 * (C) 2005 by Harald Welte <laforge@gnumonks.org>
12 #include <rfid/rfid.h>
13 #include <rfid/rfid_asic_rc632.h>
14 #include <rfid/rfid_layer2_iso14443a.h>
18 #include "cm5121_rfid.h" /* FIXME: this needs to be modular */
21 rc632_iso14443a_init(struct rfid_asic_handle *handle)
26 ret = rc632_power_up(handle);
30 ret = rc632_turn_on_rf(handle);
35 // FIXME: some fifo work (drain fifo?)
37 /* flush fifo (our way) */
38 ret = rc632_reg_write(handle, RC632_REG_CONTROL, 0x01);
40 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
41 (RC632_TXCTRL_TX1_RF_EN |
42 RC632_TXCTRL_TX2_RF_EN |
43 RC632_TXCTRL_TX2_INV |
44 RC632_TXCTRL_FORCE_100_ASK |
45 RC632_TXCTRL_MOD_SRC_INT));
49 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
50 CM5121_CW_CONDUCTANCE);
54 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
55 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
56 CM5121_MOD_CONDUCTANCE);
60 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
61 (RC632_CDRCTRL_TXCD_14443A |
62 RC632_CDRCTRL_RATE_106K));
66 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
70 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
74 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
78 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
79 (RC632_RXCTRL1_GAIN_35DB |
80 RC632_RXCTRL1_ISO14443 |
81 RC632_RXCTRL1_SUBCP_8));
85 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
86 (RC632_DECCTRL_MANCHESTER |
87 RC632_DECCTRL_RXFR_14443A));
91 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
92 CM5121_14443A_BITPHASE);
96 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
97 CM5121_14443A_THRESHOLD);
101 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
105 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
106 (RC632_RXCTRL2_DECSRC_INT |
107 RC632_RXCTRL2_CLK_Q));
111 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
115 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
116 (RC632_CR_PARITY_ENABLE |
117 RC632_CR_PARITY_ODD));
121 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
125 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
133 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
137 ret = rc632_turn_off_rf(handle);
148 rc632_iso14443a_select(struct rc632_handle *handle,
149 unsigned char *retptr,
153 unsigned char tx_buf[7];
154 unsigned char rx_buf[64];
155 unsigned char rx_len = 1;
157 memset(rx_buf, 0, sizeof(rx_buf));
161 (u_int32_t *)tx_buf[2] = arg_4;
164 /* disable mifare cryto */
165 ret = rc632_clear_bit(handle, RC632_REG_CONTROL,
166 RC632_CONTROL_CRYPTO1_ON);
170 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
171 (RC632_CR_PARITY_ENABLE |
172 RC632_CR_PARITY_ODD |
173 RC632_CR_TX_CRC_ENABLE |
174 RC632_CR_RX_CRC_ENABLE));
178 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
179 rx_buf, &rx_len, 0x32, 0);
181 if (ret < 0 || rx_len != 1)
189 /* issue a 14443-3 A PCD -> PICC command, such as REQA, WUPA */
191 rc632_iso14443a_req(sutruct rc632_handle *handle, unsigned char req,
195 unsigned char tx_buf[1];
196 unsigned char rx_buf[0x40];
197 unsigned char rx_len = 2;
199 memset(rx_buf, 0, sizeof(rx_buf));
203 /* transfer only 7 bits of last byte in frame */
204 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
209 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
210 RC632_CONTROL_CRYPTO1_ON);
214 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
215 (RC632_CR_PARITY_ENABLE |
216 RC632_CR_PARITY_ODD));
220 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf), rx_buf,
225 /* switch back to normal 8bit last byte */
226 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
230 if ((rx_len != 2) || (rx_buf[1] != 0xf0))
240 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
242 rc632_iso14443a_transcieve_sf(struct rfid_asic_handle *handle,
244 struct iso14443a_atqa *atqa)
247 unsigned char tx_buf[1];
248 unsigned char rx_len = 2;
250 memset(atqa, 0, sizeof(atqa));
254 /* transfer only 7 bits of last byte in frame */
255 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
260 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
261 RC632_CONTROL_CRYPTO1_ON);
265 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
266 (RC632_CR_PARITY_ENABLE |
267 RC632_CR_PARITY_ODD));
271 ret = rc632_transcieve(handle, tx_buf, sizeof(tx_buf),
272 (unsigned char *)atqa, &rx_len, 0x32, 0);
274 DEBUGP("error during rc632_transcieve()\n");
278 /* switch back to normal 8bit last byte */
279 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
284 DEBUGP("rx_len(%d) != 2\n", rx_len);
291 /* transcieve regular frame */
293 rc632_iso14443a_transcieve(struct rfid_asic_handle *handle,
294 const unsigned char *tx_buf, unsigned int tx_len,
295 unsigned char *rx_buf, unsigned int *rx_len,
296 unsigned int timeout, unsigned int flags)
299 unsigned char rxl = *rx_len & 0xff;
301 memset(rx_buf, 0, *rx_len);
303 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
304 (RC632_CR_PARITY_ENABLE |
305 RC632_CR_PARITY_ODD |
306 RC632_CR_TX_CRC_ENABLE |
307 RC632_CR_RX_CRC_ENABLE));
311 ret = rc632_transcieve(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
320 /* transcieve anti collission bitframe */
322 rc632_iso14443a_transcieve_acf(struct rfid_asic_handle *handle,
323 struct iso14443a_anticol_cmd *acf,
324 unsigned int *bit_of_col)
327 unsigned char rx_buf[64];
328 unsigned char rx_len = sizeof(rx_buf);
329 unsigned char rx_align = 0, tx_last_bits, tx_bytes;
331 unsigned char error_flag;
332 *bit_of_col = ISO14443A_BITOFCOL_NONE;
333 memset(rx_buf, 0, sizeof(rx_buf));
335 /* disable mifare cryto */
336 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
337 RC632_CONTROL_CRYPTO1_ON);
341 /* disalbe CRC summing */
342 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
343 (RC632_CR_PARITY_ENABLE |
344 RC632_CR_PARITY_ODD));
348 tx_last_bits = acf->nvb & 0x0f; /* lower nibble indicates bits */
349 tx_bytes = acf->nvb >> 4;
352 rx_align = (tx_last_bits+1) % 8;/* rx frame complements tx */
355 //rx_align = 8 - tx_last_bits;/* rx frame complements tx */
357 /* set RxAlign and TxLastBits*/
358 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
359 (rx_align << 4) | (tx_last_bits));
363 ret = rc632_transcieve(handle, (unsigned char *)acf, tx_bytes,
364 rx_buf, &rx_len, 0x32, 0);
368 /* bitwise-OR the two halves of the split byte */
369 acf->uid_bits[tx_bytes-2] = (
370 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
373 memcpy(&acf->uid_bits[tx_bytes+1-2], &rx_buf[1], rx_len-1);
375 /* determine whether there was a collission */
376 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
380 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
381 /* retrieve bit of collission */
382 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
386 /* bit of collission relative to start of part 1 of
387 * anticollision frame (!) */
388 *bit_of_col = 2*8 + boc;