4 Copyright 2012 Torbjorn Tyridal <ttyridal@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
23 #include "sim_core_declare.h"
24 #include "avr_eeprom.h"
25 #include "avr_flash.h"
26 #include "avr_watchdog.h"
27 #include "avr_extint.h"
28 #include "avr_ioport.h"
31 #include "avr_timer.h"
35 void usb162_init(struct avr_t * avr);
36 void usb162_reset(struct avr_t * avr);
40 #include "avr/iousb162.h"
46 avr_watchdog_t watchdog;
48 avr_ioport_t portb, portc, portd;
50 avr_timer_t timer0,timer1;
59 .reset = usb162_reset,
61 AVR_EEPROM_DECLARE(EE_READY_vect),
62 AVR_SELFPROG_DECLARE(SPMCSR, SPMEN, SPM_READY_vect),
63 AVR_WATCHDOG_DECLARE(WDTCSR, WDT_vect),
65 AVR_EXTINT_MEGA_DECLARE(0, 'D', PD0, A),
66 AVR_EXTINT_MEGA_DECLARE(1, 'D', PD1, A),
67 AVR_EXTINT_MEGA_DECLARE(2, 'D', PD2, A),
68 AVR_EXTINT_MEGA_DECLARE(3, 'D', PD3, A),
69 AVR_EXTINT_MEGA_DECLARE(4, 'C', PC7, B),
70 AVR_EXTINT_MEGA_DECLARE(5, 'D', PD4, B),
71 AVR_EXTINT_MEGA_DECLARE(6, 'D', PD6, B),
72 AVR_EXTINT_MEGA_DECLARE(7, 'D', PD7, B),
75 .name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB,
77 .enable = AVR_IO_REGBIT(PCICR, PCIE0),
78 .raised = AVR_IO_REGBIT(PCIFR, PCIF0),
79 .vector = PCINT0_vect,
84 .name = 'C', .r_port = PORTC, .r_ddr = DDRC, .r_pin = PINC,
86 .enable = AVR_IO_REGBIT(PCICR, PCIE1),
87 .raised = AVR_IO_REGBIT(PCIFR, PCIF1),
88 .vector = PCINT1_vect,
93 .name = 'D', .r_port = PORTD, .r_ddr = DDRD, .r_pin = PIND,
97 .disabled = AVR_IO_REGBIT(PRR1,PRUSART1),
101 .txen = AVR_IO_REGBIT(UCSR1B, TXEN1),
102 .rxen = AVR_IO_REGBIT(UCSR1B, RXEN1),
103 .ucsz = AVR_IO_REGBITS(UCSR1C, UCSZ10, 0x3), // 2 bits
104 .ucsz2 = AVR_IO_REGBIT(UCSR1B, UCSZ12), // 1 bits
112 .enable = AVR_IO_REGBIT(UCSR1B, RXCIE1),
113 .raised = AVR_IO_REGBIT(UCSR1A, RXC1),
114 .vector = USART1_RX_vect,
117 .enable = AVR_IO_REGBIT(UCSR1B, TXCIE1),
118 .raised = AVR_IO_REGBIT(UCSR1A, TXC1),
119 .vector = USART1_TX_vect,
122 .enable = AVR_IO_REGBIT(UCSR1B, UDRIE1),
123 .raised = AVR_IO_REGBIT(UCSR1A, UDRE1),
124 .vector = USART1_UDRE_vect,
129 .disabled = AVR_IO_REGBIT(PRR0,PRTIM0),
130 .wgm = { AVR_IO_REGBIT(TCCR0A, WGM00), AVR_IO_REGBIT(TCCR0A, WGM01), AVR_IO_REGBIT(TCCR0B, WGM02) },
132 [0] = AVR_TIMER_WGM_NORMAL8(),
133 [2] = AVR_TIMER_WGM_CTC(),
134 [3] = AVR_TIMER_WGM_FASTPWM8(),
135 [7] = AVR_TIMER_WGM_OCPWM(),
137 .cs = { AVR_IO_REGBIT(TCCR0B, CS00), AVR_IO_REGBIT(TCCR0B, CS01), AVR_IO_REGBIT(TCCR0B, CS02) },
138 .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ },
143 .enable = AVR_IO_REGBIT(TIMSK0, TOIE0),
144 .raised = AVR_IO_REGBIT(TIFR0, TOV0),
145 .vector = TIMER0_OVF_vect,
148 [AVR_TIMER_COMPA] = {
150 .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
151 .com_pin = AVR_IO_REGBIT(PORTD, 6),
153 .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A),
154 .raised = AVR_IO_REGBIT(TIFR0, OCF0A),
155 .vector = TIMER0_COMPA_vect,
158 [AVR_TIMER_COMPB] = {
160 .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
161 .com_pin = AVR_IO_REGBIT(PORTD, 5),
163 .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B),
164 .raised = AVR_IO_REGBIT(TIFR0, OCF0B),
165 .vector = TIMER0_COMPB_vect,
172 .disabled = AVR_IO_REGBIT(PRR0,PRTIM1),
173 .wgm = { AVR_IO_REGBIT(TCCR1A, WGM10), AVR_IO_REGBIT(TCCR1A, WGM11),
174 AVR_IO_REGBIT(TCCR1B, WGM12), AVR_IO_REGBIT(TCCR1B, WGM13) },
176 [0] = AVR_TIMER_WGM_NORMAL16(),
177 [4] = AVR_TIMER_WGM_CTC(),
178 [5] = AVR_TIMER_WGM_FASTPWM8(),
179 [6] = AVR_TIMER_WGM_FASTPWM9(),
180 [7] = AVR_TIMER_WGM_FASTPWM10(),
181 [12] = AVR_TIMER_WGM_ICCTC(),
182 [14] = AVR_TIMER_WGM_ICPWM(),
183 [15] = AVR_TIMER_WGM_OCPWM(),
185 .cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) },
186 .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ /* External clock T1 is not handled */},
193 .ices = AVR_IO_REGBIT(TCCR1B, ICES1),
194 .icp = AVR_IO_REGBIT(PORTB, 0),
197 .enable = AVR_IO_REGBIT(TIMSK1, TOIE1),
198 .raised = AVR_IO_REGBIT(TIFR1, TOV1),
199 .vector = TIMER1_OVF_vect,
202 .enable = AVR_IO_REGBIT(TIMSK1, ICIE1),
203 .raised = AVR_IO_REGBIT(TIFR1, ICF1),
204 .vector = TIMER1_CAPT_vect,
207 [AVR_TIMER_COMPA] = {
209 .r_ocrh = OCR1AH, // 16 bits timers have two bytes of it
210 .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
211 .com_pin = AVR_IO_REGBIT(PORTB, 1),
213 .enable = AVR_IO_REGBIT(TIMSK1, OCIE1A),
214 .raised = AVR_IO_REGBIT(TIFR1, OCF1A),
215 .vector = TIMER1_COMPA_vect,
218 [AVR_TIMER_COMPB] = {
221 .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
222 .com_pin = AVR_IO_REGBIT(PORTB, 2),
224 .enable = AVR_IO_REGBIT(TIMSK1, OCIE1B),
225 .raised = AVR_IO_REGBIT(TIFR1, OCF1B),
226 .vector = TIMER1_COMPB_vect,
237 .spe = AVR_IO_REGBIT(SPCR, SPE),
238 .mstr = AVR_IO_REGBIT(SPCR, MSTR),
240 .spr = { AVR_IO_REGBIT(SPCR, SPR0), AVR_IO_REGBIT(SPCR, SPR1), AVR_IO_REGBIT(SPSR, SPI2X) },
242 .enable = AVR_IO_REGBIT(SPCR, SPIE),
243 .raised = AVR_IO_REGBIT(SPSR, SPIF),
244 .vector = SPI_STC_vect,
249 .disabled=AVR_IO_REGBIT(PRR1, PRUSB),// bit in the PRR
251 .usbrf=AVR_IO_REGBIT(MCUSR,USBRF), // bit in the MCUSR
256 .usb_com_vect=USB_COM_vect,
257 .usb_gen_vect=USB_GEN_vect,
261 static avr_t * make()
263 return avr_core_allocate(&mcu_usb162.core, sizeof(struct mcu_t));
266 avr_kind_t usb162 = {
267 .names = { "at90usb162" },
271 void usb162_init(struct avr_t * avr)
273 struct mcu_t * mcu = (struct mcu_t*)avr;
275 avr_eeprom_init(avr, &mcu->eeprom);
276 avr_flash_init(avr, &mcu->selfprog);
277 avr_extint_init(avr, &mcu->extint);
278 avr_watchdog_init(avr, &mcu->watchdog);
279 avr_ioport_init(avr, &mcu->portb);
280 avr_ioport_init(avr, &mcu->portc);
281 avr_ioport_init(avr, &mcu->portd);
282 avr_uart_init(avr, &mcu->uart1);
283 avr_timer_init(avr, &mcu->timer0);
284 avr_timer_init(avr, &mcu->timer1);
285 avr_spi_init(avr, &mcu->spi);
286 avr_usb_init(avr, &mcu->usb);
289 void usb162_reset(struct avr_t * avr)
291 // struct mcu_t * mcu = (struct mcu_t*)avr;