4 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
22 #include </usr/include/stdio.h>
23 #include "sim_core_declare.h"
24 #include "avr_eeprom.h"
25 #include "avr_watchdog.h"
26 #include "avr_extint.h"
27 #include "avr_ioport.h"
29 #include "avr_timer.h"
31 static void init(struct avr_t * avr);
32 static void reset(struct avr_t * avr);
36 #include "avr/iotn2313.h"
39 * This is a template for all of the tinyx5 devices, hopefully
44 avr_watchdog_t watchdog;
46 avr_ioport_t porta, portb, portd;
48 avr_timer_t timer0,timer1;
57 AVR_EEPROM_DECLARE_8BIT(EEPROM_READY_vect),
58 AVR_WATCHDOG_DECLARE(WDTCSR, WDT_OVERFLOW_vect),
60 AVR_EXTINT_TINY_DECLARE(0, 'D', 2, EIFR),
61 AVR_EXTINT_TINY_DECLARE(1, 'D', 3, EIFR),
63 .porta = { // port A has no PCInts..
64 .name = 'A', .r_port = PORTA, .r_ddr = DDRA, .r_pin = PINA,
67 .name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB,
69 .enable = AVR_IO_REGBIT(GIMSK, PCIE),
70 .raised = AVR_IO_REGBIT(EIFR, PCIF),
75 .portd = { // port D has no PCInts..
76 .name = 'D', .r_port = PORTD, .r_ddr = DDRD, .r_pin = PIND,
79 // no PRR register on the 2313
80 //.disabled = AVR_IO_REGBIT(PRR,PRUSART0),
84 .txen = AVR_IO_REGBIT(UCSRB, TXEN),
85 .rxen = AVR_IO_REGBIT(UCSRB, RXEN),
93 .enable = AVR_IO_REGBIT(UCSRB, RXCIE),
94 .raised = AVR_IO_REGBIT(UCSRA, RXC),
95 .vector = USART_RX_vect,
98 .enable = AVR_IO_REGBIT(UCSRB, TXCIE),
99 .raised = AVR_IO_REGBIT(UCSRA, TXC),
100 .vector = USART_TX_vect,
103 .enable = AVR_IO_REGBIT(UCSRB, UDRIE),
104 .raised = AVR_IO_REGBIT(UCSRA, UDRE),
105 .vector = USART_UDRE_vect,
110 .wgm = { AVR_IO_REGBIT(TCCR0A, WGM00), AVR_IO_REGBIT(TCCR0A, WGM01), AVR_IO_REGBIT(TCCR0B, WGM02) },
112 [0] = AVR_TIMER_WGM_NORMAL8(),
113 [2] = AVR_TIMER_WGM_CTC(),
114 [3] = AVR_TIMER_WGM_FASTPWM8(),
115 [7] = AVR_TIMER_WGM_OCPWM(),
117 .cs = { AVR_IO_REGBIT(TCCR0B, CS00), AVR_IO_REGBIT(TCCR0B, CS01), AVR_IO_REGBIT(TCCR0B, CS02) },
118 .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ },
123 .enable = AVR_IO_REGBIT(TIMSK, TOIE0),
124 .raised = AVR_IO_REGBIT(TIFR, TOV0),
125 .vector = TIMER0_OVF_vect,
128 [AVR_TIMER_COMPA] = {
130 .com = AVR_IO_REGBITS(TCCR0A, COM0A0, 0x3),
131 .com_pin = AVR_IO_REGBIT(PORTB, 2),
133 .enable = AVR_IO_REGBIT(TIMSK, OCIE0A),
134 .raised = AVR_IO_REGBIT(TIFR, OCF0A),
135 .vector = TIMER0_COMPA_vect,
138 [AVR_TIMER_COMPB] = {
140 .com = AVR_IO_REGBITS(TCCR0A, COM0B0, 0x3),
141 .com_pin = AVR_IO_REGBIT(PORTD, 5),
143 .enable = AVR_IO_REGBIT(TIMSK, OCIE0B),
144 .raised = AVR_IO_REGBIT(TIFR, OCF0B),
145 .vector = TIMER0_COMPB_vect,
152 // .disabled = AVR_IO_REGBIT(PRR,PRTIM1),
153 .wgm = { AVR_IO_REGBIT(TCCR1A, WGM10), AVR_IO_REGBIT(TCCR1A, WGM11),
154 AVR_IO_REGBIT(TCCR1B, WGM12), AVR_IO_REGBIT(TCCR1B, WGM13) },
156 [0] = AVR_TIMER_WGM_NORMAL16(),
157 [4] = AVR_TIMER_WGM_CTC(),
158 [5] = AVR_TIMER_WGM_FASTPWM8(),
159 [6] = AVR_TIMER_WGM_FASTPWM9(),
160 [7] = AVR_TIMER_WGM_FASTPWM10(),
161 [12] = AVR_TIMER_WGM_ICCTC(),
162 [14] = AVR_TIMER_WGM_ICPWM(),
163 [15] = AVR_TIMER_WGM_OCPWM(),
165 .cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) },
166 .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ /* External clock T1 is not handled */},
173 .ices = AVR_IO_REGBIT(TCCR1B, ICES1),
174 .icp = AVR_IO_REGBIT(PORTD, 6),
177 .enable = AVR_IO_REGBIT(TIMSK, TOIE1),
178 .raised = AVR_IO_REGBIT(TIFR, TOV1),
179 .vector = TIMER1_OVF_vect,
182 .enable = AVR_IO_REGBIT(TIMSK, ICIE1),
183 .raised = AVR_IO_REGBIT(TIFR, ICF1),
184 .vector = TIMER1_CAPT_vect,
187 [AVR_TIMER_COMPA] = {
189 .r_ocrh = OCR1AH, // 16 bits timers have two bytes of it
190 .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
191 .com_pin = AVR_IO_REGBIT(PORTB, 3),
193 .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
194 .raised = AVR_IO_REGBIT(TIFR, OCF1A),
195 .vector = TIMER1_COMPA_vect,
198 [AVR_TIMER_COMPB] = {
201 .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
202 .com_pin = AVR_IO_REGBIT(PORTB, 4),
204 .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
205 .raised = AVR_IO_REGBIT(TIFR, OCF1B),
206 .vector = TIMER1_COMPB_vect,
213 static avr_t * make()
218 avr_kind_t tiny2313 = {
219 .names = { "attiny2313", "attiny2313v" },
223 static void init(struct avr_t * avr)
225 struct mcu_t * mcu = (struct mcu_t*)avr;
227 printf("%s init\n", avr->mmcu);
229 avr_eeprom_init(avr, &mcu->eeprom);
230 avr_watchdog_init(avr, &mcu->watchdog);
231 avr_extint_init(avr, &mcu->extint);
232 avr_ioport_init(avr, &mcu->porta);
233 avr_ioport_init(avr, &mcu->portb);
234 avr_ioport_init(avr, &mcu->portd);
235 avr_uart_init(avr, &mcu->uart);
236 avr_timer_init(avr, &mcu->timer0);
237 avr_timer_init(avr, &mcu->timer1);
240 static void reset(struct avr_t * avr)
242 // struct mcu_t * mcu = (struct mcu_t*)avr;