4 Handles the 8 bits and 16 bits AVR timer.
9 Copyright 2008-2012 Michel Pollet <buserror@gmail.com>
11 This file is part of simavr.
13 simavr is free software: you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation, either version 3 of the License, or
16 (at your option) any later version.
18 simavr is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with simavr. If not, see <http://www.gnu.org/licenses/>.
28 #include "avr_timer.h"
29 #include "avr_ioport.h"
32 * The timers are /always/ 16 bits here, if the higher byte register
33 * is specified it's just added.
35 static uint16_t _timer_get_ocr(avr_timer_t * p, int compi)
37 return p->io.avr->data[p->comp[compi].r_ocr] |
38 (p->comp[compi].r_ocrh ? (p->io.avr->data[p->comp[compi].r_ocrh] << 8) : 0);
40 static uint16_t _timer_get_tcnt(avr_timer_t * p)
42 return p->io.avr->data[p->r_tcnt] |
43 (p->r_tcnth ? (p->io.avr->data[p->r_tcnth] << 8) : 0);
45 static uint16_t _timer_get_icr(avr_timer_t * p)
47 return p->io.avr->data[p->r_icr] |
48 (p->r_tcnth ? (p->io.avr->data[p->r_icrh] << 8) : 0);
50 static avr_cycle_count_t avr_timer_comp(avr_timer_t *p, avr_cycle_count_t when, uint8_t comp)
52 avr_t * avr = p->io.avr;
53 avr_raise_interrupt(avr, &p->comp[comp].interrupt);
55 // check output compare mode and set/clear pins
56 uint8_t mode = avr_regbit_get(avr, p->comp[comp].com);
57 avr_irq_t * irq = &p->io.irq[TIMER_IRQ_OUT_COMP + comp];
60 case avr_timer_com_normal: // Normal mode OCnA disconnected
62 case avr_timer_com_toggle: // Toggle OCnA on compare match
63 if (p->comp[comp].com_pin.reg) // we got a physical pin
65 AVR_IOPORT_OUTPUT | (avr_regbit_get(avr, p->comp[comp].com_pin) ? 0 : 1));
66 else // no pin, toggle the IRQ anyway
68 p->io.irq[TIMER_IRQ_OUT_COMP + comp].value ? 0 : 1);
70 case avr_timer_com_clear:
71 avr_raise_irq(irq, 0);
73 case avr_timer_com_set:
74 avr_raise_irq(irq, 1);
78 return p->tov_cycles ? 0 :
79 p->comp[comp].comp_cycles ?
80 when + p->comp[comp].comp_cycles : 0;
83 static avr_cycle_count_t avr_timer_compa(struct avr_t * avr, avr_cycle_count_t when, void * param)
85 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPA);
88 static avr_cycle_count_t avr_timer_compb(struct avr_t * avr, avr_cycle_count_t when, void * param)
90 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPB);
93 static avr_cycle_count_t avr_timer_compc(struct avr_t * avr, avr_cycle_count_t when, void * param)
95 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPC);
99 static avr_cycle_count_t avr_timer_tov(struct avr_t * avr, avr_cycle_count_t when, void * param)
101 avr_timer_t * p = (avr_timer_t *)param;
102 int start = p->tov_base == 0;
105 avr_raise_interrupt(avr, &p->overflow);
108 static const avr_cycle_timer_t dispatch[AVR_TIMER_COMP_COUNT] =
109 { avr_timer_compa, avr_timer_compb, avr_timer_compc };
111 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
112 if (p->comp[compi].comp_cycles) {
113 if (p->comp[compi].comp_cycles < p->tov_cycles)
114 avr_cycle_timer_register(avr,
115 p->comp[compi].comp_cycles,
117 else if (p->tov_cycles == p->comp[compi].comp_cycles && !start)
118 dispatch[compi](avr, when, param);
122 return when + p->tov_cycles;
125 static uint16_t _avr_timer_get_current_tcnt(avr_timer_t * p)
127 avr_t * avr = p->io.avr;
129 uint64_t when = avr->cycle - p->tov_base;
131 return (when * (((uint32_t)p->tov_top)+1)) / p->tov_cycles;
136 static uint8_t avr_timer_tcnt_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
138 avr_timer_t * p = (avr_timer_t *)param;
139 // made to trigger potential watchpoints
141 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
143 avr->data[p->r_tcnt] = tcnt;
145 avr->data[p->r_tcnth] = tcnt >> 8;
147 return avr_core_watch_read(avr, addr);
150 static void avr_timer_tcnt_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
152 avr_timer_t * p = (avr_timer_t *)param;
153 avr_core_watch_write(avr, addr, v);
154 uint16_t tcnt = _timer_get_tcnt(p);
159 if (tcnt >= p->tov_top)
162 // this involves some magicking
163 // cancel the current timers, recalculate the "base" we should be at, reset the
164 // timer base as it should, and re-schedule the timers using that base.
166 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
167 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
168 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
169 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
171 uint64_t cycles = (tcnt * p->tov_cycles) / p->tov_top;
173 // printf("%s-%c %d/%d -- cycles %d/%d\n", __FUNCTION__, p->name, tcnt, p->tov_top, (uint32_t)cycles, (uint32_t)p->tov_cycles);
175 // this reset the timers bases to the new base
177 avr_cycle_timer_register(avr, p->tov_cycles - cycles, avr_timer_tov, p);
178 avr_timer_tov(avr, avr->cycle - cycles, p);
180 // tcnt = ((avr->cycle - p->tov_base) * p->tov_top) / p->tov_cycles;
181 // printf("%s-%c new tnt derive to %d\n", __FUNCTION__, p->name, tcnt);
184 static void avr_timer_configure(avr_timer_t * p, uint32_t clock, uint32_t top)
186 float t = clock / (float)(top+1);
187 float frequency = p->io.avr->frequency;
192 p->tov_cycles = frequency / t; // avr_hz_to_cycles(frequency, t);
195 printf("%s-%c TOP %.2fHz = %d cycles\n", __FUNCTION__, p->name, t, (int)p->tov_cycles);
197 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
198 if (!p->comp[compi].r_ocr)
200 uint32_t ocr = _timer_get_ocr(p, compi);
201 float fc = clock / (float)(ocr+1);
203 p->comp[compi].comp_cycles = 0;
204 // printf("%s-%c clock %d top %d OCR%c %d\n", __FUNCTION__, p->name, clock, top, 'A'+compi, ocr);
206 if (ocr && ocr <= top) {
207 p->comp[compi].comp_cycles = frequency / fc; // avr_hz_to_cycles(p->io.avr, fa);
208 if (p->trace_flags /*& (1 << compi)*/)
209 printf("%s-%c %c %.2fHz = %d cycles\n", __FUNCTION__, p->name,
210 'A'+compi, fc, (int)p->comp[compi].comp_cycles);
214 if (p->tov_cycles > 1) {
215 avr_cycle_timer_register(p->io.avr, p->tov_cycles, avr_timer_tov, p);
216 // calling it once, with when == 0 tells it to arm the A/B/C timers if needed
218 avr_timer_tov(p->io.avr, p->io.avr->cycle, p);
222 static void avr_timer_reconfigure(avr_timer_t * p)
224 avr_t * avr = p->io.avr;
226 avr_timer_wgm_t zero={0};
229 p->comp[AVR_TIMER_COMPA].comp_cycles = 0;
230 p->comp[AVR_TIMER_COMPB].comp_cycles = 0;
231 p->comp[AVR_TIMER_COMPC].comp_cycles = 0;
234 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
235 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
236 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
237 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
239 long clock = avr->frequency;
241 // only can exists on "asynchronous" 8 bits timers
242 if (avr_regbit_get(avr, p->as2))
245 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
247 printf("%s-%c clock turned off\n", __FUNCTION__, p->name);
251 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
252 uint8_t cs_div = p->cs_div[cs];
253 uint32_t f = clock >> cs_div;
255 p->mode = p->wgm_op[mode];
256 //printf("%s-%c clock %d, div %d(/%d) = %d ; mode %d\n", __FUNCTION__, p->name, clock, cs, 1 << cs_div, f, mode);
257 switch (p->mode.kind) {
258 case avr_timer_wgm_normal:
259 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
261 case avr_timer_wgm_fc_pwm:
262 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
264 case avr_timer_wgm_ctc: {
265 avr_timer_configure(p, f, _timer_get_ocr(p, AVR_TIMER_COMPA));
267 case avr_timer_wgm_pwm: {
268 uint16_t top = p->mode.top == avr_timer_wgm_reg_ocra ? _timer_get_ocr(p, AVR_TIMER_COMPA) : _timer_get_icr(p);
269 avr_timer_configure(p, f, top);
271 case avr_timer_wgm_fast_pwm:
272 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
275 printf("%s-%c unsupported timer mode wgm=%d (%d)\n", __FUNCTION__, p->name,
280 static void avr_timer_write_ocr(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
282 avr_timer_t * p = (avr_timer_t *)param;
283 uint16_t oldv[AVR_TIMER_COMP_COUNT];
286 /* check to see if the OCR values actually changed */
287 for (int oi = 0; oi < AVR_TIMER_COMP_COUNT; oi++)
288 oldv[oi] = _timer_get_ocr(p, oi);
289 avr_core_watch_write(avr, addr, v);
290 for (int oi = 0; oi < AVR_TIMER_COMP_COUNT; oi++)
291 if (oldv[oi] != _timer_get_ocr(p, oi)) {
295 uint16_t otrace = p->trace_flags;
298 p->trace_flags = 1 << target;
302 switch (p->mode.kind) {
303 case avr_timer_wgm_normal:
304 avr_timer_reconfigure(p);
306 case avr_timer_wgm_fc_pwm: // OCR is not used here
307 avr_timer_reconfigure(p);
309 case avr_timer_wgm_ctc:
310 avr_timer_reconfigure(p);
312 case avr_timer_wgm_pwm:
313 if (p->mode.top != avr_timer_wgm_reg_ocra) {
314 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
315 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
318 case avr_timer_wgm_fast_pwm:
320 avr_timer_reconfigure(p);
321 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
322 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
325 printf("%s-%c mode %d UNSUPPORTED\n", __FUNCTION__, p->name, p->mode.kind);
326 avr_timer_reconfigure(p);
329 p->trace_flags = otrace;
332 static void avr_timer_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
334 avr_timer_t * p = (avr_timer_t *)param;
336 uint8_t as2 = avr_regbit_get(avr, p->as2);
337 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
338 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
340 avr_core_watch_write(avr, addr, v);
342 // only reconfigure the timer if "relevant" bits have changed
343 // this prevent the timer reset when changing the edge detector
344 // or other minor bits
345 if (avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs)) != cs ||
346 avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm)) != mode ||
347 avr_regbit_get(avr, p->as2) != as2) {
348 avr_timer_reconfigure(p);
353 * write to the TIFR register. Watch for code that writes "1" to clear
354 * pending interrupts.
356 static void avr_timer_write_pending(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
358 avr_timer_t * p = (avr_timer_t *)param;
359 // save old bits values
360 uint8_t ov = avr_regbit_get(avr, p->overflow.raised);
361 uint8_t ic = avr_regbit_get(avr, p->icr.raised);
362 uint8_t cp[AVR_TIMER_COMP_COUNT];
364 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
365 cp[compi] = avr_regbit_get(avr, p->comp[compi].interrupt.raised);
368 avr_core_watch_write(avr, addr, v);
370 // clear any interrupts & flags
371 avr_clear_interrupt_if(avr, &p->overflow, ov);
372 avr_clear_interrupt_if(avr, &p->icr, ic);
374 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
375 avr_clear_interrupt_if(avr, &p->comp[compi].interrupt, cp[compi]);
378 static void avr_timer_irq_icp(struct avr_irq_t * irq, uint32_t value, void * param)
380 avr_timer_t * p = (avr_timer_t *)param;
381 avr_t * avr = p->io.avr;
383 // input capture disabled when ICR is used as top
384 if (p->mode.top == avr_timer_wgm_reg_icr)
387 if (avr_regbit_get(avr, p->ices)) { // rising edge
388 if (!irq->value && value)
390 } else { // default, falling edge
391 if (irq->value && !value)
396 // get current TCNT, copy it to ICR, and raise interrupt
397 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
398 avr->data[p->r_icr] = tcnt;
400 avr->data[p->r_icrh] = tcnt >> 8;
401 avr_raise_interrupt(avr, &p->icr);
404 static void avr_timer_reset(avr_io_t * port)
406 avr_timer_t * p = (avr_timer_t *)port;
407 avr_cycle_timer_cancel(p->io.avr, avr_timer_tov, p);
408 avr_cycle_timer_cancel(p->io.avr, avr_timer_compa, p);
409 avr_cycle_timer_cancel(p->io.avr, avr_timer_compb, p);
410 avr_cycle_timer_cancel(p->io.avr, avr_timer_compc, p);
412 // check to see if the comparators have a pin output. If they do,
413 // (try) to get the ioport corresponding IRQ and connect them
414 // they will automagically be triggered when the comparator raises
416 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
417 p->comp[compi].comp_cycles = 0;
419 avr_ioport_getirq_t req = {
420 .bit = p->comp[compi].com_pin
422 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
424 // printf("%s-%c COMP%c Connecting PIN IRQ %d\n", __FUNCTION__, p->name, 'A'+compi, req.irq[0]->irq);
425 avr_connect_irq(&port->irq[TIMER_IRQ_OUT_COMP + compi], req.irq[0]);
428 avr_ioport_getirq_t req = {
431 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
432 // cool, got an IRQ for the input capture pin
433 // printf("%s-%c ICP Connecting PIN IRQ %d\n", __FUNCTION__, p->name, req.irq[0]->irq);
434 avr_irq_register_notify(req.irq[0], avr_timer_irq_icp, p);
439 static const char * irq_names[TIMER_IRQ_COUNT] = {
440 [TIMER_IRQ_OUT_PWM0] = "8>pwm0",
441 [TIMER_IRQ_OUT_PWM1] = "8>pwm1",
442 [TIMER_IRQ_OUT_COMP + 0] = ">compa",
443 [TIMER_IRQ_OUT_COMP + 1] = ">compb",
444 [TIMER_IRQ_OUT_COMP + 2] = ">compc",
447 static avr_io_t _io = {
449 .reset = avr_timer_reset,
450 .irq_names = irq_names,
453 void avr_timer_init(avr_t * avr, avr_timer_t * p)
457 avr_register_io(avr, &p->io);
458 avr_register_vector(avr, &p->overflow);
459 avr_register_vector(avr, &p->icr);
461 // allocate this module's IRQ
462 avr_io_setirqs(&p->io, AVR_IOCTL_TIMER_GETIRQ(p->name), TIMER_IRQ_COUNT, NULL);
464 // marking IRQs as "filtered" means they don't propagate if the
465 // new value raised is the same as the last one.. in the case of the
466 // pwm value it makes sense not to bother.
467 p->io.irq[TIMER_IRQ_OUT_PWM0].flags |= IRQ_FLAG_FILTERED;
468 p->io.irq[TIMER_IRQ_OUT_PWM1].flags |= IRQ_FLAG_FILTERED;
470 if (p->wgm[0].reg) // these are not present on older AVRs
471 avr_register_io_write(avr, p->wgm[0].reg, avr_timer_write, p);
472 avr_register_io_write(avr, p->cs[0].reg, avr_timer_write, p);
474 // this assumes all the "pending" interrupt bits are in the same
475 // register. Might not be true on all devices ?
476 avr_register_io_write(avr, p->overflow.raised.reg, avr_timer_write_pending, p);
479 * Even if the timer is 16 bits, we don't care to have watches on the
480 * high bytes because the datasheet says that the low address is always
483 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
484 avr_register_vector(avr, &p->comp[compi].interrupt);
486 if (p->comp[compi].r_ocr) // not all timers have all comparators
487 avr_register_io_write(avr, p->comp[compi].r_ocr, avr_timer_write_ocr, p);
489 avr_register_io_write(avr, p->r_tcnt, avr_timer_tcnt_write, p);
490 avr_register_io_read(avr, p->r_tcnt, avr_timer_tcnt_read, p);
491 p->trace_flags = 0xf;