4 Handles the 8 bits and 16 bits AVR timer.
9 Copyright 2008-2012 Michel Pollet <buserror@gmail.com>
11 This file is part of simavr.
13 simavr is free software: you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation, either version 3 of the License, or
16 (at your option) any later version.
18 simavr is distributed in the hope that it will be useful,
19 but WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 GNU General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with simavr. If not, see <http://www.gnu.org/licenses/>.
28 #include "avr_timer.h"
29 #include "avr_ioport.h"
32 * The timers are /always/ 16 bits here, if the higher byte register
33 * is specified it's just added.
35 static uint16_t _timer_get_ocr(avr_timer_t * p, int compi)
37 return p->io.avr->data[p->comp[compi].r_ocr] |
38 (p->comp[compi].r_ocrh ? (p->io.avr->data[p->comp[compi].r_ocrh] << 8) : 0);
40 static uint16_t _timer_get_tcnt(avr_timer_t * p)
42 return p->io.avr->data[p->r_tcnt] |
43 (p->r_tcnth ? (p->io.avr->data[p->r_tcnth] << 8) : 0);
45 static uint16_t _timer_get_icr(avr_timer_t * p)
47 return p->io.avr->data[p->r_icr] |
48 (p->r_tcnth ? (p->io.avr->data[p->r_icrh] << 8) : 0);
50 static avr_cycle_count_t avr_timer_comp(avr_timer_t *p, avr_cycle_count_t when, uint8_t comp)
52 avr_t * avr = p->io.avr;
53 avr_raise_interrupt(avr, &p->comp[comp].interrupt);
55 // check output compare mode and set/clear pins
56 uint8_t mode = avr_regbit_get(avr, p->comp[comp].com);
57 avr_irq_t * irq = &p->io.irq[TIMER_IRQ_OUT_COMP + comp];
60 case avr_timer_com_normal: // Normal mode OCnA disconnected
62 case avr_timer_com_toggle: // Toggle OCnA on compare match
63 if (p->comp[comp].com_pin.reg) // we got a physical pin
65 AVR_IOPORT_OUTPUT | (avr_regbit_get(avr, p->comp[comp].com_pin) ? 0 : 1));
66 else // no pin, toggle the IRQ anyway
68 p->io.irq[TIMER_IRQ_OUT_COMP + comp].value ? 0 : 1);
70 case avr_timer_com_clear:
71 avr_raise_irq(irq, 0);
73 case avr_timer_com_set:
74 avr_raise_irq(irq, 1);
78 return p->tov_cycles ? 0 :
79 p->comp[comp].comp_cycles ?
80 when + p->comp[comp].comp_cycles : 0;
83 static avr_cycle_count_t avr_timer_compa(struct avr_t * avr, avr_cycle_count_t when, void * param)
85 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPA);
88 static avr_cycle_count_t avr_timer_compb(struct avr_t * avr, avr_cycle_count_t when, void * param)
90 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPB);
93 static avr_cycle_count_t avr_timer_compc(struct avr_t * avr, avr_cycle_count_t when, void * param)
95 return avr_timer_comp((avr_timer_t*)param, when, AVR_TIMER_COMPC);
99 static avr_cycle_count_t avr_timer_tov(struct avr_t * avr, avr_cycle_count_t when, void * param)
101 avr_timer_t * p = (avr_timer_t *)param;
102 int start = p->tov_base == 0;
105 avr_raise_interrupt(avr, &p->overflow);
108 static const avr_cycle_timer_t dispatch[AVR_TIMER_COMP_COUNT] =
109 { avr_timer_compa, avr_timer_compb, avr_timer_compc };
111 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
112 if (p->comp[compi].comp_cycles) {
113 if (p->comp[compi].comp_cycles < p->tov_cycles)
114 avr_cycle_timer_register(avr,
115 p->comp[compi].comp_cycles,
117 else if (p->tov_cycles == p->comp[compi].comp_cycles && !start)
118 dispatch[compi](avr, when, param);
122 return when + p->tov_cycles;
125 static uint16_t _avr_timer_get_current_tcnt(avr_timer_t * p)
127 avr_t * avr = p->io.avr;
129 uint64_t when = avr->cycle - p->tov_base;
131 return (when * (((uint32_t)p->tov_top)+1)) / p->tov_cycles;
136 static uint8_t avr_timer_tcnt_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
138 avr_timer_t * p = (avr_timer_t *)param;
139 // made to trigger potential watchpoints
141 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
143 avr->data[p->r_tcnt] = tcnt;
145 avr->data[p->r_tcnth] = tcnt >> 8;
147 return avr_core_watch_read(avr, addr);
150 static void avr_timer_tcnt_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
152 avr_timer_t * p = (avr_timer_t *)param;
153 avr_core_watch_write(avr, addr, v);
154 uint16_t tcnt = _timer_get_tcnt(p);
159 if (tcnt >= p->tov_top)
162 // this involves some magicking
163 // cancel the current timers, recalculate the "base" we should be at, reset the
164 // timer base as it should, and re-shedule the timers using that base.
166 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
167 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
168 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
169 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
171 uint64_t cycles = (tcnt * p->tov_cycles) / p->tov_top;
173 // printf("%s-%c %d/%d -- cycles %d/%d\n", __FUNCTION__, p->name, tcnt, p->tov_top, (uint32_t)cycles, (uint32_t)p->tov_cycles);
175 // this reset the timers bases to the new base
177 avr_cycle_timer_register(avr, p->tov_cycles - cycles, avr_timer_tov, p);
178 avr_timer_tov(avr, avr->cycle - cycles, p);
180 // tcnt = ((avr->cycle - p->tov_base) * p->tov_top) / p->tov_cycles;
181 // printf("%s-%c new tnt derive to %d\n", __FUNCTION__, p->name, tcnt);
184 static void avr_timer_configure(avr_timer_t * p, uint32_t clock, uint32_t top)
186 float t = clock / (float)(top+1);
187 float frequency = p->io.avr->frequency;
192 p->tov_cycles = frequency / t; // avr_hz_to_cycles(frequency, t);
193 printf("%s-%c TOP %.2fHz = %d cycles\n", __FUNCTION__, p->name, t, (int)p->tov_cycles);
195 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
196 if (!p->comp[compi].r_ocr)
198 uint32_t ocr = _timer_get_ocr(p, compi);
199 float fc = clock / (float)(ocr+1);
201 p->comp[compi].comp_cycles = 0;
202 // printf("%s-%c clock %d top %d OCR%c %d\n", __FUNCTION__, p->name, clock, top, 'A'+compi, ocr);
204 if (ocr && ocr <= top) {
205 p->comp[compi].comp_cycles = frequency / fc; // avr_hz_to_cycles(p->io.avr, fa);
206 printf("%s-%c %c %.2fHz = %d cycles\n", __FUNCTION__, p->name,
207 'A'+compi, fc, (int)p->comp[compi].comp_cycles);
211 if (p->tov_cycles > 1) {
212 avr_cycle_timer_register(p->io.avr, p->tov_cycles, avr_timer_tov, p);
213 // calling it once, with when == 0 tells it to arm the A/B/C timers if needed
215 avr_timer_tov(p->io.avr, p->io.avr->cycle, p);
219 static void avr_timer_reconfigure(avr_timer_t * p)
221 avr_t * avr = p->io.avr;
223 avr_timer_wgm_t zero={0};
226 p->comp[AVR_TIMER_COMPA].comp_cycles = 0;
227 p->comp[AVR_TIMER_COMPB].comp_cycles = 0;
228 p->comp[AVR_TIMER_COMPC].comp_cycles = 0;
231 avr_cycle_timer_cancel(avr, avr_timer_tov, p);
232 avr_cycle_timer_cancel(avr, avr_timer_compa, p);
233 avr_cycle_timer_cancel(avr, avr_timer_compb, p);
234 avr_cycle_timer_cancel(avr, avr_timer_compc, p);
236 long clock = avr->frequency;
238 // only can exists on "asynchronous" 8 bits timers
239 if (avr_regbit_get(avr, p->as2))
242 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
244 printf("%s-%c clock turned off\n", __FUNCTION__, p->name);
248 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
249 uint8_t cs_div = p->cs_div[cs];
250 uint32_t f = clock >> cs_div;
252 p->mode = p->wgm_op[mode];
253 //printf("%s-%c clock %d, div %d(/%d) = %d ; mode %d\n", __FUNCTION__, p->name, clock, cs, 1 << cs_div, f, mode);
254 switch (p->mode.kind) {
255 case avr_timer_wgm_normal:
256 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
258 case avr_timer_wgm_ctc: {
259 avr_timer_configure(p, f, _timer_get_ocr(p, AVR_TIMER_COMPA));
261 case avr_timer_wgm_pwm: {
262 uint16_t top = p->mode.top == avr_timer_wgm_reg_ocra ? _timer_get_ocr(p, AVR_TIMER_COMPA) : _timer_get_icr(p);
263 avr_timer_configure(p, f, top);
265 case avr_timer_wgm_fast_pwm:
266 avr_timer_configure(p, f, (1 << p->mode.size) - 1);
269 printf("%s-%c unsupported timer mode wgm=%d (%d)\n", __FUNCTION__, p->name, mode, p->mode.kind);
273 static void avr_timer_write_ocr(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
275 avr_timer_t * p = (avr_timer_t *)param;
276 avr_core_watch_write(avr, addr, v);
278 switch (p->mode.kind) {
279 case avr_timer_wgm_normal:
280 avr_timer_reconfigure(p);
282 case avr_timer_wgm_ctc:
283 avr_timer_reconfigure(p);
285 case avr_timer_wgm_pwm:
286 if (p->mode.top != avr_timer_wgm_reg_ocra) {
287 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
288 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
291 case avr_timer_wgm_fast_pwm:
292 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM0, _timer_get_ocr(p, AVR_TIMER_COMPA));
293 avr_raise_irq(p->io.irq + TIMER_IRQ_OUT_PWM1, _timer_get_ocr(p, AVR_TIMER_COMPB));
296 printf("%s-%c mode %d UNSUPPORTED\n", __FUNCTION__, p->name, p->mode.kind);
297 avr_timer_reconfigure(p);
302 static void avr_timer_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
304 avr_timer_t * p = (avr_timer_t *)param;
306 uint8_t as2 = avr_regbit_get(avr, p->as2);
307 uint8_t cs = avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs));
308 uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
310 avr_core_watch_write(avr, addr, v);
312 // only reconfigure the timer if "relevant" bits have changed
313 // this prevent the timer reset when changing the edge detector
314 // or other minor bits
315 if (avr_regbit_get_array(avr, p->cs, ARRAY_SIZE(p->cs)) != cs ||
316 avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm)) != mode ||
317 avr_regbit_get(avr, p->as2) != as2) {
318 avr_timer_reconfigure(p);
323 * write to the TIFR register. Watch for code that writes "1" to clear
324 * pending interrupts.
326 static void avr_timer_write_pending(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
328 avr_timer_t * p = (avr_timer_t *)param;
329 // save old bits values
330 uint8_t ov = avr_regbit_get(avr, p->overflow.raised);
331 uint8_t ic = avr_regbit_get(avr, p->icr.raised);
332 uint8_t cp[AVR_TIMER_COMP_COUNT];
334 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
335 cp[compi] = avr_regbit_get(avr, p->comp[compi].interrupt.raised);
338 avr_core_watch_write(avr, addr, v);
340 // clear any interrupts & flags
341 avr_clear_interrupt_if(avr, &p->overflow, ov);
342 avr_clear_interrupt_if(avr, &p->icr, ic);
344 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++)
345 avr_clear_interrupt_if(avr, &p->comp[compi].interrupt, cp[compi]);
348 static void avr_timer_irq_icp(struct avr_irq_t * irq, uint32_t value, void * param)
350 avr_timer_t * p = (avr_timer_t *)param;
351 avr_t * avr = p->io.avr;
353 // input capture disabled when ICR is used as top
354 if (p->mode.top == avr_timer_wgm_reg_icr)
357 if (avr_regbit_get(avr, p->ices)) { // rising edge
358 if (!irq->value && value)
360 } else { // default, falling edge
361 if (irq->value && !value)
366 // get current TCNT, copy it to ICR, and raise interrupt
367 uint16_t tcnt = _avr_timer_get_current_tcnt(p);
368 avr->data[p->r_icr] = tcnt;
370 avr->data[p->r_icrh] = tcnt >> 8;
371 avr_raise_interrupt(avr, &p->icr);
374 static void avr_timer_reset(avr_io_t * port)
376 avr_timer_t * p = (avr_timer_t *)port;
377 avr_cycle_timer_cancel(p->io.avr, avr_timer_tov, p);
378 avr_cycle_timer_cancel(p->io.avr, avr_timer_compa, p);
379 avr_cycle_timer_cancel(p->io.avr, avr_timer_compb, p);
380 avr_cycle_timer_cancel(p->io.avr, avr_timer_compc, p);
382 // check to see if the comparators have a pin output. If they do,
383 // (try) to get the ioport corresponding IRQ and connect them
384 // they will automagically be triggered when the comparator raises
386 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
387 p->comp[compi].comp_cycles = 0;
389 avr_ioport_getirq_t req = {
390 .bit = p->comp[compi].com_pin
392 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
394 // printf("%s-%c COMP%c Connecting PIN IRQ %d\n", __FUNCTION__, p->name, 'A'+compi, req.irq[0]->irq);
395 avr_connect_irq(&port->irq[TIMER_IRQ_OUT_COMP + compi], req.irq[0]);
398 avr_ioport_getirq_t req = {
401 if (avr_ioctl(port->avr, AVR_IOCTL_IOPORT_GETIRQ_REGBIT, &req) > 0) {
402 // cool, got an IRQ for the input capture pin
403 // printf("%s-%c ICP Connecting PIN IRQ %d\n", __FUNCTION__, p->name, req.irq[0]->irq);
404 avr_irq_register_notify(req.irq[0], avr_timer_irq_icp, p);
409 static const char * irq_names[TIMER_IRQ_COUNT] = {
410 [TIMER_IRQ_OUT_PWM0] = "8>pwm0",
411 [TIMER_IRQ_OUT_PWM1] = "8>pwm1",
412 [TIMER_IRQ_OUT_COMP + 0] = ">compa",
413 [TIMER_IRQ_OUT_COMP + 1] = ">compb",
414 [TIMER_IRQ_OUT_COMP + 2] = ">compc",
417 static avr_io_t _io = {
419 .reset = avr_timer_reset,
420 .irq_names = irq_names,
423 void avr_timer_init(avr_t * avr, avr_timer_t * p)
427 avr_register_io(avr, &p->io);
428 avr_register_vector(avr, &p->overflow);
429 avr_register_vector(avr, &p->icr);
431 // allocate this module's IRQ
432 avr_io_setirqs(&p->io, AVR_IOCTL_TIMER_GETIRQ(p->name), TIMER_IRQ_COUNT, NULL);
434 // marking IRQs as "filtered" means they don't propagate if the
435 // new value raised is the same as the last one.. in the case of the
436 // pwm value it makes sense not to bother.
437 p->io.irq[TIMER_IRQ_OUT_PWM0].flags |= IRQ_FLAG_FILTERED;
438 p->io.irq[TIMER_IRQ_OUT_PWM1].flags |= IRQ_FLAG_FILTERED;
440 if (p->wgm[0].reg) // these are not present on older AVRs
441 avr_register_io_write(avr, p->wgm[0].reg, avr_timer_write, p);
442 avr_register_io_write(avr, p->cs[0].reg, avr_timer_write, p);
444 // this assumes all the "pending" interrupt bits are in the same
445 // register. Might not be true on all devices ?
446 avr_register_io_write(avr, p->overflow.raised.reg, avr_timer_write_pending, p);
449 * Even if the timer is 16 bits, we don't care to have watches on the
450 * high bytes because the datasheet says that the low address is always
453 for (int compi = 0; compi < AVR_TIMER_COMP_COUNT; compi++) {
454 avr_register_vector(avr, &p->comp[compi].interrupt);
456 if (p->comp[compi].r_ocr) // not all timers have all comparators
457 avr_register_io_write(avr, p->comp[compi].r_ocr, avr_timer_write_ocr, p);
459 avr_register_io_write(avr, p->r_tcnt, avr_timer_tcnt_write, p);
460 avr_register_io_read(avr, p->r_tcnt, avr_timer_tcnt_read, p);