5 Right now just handle "write" to the serial port at any speed
6 and printf to the console when '\n' is written.
8 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
10 This file is part of simavr.
12 simavr is free software: you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation, either version 3 of the License, or
15 (at your option) any later version.
17 simavr is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with simavr. If not, see <http://www.gnu.org/licenses/>.
31 DEFINE_FIFO(uint8_t, uart_fifo, 128);
33 static avr_cycle_count_t avr_uart_txc_raise(struct avr_t * avr, avr_cycle_count_t when, void * param)
35 avr_uart_t * p = (avr_uart_t *)param;
36 if (avr_regbit_get(avr, p->txen)) {
37 // if the interrupts are not used, still raised the UDRE and TXC flaga
38 avr_raise_interrupt(avr, &p->udrc);
39 avr_raise_interrupt(avr, &p->txc);
44 static avr_cycle_count_t avr_uart_rxc_raise(struct avr_t * avr, avr_cycle_count_t when, void * param)
46 avr_uart_t * p = (avr_uart_t *)param;
47 if (avr_regbit_get(avr, p->rxen))
48 avr_raise_interrupt(avr, &p->rxc);
52 static uint8_t avr_uart_rxc_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
54 avr_uart_t * p = (avr_uart_t *)param;
55 uint8_t v = avr_core_watch_read(avr, addr);
58 // if RX is enabled, and there is nothing to read, and
59 // the AVR core is reading this register, it's probably
60 // to pool the RXC TXC flag and spinloop
61 // so here we introduce a usleep to make it a bit lighter
62 // on CPU and let data arrive
64 uint8_t ri = !avr_regbit_get(avr, p->rxen) || !avr_regbit_get(avr, p->rxc.raised);
65 uint8_t ti = !avr_regbit_get(avr, p->txen) || !avr_regbit_get(avr, p->txc.raised);
67 if (p->flags & AVR_UART_FLAG_POOL_SLEEP) {
72 // if reception is idle and the fifo is empty, tell whomever there is room
73 if (avr_regbit_get(avr, p->rxen) && uart_fifo_isempty(&p->input))
74 avr_raise_irq(p->io.irq + UART_IRQ_OUT_XON, 1);
79 static uint8_t avr_uart_read(struct avr_t * avr, avr_io_addr_t addr, void * param)
81 avr_uart_t * p = (avr_uart_t *)param;
83 if (!avr_regbit_get(avr, p->rxen)) {
85 // made to trigger potential watchpoints
86 avr_core_watch_read(avr, addr);
89 uint8_t v = uart_fifo_read(&p->input);
92 // made to trigger potential watchpoints
93 v = avr_core_watch_read(avr, addr);
95 if (!uart_fifo_isempty(&p->input))
96 avr_cycle_timer_register_usec(avr, 100, avr_uart_rxc_raise, p); // should be uart speed dependent
101 static void avr_uart_baud_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
103 avr_uart_t * p = (avr_uart_t *)param;
104 avr_core_watch_write(avr, addr, v);
105 uint32_t val = avr->data[p->r_ubrrl] | (avr->data[p->r_ubrrh] << 8);
106 uint32_t baud = avr->frequency / (val+1);
107 if (avr_regbit_get(avr, p->u2x))
111 printf("UART-%c configured to %04x = %d baud\n", p->name, val, baud);
114 static void avr_uart_write(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
116 avr_uart_t * p = (avr_uart_t *)param;
118 if (addr == p->r_udr) {
119 avr_core_watch_write(avr, addr, v);
121 avr_regbit_clear(avr, p->udrc.raised);
122 avr_cycle_timer_register_usec(avr, 100, avr_uart_txc_raise, p); // should be uart speed dependent
124 static char buf[128];
126 buf[l++] = v < ' ' ? '.' : v;
128 if (v == '\n' || l == 127) {
130 printf("\e[32m%s\e[0m\n", buf);
132 // printf("UDR%c(%02x) = %02x\n", p->name, addr, v);
133 // tell other modules we are "outputing" a byte
134 if (avr_regbit_get(avr, p->txen))
135 avr_raise_irq(p->io.irq + UART_IRQ_OUTPUT, v);
137 // get the bits before the write
138 uint8_t udre = avr_regbit_get(avr, p->udrc.raised);
139 uint8_t txc = avr_regbit_get(avr, p->txc.raised);
141 avr_core_watch_write(avr, addr, v);
143 // if writing one to a one, clear bit
144 if (udre && avr_regbit_get(avr, p->udrc.raised))
145 avr_regbit_clear(avr, p->udrc.raised);
146 if (txc && avr_regbit_get(avr, p->txc.raised))
147 avr_regbit_clear(avr, p->txc.raised);
151 static void avr_uart_irq_input(struct avr_irq_t * irq, uint32_t value, void * param)
153 avr_uart_t * p = (avr_uart_t *)param;
154 avr_t * avr = p->io.avr;
156 // check to see fi receiver is enabled
157 if (!avr_regbit_get(avr, p->rxen))
160 if (uart_fifo_isempty(&p->input))
161 avr_cycle_timer_register_usec(avr, 100, avr_uart_rxc_raise, p); // should be uart speed dependent
162 uart_fifo_write(&p->input, value); // add to fifo
164 if (uart_fifo_isfull(&p->input))
165 avr_raise_irq(p->io.irq + UART_IRQ_OUT_XOFF, 1);
169 void avr_uart_reset(struct avr_io_t *io)
171 avr_uart_t * p = (avr_uart_t *)io;
172 avr_t * avr = p->io.avr;
173 avr_regbit_set(avr, p->udrc.raised);
174 avr_irq_register_notify(p->io.irq + UART_IRQ_INPUT, avr_uart_irq_input, p);
175 avr_cycle_timer_cancel(avr, avr_uart_rxc_raise, p);
176 avr_cycle_timer_cancel(avr, avr_uart_txc_raise, p);
177 uart_fifo_reset(&p->input);
179 // DEBUG allow printf without fidding with enabling the uart
180 avr_regbit_set(avr, p->txen);
184 #define AVR_IOCTL_UART_SET_FLAGS(_name) AVR_IOCTL_DEF('u','a','s',(_name))
185 #define AVR_IOCTL_UART_GET_FLAGS(_name) AVR_IOCTL_DEF('u','a','g',(_name))
187 static int avr_uart_ioctl(struct avr_io_t * port, uint32_t ctl, void * io_param)
189 avr_uart_t * p = (avr_uart_t *)port;
195 if (ctl == AVR_IOCTL_UART_SET_FLAGS(p->name)) {
196 p->flags = *(uint32_t*)io_param;
199 if (ctl == AVR_IOCTL_UART_GET_FLAGS(p->name)) {
200 *(uint32_t*)io_param = p->flags;
208 static avr_io_t _io = {
210 .reset = avr_uart_reset,
211 .ioctl = avr_uart_ioctl,
214 void avr_uart_init(avr_t * avr, avr_uart_t * p)
218 // printf("%s UART%c UDR=%02x\n", __FUNCTION__, p->name, p->r_udr);
220 // allocate this module's IRQ
221 p->io.irq_count = UART_IRQ_COUNT;
222 p->io.irq = avr_alloc_irq(0, p->io.irq_count);
223 p->io.irq_ioctl_get = AVR_IOCTL_UART_GETIRQ(p->name);
225 p->flags = AVR_UART_FLAG_POOL_SLEEP;
227 avr_register_io(avr, &p->io);
228 avr_register_vector(avr, &p->rxc);
229 avr_register_vector(avr, &p->txc);
230 avr_register_vector(avr, &p->udrc);
232 avr_register_io_write(avr, p->r_udr, avr_uart_write, p);
233 avr_register_io_read(avr, p->r_udr, avr_uart_read, p);
234 // monitor code that reads the rxc flag, and delay it a bit
235 avr_register_io_read(avr, p->rxc.raised.reg, avr_uart_rxc_read, p);
237 avr_register_io_write(avr, p->r_ucsra, avr_uart_write, p);
238 avr_register_io_write(avr, p->r_ubrrl, avr_uart_baud_write, p);