4 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
27 typedef uint64_t avr_cycle_count_t;
28 typedef uint16_t avr_io_addr_t;
31 typedef uint8_t (*avr_io_read_t)(struct avr_t * avr, avr_io_addr_t addr, void * param);
32 typedef void (*avr_io_write_t)(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param);
33 typedef avr_cycle_count_t (*avr_cycle_timer_t)(struct avr_t * avr, avr_cycle_count_t when, void * param);
37 S_C = 0,S_Z,S_N,S_V,S_S,S_H,S_T,S_I,
39 // 16 bits register pairs
40 R_XL = 0x1a, R_XH,R_YL,R_YH,R_ZL,R_ZH,
42 R_SPL = 32+0x3d, R_SPH,
46 // maximum number of IO registers, on normal AVRs
47 MAX_IOs = 256 - 32, // minus 32 GP registers
50 #define AVR_DATA_TO_IO(v) ((v) - 32)
51 #define AVR_IO_TO_DATA(v) ((v) + 32)
57 cpu_Limbo = 0, // before initialization is finished
58 cpu_Stopped, // all is stopped, timers included
60 cpu_Running, // we're free running
62 cpu_Sleeping, // we're now sleeping until an interrupt
64 cpu_Step, // run ONE instruction, then...
65 cpu_StepDone, // tell gdb it's all OK, and give it registers
69 * Main AVR instance. Some of these fields are set by the AVR "Core" definition files
70 * the rest is runtime data (as little as possible)
72 typedef struct avr_t {
73 const char * mmcu; // name of the AVR
74 // these are filled by sim_core_declare from constants in /usr/lib/avr/include/avr/io*.h
82 // filled by the ELF data, this allow tracking of invalid jumps
85 int state; // stopped, running, sleeping
86 uint32_t frequency; // frequency we are running at
88 // cycles gets incremented when sleeping and when running; it corresponds
89 // not only to "cycles that runs" but also "cycles that might have run"
91 avr_cycle_count_t cycle; // current cycle
93 // called at init time
94 void (*init)(struct avr_t * avr);
95 // called at reset time
96 void (*reset)(struct avr_t * avr);
98 // Mirror of the SREG register, to facilitate the access to bits
99 // in the opcode decoder.
100 // This array is re-synthetized back/forth when SREG changes
102 uint8_t i_shadow; // used to detect edges on I flag
106 * Note that the PC is representing /bytes/ while the AVR value is
107 * assumed to be "words". This is in line with what GDB does...
108 * this is why you will see >>1 and <<1 in the decoder to handle jumps.
109 * It CAN be a little confusing, so concentrate, young grasshopper.
114 * callback when specific IO registers are read/written.
115 * There is one drawback here, there is in way of knowing what is the
116 * "beginning of useful sram" on a core, so there is no way to deduce
117 * what is the maximum IO register for a core, and thus, we can't
118 * allocate this table dynamically.
119 * If you wanted to emulate the BIG AVRs, and XMegas, this would need
123 struct avr_irq_t * irq; // optional, used only if asked for with avr_iomem_getirq()
134 // flash memory (initialized to 0xff, and code loaded into it)
136 // this is the general purpose registers, IO registers, and SRAM
139 // queue of io modules
140 struct avr_io_t *io_port;
142 // cycle timers are callbacks that will be called when "when" cycle is reached
143 // the bitmap allows quick knowledge of whether there is anything to call
144 // these timers are one shots, then get cleared if the timer function returns zero,
145 // they get reset if the callback function returns a new cycle number
146 uint32_t cycle_timer_map;
148 avr_cycle_count_t when;
149 avr_cycle_timer_t timer;
153 // interrupt vectors, and their enable/clear registers
154 struct avr_int_vector_t * vector[64];
155 uint8_t pending_wait; // number of cycles to wait for pending
156 uint32_t pending[2]; // pending interrupts
158 // DEBUG ONLY -- value ignored if CONFIG_SIMAVR_TRACE = 0
161 #if CONFIG_SIMAVR_TRACE
162 struct avr_symbol_t ** codeline;
165 * this keeps track of "jumps" ie, call,jmp,ret,reti and so on
166 * allows dumping of a meaningful data even if the stack is
169 #define OLD_PC_SIZE 32
173 } old[OLD_PC_SIZE]; // catches reset..
177 #define STACK_FRAME_SIZE 32
178 // this records the call/ret pairs, to try to catch
179 // code that munches the stack -under- their own frame
183 } stack_frame[STACK_FRAME_SIZE];
184 int stack_frame_index;
188 // keeps track of which registers gets touched by instructions
189 // reset before each new instructions. Allows meaningful traces
190 uint32_t touched[256 / 32]; // debug
193 // VALUE CHANGE DUMP file (waveforms)
194 // this is the VCD file that gets allocated if the
195 // firmware that is loaded explicitly asks for a trace
196 // to be generated, and allocates it's own symbols
197 // using AVR_MMCU_TAG_VCD_TRACE (see avr_mcu_section.h)
198 struct avr_vcd_t * vcd;
200 // gdb hooking structure. Only present when gdb server is active
201 struct avr_gdb_t * gdb;
203 // if non-zero, the gdb server will be started when the core
204 // crashed even if not activated at startup
205 // if zero, the simulator will just exit() in case of a crash
210 // this is a static constructor for each of the AVR devices
211 typedef struct avr_kind_t {
212 const char * names[4]; // name aliases
216 // a symbol loaded from the .elf file
217 typedef struct avr_symbol_t {
222 // locate the maker for mcu "name" and allocates a new avr instance
223 avr_t * avr_make_mcu_by_name(const char *name);
224 // initializes a new AVR instance. Will call the IO registers init(), and then reset()
225 int avr_init(avr_t * avr);
226 // resets the AVR, and the IO modules
227 void avr_reset(avr_t * avr);
228 // run one cycle of the AVR, sleep if necessary
229 int avr_run(avr_t * avr);
230 // finish any pending operations
231 void avr_terminate(avr_t * avr);
233 // set an IO register to receive commands from the AVR firmware
234 // it's optional, and uses the ELF tags
235 void avr_set_command_register(avr_t * avr, avr_io_addr_t addr);
236 // load code in the "flash"
237 void avr_loadcode(avr_t * avr, uint8_t * code, uint32_t size, uint32_t address);
241 * these are accessors for avr->data but allows watchpoints to be set for gdb
242 * IO modules use that to set values to registers, and the AVR core decoder uses
243 * that to register "public" read by instructions.
245 void avr_core_watch_write(avr_t *avr, uint16_t addr, uint8_t v);
246 uint8_t avr_core_watch_read(avr_t *avr, uint16_t addr);
248 // called when the core has detected a crash somehow.
249 // this might activate gdb server
250 void avr_sadly_crashed(avr_t *avr, uint8_t signal);
253 #include "sim_regbit.h"
254 #include "sim_interrupts.h"
256 #include "sim_cycle_timers.h"
258 #endif /*__SIM_AVR_H__*/