4 Copyright 2008-2012 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
30 #include "sim_cycle_timers.h"
33 typedef uint8_t (*avr_io_read_t)(struct avr_t * avr, avr_io_addr_t addr, void * param);
34 typedef void (*avr_io_write_t)(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param);
38 S_C = 0,S_Z,S_N,S_V,S_S,S_H,S_T,S_I,
40 // 16 bits register pairs
41 R_XL = 0x1a, R_XH,R_YL,R_YH,R_ZL,R_ZH,
43 R_SPL = 32+0x3d, R_SPH,
47 // maximum number of IO registers, on normal AVRs
48 MAX_IOs = 256 - 32, // minus 32 GP registers
51 #define AVR_DATA_TO_IO(v) ((v) - 32)
52 #define AVR_IO_TO_DATA(v) ((v) + 32)
58 cpu_Limbo = 0, // before initialization is finished
59 cpu_Stopped, // all is stopped, timers included
61 cpu_Running, // we're free running
63 cpu_Sleeping, // we're now sleeping until an interrupt
65 cpu_Step, // run ONE instruction, then...
66 cpu_StepDone, // tell gdb it's all OK, and give it registers
67 cpu_Done, // avr software stopped gracefully
68 cpu_Crashed, // avr software crashed (watchdog fired)
71 // this is only ever used if CONFIG_SIMAVR_TRACE is defined
72 struct avr_trace_data_t {
73 struct avr_symbol_t ** codeline;
76 * this keeps track of "jumps" ie, call,jmp,ret,reti and so on
77 * allows dumping of a meaningful data even if the stack is
80 #define OLD_PC_SIZE 32
84 } old[OLD_PC_SIZE]; // catches reset..
88 #define STACK_FRAME_SIZE 32
89 // this records the call/ret pairs, to try to catch
90 // code that munches the stack -under- their own frame
94 } stack_frame[STACK_FRAME_SIZE];
95 int stack_frame_index;
99 // keeps track of which registers gets touched by instructions
100 // reset before each new instructions. Allows meaningful traces
101 uint32_t touched[256 / 32]; // debug
105 * Main AVR instance. Some of these fields are set by the AVR "Core" definition files
106 * the rest is runtime data (as little as possible)
108 typedef struct avr_t {
109 const char * mmcu; // name of the AVR
110 // these are filled by sim_core_declare from constants in /usr/lib/avr/include/avr/io*.h
115 uint8_t signature[3];
117 avr_io_addr_t rampz; // optional, only for ELPM/SPM on >64Kb cores
118 avr_io_addr_t eind; // optional, only for EIJMP/EICALL on >64Kb cores
120 // filled by the ELF data, this allow tracking of invalid jumps
123 int state; // stopped, running, sleeping
124 uint32_t frequency; // frequency we are running at
125 // mostly used by the ADC for now
126 uint32_t vcc,avcc,aref; // (optional) voltages in millivolts
128 // cycles gets incremented when sleeping and when running; it corresponds
129 // not only to "cycles that runs" but also "cycles that might have run"
131 avr_cycle_count_t cycle; // current cycle
133 // called at init time
134 void (*init)(struct avr_t * avr);
135 // called at init time (for special purposes like using a memory mapped file as flash see: simduino)
136 void (*special_init)(struct avr_t * avr);
137 // called at termination time ( to clean special initalizations)
138 void (*special_deinit)(struct avr_t * avr);
139 // called at reset time
140 void (*reset)(struct avr_t * avr);
143 * Default AVR core run function.
144 * Two modes are available, a "raw" run that goes as fast as
145 * it can, and a "gdb" mode that also watchouts for gdb events
146 * and is a little bit slower.
148 void (*run)(struct avr_t * avr);
151 * Sleep default behaviour.
152 * In "raw" mode, it calls usleep, in gdb mode, it waits
153 * for howLong for gdb command on it's sockets.
155 void (*sleep)(struct avr_t * avr, avr_cycle_count_t howLong);
158 * Every IRQs will be stored in this pool. It is not
159 * mandatory (yet) but will allow listing IRQs and their connections
161 avr_irq_pool_t irq_pool;
163 // Mirror of the SREG register, to facilitate the access to bits
164 // in the opcode decoder.
165 // This array is re-synthetized back/forth when SREG changes
167 uint8_t i_shadow; // used to detect edges on I flag
171 * Note that the PC is representing /bytes/ while the AVR value is
172 * assumed to be "words". This is in line with what GDB does...
173 * this is why you will see >>1 and <<1 in the decoder to handle jumps.
174 * It CAN be a little confusing, so concentrate, young grasshopper.
179 * callback when specific IO registers are read/written.
180 * There is one drawback here, there is in way of knowing what is the
181 * "beginning of useful sram" on a core, so there is no way to deduce
182 * what is the maximum IO register for a core, and thus, we can't
183 * allocate this table dynamically.
184 * If you wanted to emulate the BIG AVRs, and XMegas, this would need
188 struct avr_irq_t * irq; // optional, used only if asked for with avr_iomem_getirq()
200 * This block allows sharing of the IO write/read on addresses between
201 * multiple callbacks. In 99% of case it's not needed, however on the tiny*
202 * (tiny85 at last) some registers have bits that are used by different
204 * If this case is detected, a special "dispatch" callback is installed that
205 * will handle this particular case, without impacting the performance of the
206 * other, normal cases...
208 int io_shared_io_count;
217 // flash memory (initialized to 0xff, and code loaded into it)
219 // this is the general purpose registers, IO registers, and SRAM
222 // queue of io modules
223 struct avr_io_t *io_port;
225 avr_cycle_timer_pool_t cycle_timers;
227 // interrupt vectors, and their enable/clear registers
228 struct avr_int_vector_t * vector[64];
229 uint8_t vector_count;
230 uint8_t pending_wait; // number of cycles to wait for pending
231 struct avr_int_vector_t * pending[64]; // needs to be >= vectors and a power of two
232 uint8_t pending_w, pending_r; // fifo cursors
234 // DEBUG ONLY -- value ignored if CONFIG_SIMAVR_TRACE = 0
236 log : 2; // log level, default to 1
238 // Only used if CONFIG_SIMAVR_TRACE is defined
239 struct avr_trace_data_t *trace_data;
241 // VALUE CHANGE DUMP file (waveforms)
242 // this is the VCD file that gets allocated if the
243 // firmware that is loaded explicitly asks for a trace
244 // to be generated, and allocates it's own symbols
245 // using AVR_MMCU_TAG_VCD_TRACE (see avr_mcu_section.h)
246 struct avr_vcd_t * vcd;
248 // gdb hooking structure. Only present when gdb server is active
249 struct avr_gdb_t * gdb;
251 // if non-zero, the gdb server will be started when the core
252 // crashed even if not activated at startup
253 // if zero, the simulator will just exit() in case of a crash
258 // this is a static constructor for each of the AVR devices
259 typedef struct avr_kind_t {
260 const char * names[4]; // name aliases
264 // a symbol loaded from the .elf file
265 typedef struct avr_symbol_t {
270 // locate the maker for mcu "name" and allocates a new avr instance
271 avr_t * avr_make_mcu_by_name(const char *name);
272 // initializes a new AVR instance. Will call the IO registers init(), and then reset()
273 int avr_init(avr_t * avr);
274 // resets the AVR, and the IO modules
275 void avr_reset(avr_t * avr);
276 // run one cycle of the AVR, sleep if necessary
277 int avr_run(avr_t * avr);
278 // finish any pending operations
279 void avr_terminate(avr_t * avr);
281 // set an IO register to receive commands from the AVR firmware
282 // it's optional, and uses the ELF tags
283 void avr_set_command_register(avr_t * avr, avr_io_addr_t addr);
285 // specify the "console register" -- output sent to this register
286 // is printed on the simulator console, without using a UART
287 void avr_set_console_register(avr_t * avr, avr_io_addr_t addr);
289 // load code in the "flash"
290 void avr_loadcode(avr_t * avr, uint8_t * code, uint32_t size, uint32_t address);
294 * these are accessors for avr->data but allows watchpoints to be set for gdb
295 * IO modules use that to set values to registers, and the AVR core decoder uses
296 * that to register "public" read by instructions.
298 void avr_core_watch_write(avr_t *avr, uint16_t addr, uint8_t v);
299 uint8_t avr_core_watch_read(avr_t *avr, uint16_t addr);
301 // called when the core has detected a crash somehow.
302 // this might activate gdb server
303 void avr_sadly_crashed(avr_t *avr, uint8_t signal);
307 * These are callbacks for the two 'main' bahaviour in simavr
309 void avr_callback_sleep_gdb(avr_t * avr, avr_cycle_count_t howLong);
310 void avr_callback_run_gdb(avr_t * avr);
311 void avr_callback_sleep_raw(avr_t * avr, avr_cycle_count_t howLong);
312 void avr_callback_run_raw(avr_t * avr);
319 #include "sim_regbit.h"
320 #include "sim_interrupts.h"
321 #include "sim_cycle_timers.h"
323 #endif /*__SIM_AVR_H__*/