4 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
33 typedef uint64_t avr_cycle_count_t;
34 typedef uint16_t avr_io_addr_t;
37 typedef uint8_t (*avr_io_read_t)(struct avr_t * avr, avr_io_addr_t addr, void * param);
38 typedef void (*avr_io_write_t)(struct avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param);
39 typedef avr_cycle_count_t (*avr_cycle_timer_t)(struct avr_t * avr, avr_cycle_count_t when, void * param);
43 S_C = 0,S_Z,S_N,S_V,S_S,S_H,S_T,S_I,
45 // 16 bits register pairs
46 R_XL = 0x1a, R_XH,R_YL,R_YH,R_ZL,R_ZH,
48 R_SPL = 32+0x3d, R_SPH,
52 // maximum number of IO registers, on normal AVRs
53 MAX_IOs = 256 - 32, // minus 32 GP registers
56 #define AVR_DATA_TO_IO(v) ((v) - 32)
57 #define AVR_IO_TO_DATA(v) ((v) + 32)
63 cpu_Limbo = 0, // before initialization is finished
64 cpu_Stopped, // all is stopped, timers included
66 cpu_Running, // we're free running
68 cpu_Sleeping, // we're now sleeping until an interrupt
70 cpu_Step, // run ONE instruction, then...
71 cpu_StepDone, // tell gdb it's all OK, and give it registers
75 * Main AVR instance. Some of these fields are set by the AVR "Core" definition files
76 * the rest is runtime data (as little as possible)
78 typedef struct avr_t {
79 const char * mmcu; // name of the AVR
80 // these are filled by sim_core_declare from constants in /usr/lib/avr/include/avr/io*.h
87 avr_io_addr_t rampz; // optional, only for ELPM/SPM on >64Kb cores
88 avr_io_addr_t eind; // optional, only for EIJMP/EICALL on >64Kb cores
90 // filled by the ELF data, this allow tracking of invalid jumps
93 int state; // stopped, running, sleeping
94 uint32_t frequency; // frequency we are running at
95 // mostly used by the ADC for now
96 uint32_t vcc,avcc,aref; // (optional) voltages in millivolts
98 // cycles gets incremented when sleeping and when running; it corresponds
99 // not only to "cycles that runs" but also "cycles that might have run"
101 avr_cycle_count_t cycle; // current cycle
103 // called at init time
104 void (*init)(struct avr_t * avr);
105 // called at init time (for special purposes like using a memory mapped file as flash see: simduino)
106 void (*special_init)(struct avr_t * avr);
107 // called at termination time ( to clean special initalizations)
108 void (*special_deinit)(struct avr_t * avr);
109 // called at reset time
110 void (*reset)(struct avr_t * avr);
113 * Default AVR core run function.
114 * Two modes are available, a "raw" run that goes as fast as
115 * it can, and a "gdb" mode that also watchouts for gdb events
116 * and is a little bit slower.
118 void (*run)(struct avr_t * avr);
121 * Sleep default behaviour.
122 * In "raw" mode, it calls usleep, in gdb mode, it waits
123 * for howLong for gdb command on it's sockets.
125 void (*sleep)(struct avr_t * avr, avr_cycle_count_t howLong);
128 * Every IRQs will be stored in this pool. It is not
129 * mandatory (yet) but will allow listing IRQs and their connections
131 avr_irq_pool_t irq_pool;
133 // Mirror of the SREG register, to facilitate the access to bits
134 // in the opcode decoder.
135 // This array is re-synthetized back/forth when SREG changes
137 uint8_t i_shadow; // used to detect edges on I flag
141 * Note that the PC is representing /bytes/ while the AVR value is
142 * assumed to be "words". This is in line with what GDB does...
143 * this is why you will see >>1 and <<1 in the decoder to handle jumps.
144 * It CAN be a little confusing, so concentrate, young grasshopper.
149 * callback when specific IO registers are read/written.
150 * There is one drawback here, there is in way of knowing what is the
151 * "beginning of useful sram" on a core, so there is no way to deduce
152 * what is the maximum IO register for a core, and thus, we can't
153 * allocate this table dynamically.
154 * If you wanted to emulate the BIG AVRs, and XMegas, this would need
158 struct avr_irq_t * irq; // optional, used only if asked for with avr_iomem_getirq()
170 * This block allows sharing of the IO write/read on addresses between
171 * multiple callbacks. In 99% of case it's not needed, however on the tiny*
172 * (tiny85 at last) some registers have bits that are used by different
174 * If this case is detected, a special "dispatch" callback is installed that
175 * will handle this particular case, without impacting the performance of the
176 * other, normal cases...
178 int io_shared_io_count;
187 // flash memory (initialized to 0xff, and code loaded into it)
189 // this is the general purpose registers, IO registers, and SRAM
192 // queue of io modules
193 struct avr_io_t *io_port;
195 // cycle timers are callbacks that will be called when "when" cycle is reached
196 // the bitmap allows quick knowledge of whether there is anything to call
197 // these timers are one shots, then get cleared if the timer function returns zero,
198 // they get reset if the callback function returns a new cycle number
199 uint32_t cycle_timer_map;
200 avr_cycle_count_t next_cycle_timer;
202 avr_cycle_count_t when;
203 avr_cycle_timer_t timer;
207 // interrupt vectors, and their enable/clear registers
208 struct avr_int_vector_t * vector[64];
209 uint8_t pending_wait; // number of cycles to wait for pending
210 uint32_t pending[2]; // pending interrupts
212 // DEBUG ONLY -- value ignored if CONFIG_SIMAVR_TRACE = 0
215 #if CONFIG_SIMAVR_TRACE
216 struct avr_symbol_t ** codeline;
219 * this keeps track of "jumps" ie, call,jmp,ret,reti and so on
220 * allows dumping of a meaningful data even if the stack is
223 #define OLD_PC_SIZE 32
227 } old[OLD_PC_SIZE]; // catches reset..
231 #define STACK_FRAME_SIZE 32
232 // this records the call/ret pairs, to try to catch
233 // code that munches the stack -under- their own frame
237 } stack_frame[STACK_FRAME_SIZE];
238 int stack_frame_index;
242 // keeps track of which registers gets touched by instructions
243 // reset before each new instructions. Allows meaningful traces
244 uint32_t touched[256 / 32]; // debug
247 // VALUE CHANGE DUMP file (waveforms)
248 // this is the VCD file that gets allocated if the
249 // firmware that is loaded explicitly asks for a trace
250 // to be generated, and allocates it's own symbols
251 // using AVR_MMCU_TAG_VCD_TRACE (see avr_mcu_section.h)
252 struct avr_vcd_t * vcd;
254 // gdb hooking structure. Only present when gdb server is active
255 struct avr_gdb_t * gdb;
257 // if non-zero, the gdb server will be started when the core
258 // crashed even if not activated at startup
259 // if zero, the simulator will just exit() in case of a crash
264 // this is a static constructor for each of the AVR devices
265 typedef struct avr_kind_t {
266 const char * names[4]; // name aliases
270 // a symbol loaded from the .elf file
271 typedef struct avr_symbol_t {
276 // locate the maker for mcu "name" and allocates a new avr instance
277 avr_t * avr_make_mcu_by_name(const char *name);
278 // initializes a new AVR instance. Will call the IO registers init(), and then reset()
279 int avr_init(avr_t * avr);
280 // resets the AVR, and the IO modules
281 void avr_reset(avr_t * avr);
282 // run one cycle of the AVR, sleep if necessary
283 int avr_run(avr_t * avr);
284 // finish any pending operations
285 void avr_terminate(avr_t * avr);
287 // set an IO register to receive commands from the AVR firmware
288 // it's optional, and uses the ELF tags
289 void avr_set_command_register(avr_t * avr, avr_io_addr_t addr);
291 // specify the "console register" -- output sent to this register
292 // is printed on the simulator console, without using a UART
293 void avr_set_console_register(avr_t * avr, avr_io_addr_t addr);
295 // load code in the "flash"
296 void avr_loadcode(avr_t * avr, uint8_t * code, uint32_t size, uint32_t address);
300 * these are accessors for avr->data but allows watchpoints to be set for gdb
301 * IO modules use that to set values to registers, and the AVR core decoder uses
302 * that to register "public" read by instructions.
304 void avr_core_watch_write(avr_t *avr, uint16_t addr, uint8_t v);
305 uint8_t avr_core_watch_read(avr_t *avr, uint16_t addr);
307 // called when the core has detected a crash somehow.
308 // this might activate gdb server
309 void avr_sadly_crashed(avr_t *avr, uint8_t signal);
313 * These are callbacks for the two 'main' bahaviour in simavr
315 void avr_callback_sleep_gdb(avr_t * avr, avr_cycle_count_t howLong);
316 void avr_callback_run_gdb(avr_t * avr);
317 void avr_callback_sleep_raw(avr_t * avr, avr_cycle_count_t howLong);
318 void avr_callback_run_raw(avr_t * avr);
325 #include "sim_regbit.h"
326 #include "sim_interrupts.h"
327 #include "sim_cycle_timers.h"
329 #endif /*__SIM_AVR_H__*/