4 Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
6 This file is part of simavr.
8 simavr is free software: you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation, either version 3 of the License, or
11 (at your option) any later version.
13 simavr is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with simavr. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef __SIM_REGBIT_H__
23 #define __SIM_REGBIT_H__
31 #define ARRAY_SIZE(_aa) (sizeof(_aa) / sizeof((_aa)[0]))
34 * this 'structure' is a packed representation of an IO register 'bit'
35 * (or consecutive bits). This allows a way to set/get/clear them.
36 * gcc is happy passing these as register value, so you don't need to
37 * use a pointer when passing them along to functions.
39 * 9 bits ought to be enough, as it's the maximum I've seen (atmega2560)
41 typedef struct avr_regbit_t {
42 unsigned long reg : 9, bit : 3, mask : 8;
46 * These accessors are inlined and are used to perform the operations on
47 * avr_regbit_t definitions. This is the "official" way to access bits into registers
48 * The small footprint costs brings much better versatility for functions/bits that are
49 * not always defined in the same place on real AVR cores
52 * set/get/clear io register bits in one operation
54 static inline uint8_t avr_regbit_set(avr_t * avr, avr_regbit_t rb)
59 uint8_t m = rb.mask << rb.bit;
60 avr_core_watch_write(avr, a, avr->data[a] | m);
61 return (avr->data[a] >> rb.bit) & rb.mask;
64 static inline uint8_t avr_regbit_setto(avr_t * avr, avr_regbit_t rb, uint8_t v)
69 uint8_t m = rb.mask << rb.bit;
70 avr_core_watch_write(avr, a, (avr->data[a] & ~(m)) | ((v << rb.bit) & m));
71 return (avr->data[a] >> rb.bit) & rb.mask;
74 static inline uint8_t avr_regbit_get(avr_t * avr, avr_regbit_t rb)
79 //uint8_t m = rb.mask << rb.bit;
80 return (avr->data[a] >> rb.bit) & rb.mask;
83 static inline uint8_t avr_regbit_clear(avr_t * avr, avr_regbit_t rb)
86 uint8_t m = rb.mask << rb.bit;
87 avr_core_watch_write(avr, a, avr->data[a] & ~m);
93 * This reads the bits for an array of avr_regbit_t, make up a "byte" with them.
94 * This allows reading bits like CS0, CS1, CS2 etc even if they are not in the same
95 * physical IO register.
97 static inline uint8_t avr_regbit_get_array(avr_t * avr, avr_regbit_t *rb, int count)
101 for (int i = 0; i < count; i++, rb++) if (rb->reg) {
102 uint8_t a = (rb->reg);
103 res |= ((avr->data[a] >> rb->bit) & rb->mask) << i;
108 #define AVR_IO_REGBIT(_io, _bit) { . reg = (_io), .bit = (_bit), .mask = 1 }
109 #define AVR_IO_REGBITS(_io, _bit, _mask) { . reg = (_io), .bit = (_bit), .mask = (_mask) }
115 #endif /* __SIM_REGBIT_H__ */