sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <sound/driver.h>
  37 #include <linux/delay.h>
  38 #include <linux/init.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/pci.h>
  41 #include <linux/slab.h>
  42 #include <linux/vmalloc.h>
  43 #include <linux/mutex.h>
  44
  45
  46 #include <sound/core.h>
  47 #include <sound/emu10k1.h>
  48 #include <linux/firmware.h>
  49 #include "p16v.h"
  50 #include "tina2.h"
  51 #include "p17v.h"
  52
  53
  54 #define HANA_FILENAME "emu/hana.fw"
  55 #define DOCK_FILENAME "emu/audio_dock.fw"
  56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  59
  60 MODULE_FIRMWARE(HANA_FILENAME);
  61 MODULE_FIRMWARE(DOCK_FILENAME);
  62 MODULE_FIRMWARE(EMU1010B_FILENAME);
  63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  64 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  65
  66
  67 /*************************************************************************
  68  * EMU10K1 init / done
  69  *************************************************************************/
  70
  71 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
  72 {
  73         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  74         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  75         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  76         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  77         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  78         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  79         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  80
  81         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  82         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  83         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  84         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  85         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  86         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  87
  88         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  89         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  90         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  91         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  92         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  93         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  94         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  95         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  96
  97         /*** these are last so OFF prevents writing ***/
  98         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
  99         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 100         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 101         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 103
 104         /* Audigy extra stuffs */
 105         if (emu->audigy) {
 106                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 107                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 108                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 111                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 112                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 113         }
 114 }
 115
 116 static unsigned int spi_dac_init[] = {
 117                 0x00ff,
 118                 0x02ff,
 119                 0x0400,
 120                 0x0520,
 121                 0x0600,
 122                 0x08ff,
 123                 0x0aff,
 124                 0x0cff,
 125                 0x0eff,
 126                 0x10ff,
 127                 0x1200,
 128                 0x1400,
 129                 0x1480,
 130                 0x1800,
 131                 0x1aff,
 132                 0x1cff,
 133                 0x1e00,
 134                 0x0530,
 135                 0x0602,
 136                 0x0622,
 137                 0x1400,
 138 };
 139
 140 static unsigned int i2c_adc_init[][2] = {
 141         { 0x17, 0x00 }, /* Reset */
 142         { 0x07, 0x00 }, /* Timeout */
 143         { 0x0b, 0x22 },  /* Interface control */
 144         { 0x0c, 0x22 },  /* Master mode control */
 145         { 0x0d, 0x08 },  /* Powerdown control */
 146         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 147         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 148         { 0x10, 0x7b },  /* ALC Control 1 */
 149         { 0x11, 0x00 },  /* ALC Control 2 */
 150         { 0x12, 0x32 },  /* ALC Control 3 */
 151         { 0x13, 0x00 },  /* Noise gate control */
 152         { 0x14, 0xa6 },  /* Limiter control */
 153         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
 154 };
 155
 156 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 157 {
 158         unsigned int silent_page;
 159         int ch;
 160         u32 tmp;
 161
 162         /* disable audio and lock cache */
 163         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 164              emu->port + HCFG);
 165
 166         /* reset recording buffers */
 167         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 168         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 169         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 170         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 171         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 172         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 173
 174         /* disable channel interrupt */
 175         outl(0, emu->port + INTE);
 176         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 177         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 178         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 179         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 180
 181         if (emu->audigy){
 182                 /* set SPDIF bypass mode */
 183                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 184                 /* enable rear left + rear right AC97 slots */
 185                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 186                                       AC97SLOT_REAR_LEFT);
 187         }
 188
 189         /* init envelope engine */
 190         for (ch = 0; ch < NUM_G; ch++)
 191                 snd_emu10k1_voice_init(emu, ch);
 192
 193         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 194         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 195         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 196
 197         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 198                 /* Hacks for Alice3 to work independent of haP16V driver */
 199                 //Setup SRCMulti_I2S SamplingRate
 200                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 201                 tmp &= 0xfffff1ff;
 202                 tmp |= (0x2<<9);
 203                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 204
 205                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 206                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 207                 /* Setup SRCMulti Input Audio Enable */
 208                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 209                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 210
 211                 /* Enabled Phased (8-channel) P16V playback */
 212                 outl(0x0201, emu->port + HCFG2);
 213                 /* Set playback routing. */
 214                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 215         }
 216         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 217                 /* Hacks for Alice3 to work independent of haP16V driver */
 218                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 219                 //Setup SRCMulti_I2S SamplingRate
 220                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 221                 tmp &= 0xfffff1ff;
 222                 tmp |= (0x2<<9);
 223                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 224
 225                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 226                 outl(0x600000, emu->port + 0x20);
 227                 outl(0x14, emu->port + 0x24);
 228
 229                 /* Setup SRCMulti Input Audio Enable */
 230                 outl(0x7b0000, emu->port + 0x20);
 231                 outl(0xFF000000, emu->port + 0x24);
 232
 233                 /* Setup SPDIF Out Audio Enable */
 234                 /* The Audigy 2 Value has a separate SPDIF out,
 235                  * so no need for a mixer switch
 236                  */
 237                 outl(0x7a0000, emu->port + 0x20);
 238                 outl(0xFF000000, emu->port + 0x24);
 239                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 240                 outl(tmp, emu->port + A_IOCFG);
 241         }
 242         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 243                 int size, n;
 244
 245                 size = ARRAY_SIZE(spi_dac_init);
 246                 for (n = 0; n < size; n++)
 247                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 248
 249                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 250                 /* Enable GPIOs
 251                  * GPIO0: Unknown
 252                  * GPIO1: Speakers-enabled.
 253                  * GPIO2: Unknown
 254                  * GPIO3: Unknown
 255                  * GPIO4: IEC958 Output on.
 256                  * GPIO5: Unknown
 257                  * GPIO6: Unknown
 258                  * GPIO7: Unknown
 259                  */
 260                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 261
 262         }
 263         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 264                 int size, n;
 265
 266                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 267                 tmp = inl(emu->port + A_IOCFG);
 268                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 269                 tmp = inl(emu->port + A_IOCFG);
 270                 size = ARRAY_SIZE(i2c_adc_init);
 271                 for (n = 0; n < size; n++)
 272                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 273                 for (n=0; n < 4; n++) {
 274                         emu->i2c_capture_volume[n][0]= 0xcf;
 275                         emu->i2c_capture_volume[n][1]= 0xcf;
 276                 }
 277
 278         }
 279
 280
 281         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 282         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 283         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 284
 285         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 286         for (ch = 0; ch < NUM_G; ch++) {
 287                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 288                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 289         }
 290
 291         if (emu->card_capabilities->emu1010) {
 292                 outl(HCFG_AUTOMUTE_ASYNC |
 293                         HCFG_EMU32_SLAVE |
 294                         HCFG_AUDIOENABLE, emu->port + HCFG);
 295         /*
 296          *  Hokay, setup HCFG
 297          *   Mute Disable Audio = 0
 298          *   Lock Tank Memory = 1
 299          *   Lock Sound Memory = 0
 300          *   Auto Mute = 1
 301          */
 302         } else if (emu->audigy) {
 303                 if (emu->revision == 4) /* audigy2 */
 304                         outl(HCFG_AUDIOENABLE |
 305                              HCFG_AC3ENABLE_CDSPDIF |
 306                              HCFG_AC3ENABLE_GPSPDIF |
 307                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 308                 else
 309                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 310         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 311          * e.g. card_capabilities->joystick */
 312         } else if (emu->model == 0x20 ||
 313             emu->model == 0xc400 ||
 314             (emu->model == 0x21 && emu->revision < 6))
 315                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 316         else
 317                 // With on-chip joystick
 318                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 319
 320         if (enable_ir) {        /* enable IR for SB Live */
 321                 if (emu->card_capabilities->emu1010) {
 322                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 323                 } else if (emu->card_capabilities->i2c_adc) {
 324                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 325                 } else if (emu->audigy) {
 326                         unsigned int reg = inl(emu->port + A_IOCFG);
 327                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 328                         udelay(500);
 329                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 330                         udelay(100);
 331                         outl(reg, emu->port + A_IOCFG);
 332                 } else {
 333                         unsigned int reg = inl(emu->port + HCFG);
 334                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 335                         udelay(500);
 336                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 337                         udelay(100);
 338                         outl(reg, emu->port + HCFG);
 339                 }
 340         }
 341
 342         if (emu->card_capabilities->emu1010) {
 343                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 344         } else if (emu->card_capabilities->i2c_adc) {
 345                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 346         } else if (emu->audigy) {       /* enable analog output */
 347                 unsigned int reg = inl(emu->port + A_IOCFG);
 348                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 349         }
 350
 351         return 0;
 352 }
 353
 354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 355 {
 356         /*
 357          *  Enable the audio bit
 358          */
 359         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 360
 361         /* Enable analog/digital outs on audigy */
 362         if (emu->card_capabilities->emu1010) {
 363                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 364         } else if (emu->card_capabilities->i2c_adc) {
 365                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 366         } else if (emu->audigy) {
 367                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 368
 369                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 370                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 371                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 372                          * So, sequence is important. */
 373                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 374                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 375                         /* Unmute Analog now. */
 376                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 377                 } else {
 378                         /* Disable routing from AC97 line out to Front speakers */
 379                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 380                 }
 381         }
 382
 383 #if 0
 384         {
 385         unsigned int tmp;
 386         /* FIXME: the following routine disables LiveDrive-II !! */
 387         // TOSLink detection
 388         emu->tos_link = 0;
 389         tmp = inl(emu->port + HCFG);
 390         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 391                 outl(tmp|0x800, emu->port + HCFG);
 392                 udelay(50);
 393                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 394                         emu->tos_link = 1;
 395                         outl(tmp, emu->port + HCFG);
 396                 }
 397         }
 398         }
 399 #endif
 400
 401         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 402 }
 403
 404 int snd_emu10k1_done(struct snd_emu10k1 * emu)
 405 {
 406         int ch;
 407
 408         outl(0, emu->port + INTE);
 409
 410         /*
 411          *  Shutdown the chip
 412          */
 413         for (ch = 0; ch < NUM_G; ch++)
 414                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 415         for (ch = 0; ch < NUM_G; ch++) {
 416                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 417                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 419                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 420         }
 421
 422         /* reset recording buffers */
 423         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 424         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 425         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 427         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 428         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 429         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 430         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 431         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 432         if (emu->audigy)
 433                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 434         else
 435                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 436
 437         /* disable channel interrupt */
 438         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 439         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 440         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 441         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 442
 443         /* disable audio and lock cache */
 444         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 445         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 446
 447         return 0;
 448 }
 449
 450 /*************************************************************************
 451  * ECARD functional implementation
 452  *************************************************************************/
 453
 454 /* In A1 Silicon, these bits are in the HC register */
 455 #define HOOKN_BIT               (1L << 12)
 456 #define HANDN_BIT               (1L << 11)
 457 #define PULSEN_BIT              (1L << 10)
 458
 459 #define EC_GDI1                 (1 << 13)
 460 #define EC_GDI0                 (1 << 14)
 461
 462 #define EC_NUM_CONTROL_BITS     20
 463
 464 #define EC_AC3_DATA_SELN        0x0001L
 465 #define EC_EE_DATA_SEL          0x0002L
 466 #define EC_EE_CNTRL_SELN        0x0004L
 467 #define EC_EECLK                0x0008L
 468 #define EC_EECS                 0x0010L
 469 #define EC_EESDO                0x0020L
 470 #define EC_TRIM_CSN             0x0040L
 471 #define EC_TRIM_SCLK            0x0080L
 472 #define EC_TRIM_SDATA           0x0100L
 473 #define EC_TRIM_MUTEN           0x0200L
 474 #define EC_ADCCAL               0x0400L
 475 #define EC_ADCRSTN              0x0800L
 476 #define EC_DACCAL               0x1000L
 477 #define EC_DACMUTEN             0x2000L
 478 #define EC_LEDN                 0x4000L
 479
 480 #define EC_SPDIF0_SEL_SHIFT     15
 481 #define EC_SPDIF1_SEL_SHIFT     17
 482 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 483 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 484 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 485 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 486 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 487                                          * be incremented any time the EEPROM's
 488                                          * format is changed.  */
 489
 490 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 491
 492 /* Addresses for special values stored in to EEPROM */
 493 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 494 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 495 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 496
 497 #define EC_LAST_PROMFILE_ADDR   0x2f
 498
 499 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 500                                          * can be up to 30 characters in length
 501                                          * and is stored as a NULL-terminated
 502                                          * ASCII string.  Any unused bytes must be
 503                                          * filled with zeros */
 504 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 505
 506
 507 /* Most of this stuff is pretty self-evident.  According to the hardware
 508  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 509  * offset problem.  Weird.
 510  */
 511 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 512                                  EC_TRIM_CSN)
 513
 514
 515 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 516 #define EC_DEFAULT_SPDIF0_SEL   0x0
 517 #define EC_DEFAULT_SPDIF1_SEL   0x4
 518
 519 /**************************************************************************
 520  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 521  *  control latch will is loaded bit-serially by toggling the Modem control
 522  *  lines from function 2 on the E8010.  This function hides these details
 523  *  and presents the illusion that we are actually writing to a distinct
 524  *  register.
 525  */
 526
 527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
 528 {
 529         unsigned short count;
 530         unsigned int data;
 531         unsigned long hc_port;
 532         unsigned int hc_value;
 533
 534         hc_port = emu->port + HCFG;
 535         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 536         outl(hc_value, hc_port);
 537
 538         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 539
 540                 /* Set up the value */
 541                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 542                 value >>= 1;
 543
 544                 outl(hc_value | data, hc_port);
 545
 546                 /* Clock the shift register */
 547                 outl(hc_value | data | HANDN_BIT, hc_port);
 548                 outl(hc_value | data, hc_port);
 549         }
 550
 551         /* Latch the bits */
 552         outl(hc_value | HOOKN_BIT, hc_port);
 553         outl(hc_value, hc_port);
 554 }
 555
 556 /**************************************************************************
 557  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 558  * trim value consists of a 16bit value which is composed of two
 559  * 8 bit gain/trim values, one for the left channel and one for the
 560  * right channel.  The following table maps from the Gain/Attenuation
 561  * value in decibels into the corresponding bit pattern for a single
 562  * channel.
 563  */
 564
 565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
 566                                          unsigned short gain)
 567 {
 568         unsigned int bit;
 569
 570         /* Enable writing to the TRIM registers */
 571         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 572
 573         /* Do it again to insure that we meet hold time requirements */
 574         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 575
 576         for (bit = (1 << 15); bit; bit >>= 1) {
 577                 unsigned int value;
 578
 579                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 580
 581                 if (gain & bit)
 582                         value |= EC_TRIM_SDATA;
 583
 584                 /* Clock the bit */
 585                 snd_emu10k1_ecard_write(emu, value);
 586                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 587                 snd_emu10k1_ecard_write(emu, value);
 588         }
 589
 590         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 591 }
 592
 593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
 594 {
 595         unsigned int hc_value;
 596
 597         /* Set up the initial settings */
 598         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 599                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 600                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 601
 602         /* Step 0: Set the codec type in the hardware control register
 603          * and enable audio output */
 604         hc_value = inl(emu->port + HCFG);
 605         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 606         inl(emu->port + HCFG);
 607
 608         /* Step 1: Turn off the led and deassert TRIM_CS */
 609         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 610
 611         /* Step 2: Calibrate the ADC and DAC */
 612         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 613
 614         /* Step 3: Wait for awhile;   XXX We can't get away with this
 615          * under a real operating system; we'll need to block and wait that
 616          * way. */
 617         snd_emu10k1_wait(emu, 48000);
 618
 619         /* Step 4: Switch off the DAC and ADC calibration.  Note
 620          * That ADC_CAL is actually an inverted signal, so we assert
 621          * it here to stop calibration.  */
 622         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 623
 624         /* Step 4: Switch into run mode */
 625         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 626
 627         /* Step 5: Set the analog input gain */
 628         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 629
 630         return 0;
 631 }
 632
 633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
 634 {
 635         unsigned long special_port;
 636         unsigned int value;
 637
 638         /* Special initialisation routine
 639          * before the rest of the IO-Ports become active.
 640          */
 641         special_port = emu->port + 0x38;
 642         value = inl(special_port);
 643         outl(0x00d00000, special_port);
 644         value = inl(special_port);
 645         outl(0x00d00001, special_port);
 646         value = inl(special_port);
 647         outl(0x00d0005f, special_port);
 648         value = inl(special_port);
 649         outl(0x00d0007f, special_port);
 650         value = inl(special_port);
 651         outl(0x0090007f, special_port);
 652         value = inl(special_port);
 653
 654         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 655         return 0;
 656 }
 657
 658 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
 659 {
 660         int err;
 661         int n, i;
 662         int reg;
 663         int value;
 664         const struct firmware *fw_entry;
 665
 666         if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
 667                 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
 668                 return err;
 669         }
 670         snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
 671 #if 0
 672         if (fw_entry->size != 0x133a4) {
 673                 snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename);
 674                 return -EINVAL;
 675         }
 676 #endif
 677
 678         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 679         /* GPIO7 -> FPGA PGMN
 680          * GPIO6 -> FPGA CCLK
 681          * GPIO5 -> FPGA DIN
 682          * FPGA CONFIG OFF -> FPGA PGMN
 683          */
 684         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 685         udelay(1);
 686         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 687         udelay(100); /* Allow FPGA memory to clean */
 688         for(n = 0; n < fw_entry->size; n++) {
 689                 value=fw_entry->data[n];
 690                 for(i = 0; i < 8; i++) {
 691                         reg = 0x80;
 692                         if (value & 0x1)
 693                                 reg = reg | 0x20;
 694                         value = value >> 1;
 695                         outl(reg, emu->port + A_IOCFG);
 696                         outl(reg | 0x40, emu->port + A_IOCFG);
 697                 }
 698         }
 699         /* After programming, set GPIO bit 4 high again. */
 700         outl(0x10, emu->port + A_IOCFG);
 701
 702
 703         release_firmware(fw_entry);
 704         return 0;
 705 }
 706
 707 int emu1010_firmware_thread(void *data) {
 708         struct snd_emu10k1 * emu = data;
 709         int tmp,tmp2;
 710         int reg;
 711         int err;
 712
 713         for (;;) {
 714                 /* Delay to allow Audio Dock to settle */
 715                 msleep(1000);
 716                 if (kthread_should_stop())
 717                         break;
 718                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
 719                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
 720                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 721                         /* Audio Dock attached */
 722                         /* Return to Audio Dock programming mode */
 723                         snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
 724                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
 725                         if (emu->card_capabilities->emu1010 == 1) {
 726                                 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
 727                                         return err;
 728                                 }
 729                         } else if (emu->card_capabilities->emu1010 == 2) {
 730                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 731                                         return err;
 732                                 }
 733                         } else if (emu->card_capabilities->emu1010 == 3) {
 734                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 735                                         return err;
 736                                 }
 737                         }
 738
 739                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0 );
 740                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
 741                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
 742                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 743                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 744                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
 745                         if ((reg & 0x1f) != 0x15) {
 746                                 /* FPGA failed to be programmed */
 747                                 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
 748                                 return 0;
 749                                 return -ENODEV;
 750                         }
 751                         snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
 752                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
 753                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
 754                         snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
 755                 }
 756         }
 757         return 0;
 758 }
 759
 760 /*
 761  * EMU-1010 - details found out from this driver, official MS Win drivers,
 762  * testing the card:
 763  *
 764  * Audigy2 (aka Alice2):
 765  * ---------------------
 766  *      * communication over PCI
 767  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 768  *        to 2 x 16-bit, using internal DSP instructions
 769  *      * slave mode, clock supplied by HANA
 770  *      * linked to HANA using:
 771  *              32 x 32-bit serial EMU32 output channels
 772  *              16 x EMU32 input channels
 773  *              (?) x I2S I/O channels (?)
 774  *
 775  * FPGA (aka HANA):
 776  * ---------------
 777  *      * provides all (?) physical inputs and outputs of the card
 778  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 779  *      * provides clock signal for the card and Alice2
 780  *      * two crystals - for 44.1kHz and 48kHz multiples
 781  *      * provides internal routing of signal sources to signal destinations
 782  *      * inputs/outputs to Alice2 - see above
 783  *
 784  * Current status of the driver:
 785  * ----------------------------
 786  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 787  *      * PCM device nb. 2:
 788  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 789  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 790  */
 791 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
 792 {
 793         unsigned int i;
 794         int tmp,tmp2;
 795         int reg;
 796         int err;
 797
 798         snd_printk(KERN_INFO "emu1010: Special config.\n");
 799         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 800          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 801          * Mute all codecs.
 802          */
 803         outl(0x0005a00c, emu->port + HCFG);
 804         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 805          * Lock Tank Memory Cache,
 806          * Mute all codecs.
 807          */
 808         outl(0x0005a004, emu->port + HCFG);
 809         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 810          * Mute all codecs.
 811          */
 812         outl(0x0005a000, emu->port + HCFG);
 813         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 814          * Mute all codecs.
 815          */
 816         outl(0x0005a000, emu->port + HCFG);
 817
 818         /* Disable 48Volt power to Audio Dock */
 819         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
 820
 821         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 822         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 823         snd_printdd("reg1=0x%x\n",reg);
 824         if ((reg & 0x3f) == 0x15) {
 825                 /* FPGA netlist already present so clear it */
 826                 /* Return to programming mode */
 827
 828                 snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0x02 );
 829         }
 830         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 831         snd_printdd("reg2=0x%x\n",reg);
 832         if ((reg & 0x3f) == 0x15) {
 833                 /* FPGA failed to return to programming mode */
 834                 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
 835                 return -ENODEV;
 836         }
 837         snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
 838         if (emu->card_capabilities->emu1010 == 1) {
 839                 if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) {
 840                         snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME);
 841                         return err;
 842                 }
 843         } else if (emu->card_capabilities->emu1010 == 2) {
 844                 if ((err = snd_emu1010_load_firmware(emu, EMU1010B_FILENAME)) != 0) {
 845                         snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010B_FILENAME);
 846                         return err;
 847                 }
 848         } else if (emu->card_capabilities->emu1010 == 3) {
 849                 if ((err = snd_emu1010_load_firmware(emu, EMU1010_NOTEBOOK_FILENAME)) != 0) {
 850                         snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010_NOTEBOOK_FILENAME);
 851                         return err;
 852                 }
 853         }
 854
 855         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 856         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 857         if ((reg & 0x3f) != 0x15) {
 858                 /* FPGA failed to be programmed */
 859                 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
 860                 return -ENODEV;
 861         }
 862
 863         snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
 864         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
 865         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
 866         snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
 867         /* Enable 48Volt power to Audio Dock */
 868         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  EMU_HANA_DOCK_PWR_ON );
 869
 870         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 871         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 872         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 873         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 874         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
 875         /* Optical -> ADAT I/O  */
 876         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, EMU_HANA_OPTICAL_IN_ADAT | EMU_HANA_OPTICAL_OUT_ADAT );
 877         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
 878         /* Set no attenuation on Audio Dock pads. */
 879         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
 880         emu->emu1010.adc_pads = 0x00;
 881         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 882         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 883         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 884         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 885         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
 886         /* DAC PADs. */
 887         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
 888         emu->emu1010.dac_pads = 0x0f;
 889         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 890         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 891         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
 892         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 893         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
 894         /* MIDI routing */
 895         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
 896         /* Unknown. */
 897         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
 898         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
 899         /* IRQ Enable: All off */
 900         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
 901
 902         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 903         snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
 904         /* Default WCLK set to 48kHz. */
 905         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
 906         /* Word Clock source, Internal 48kHz x1 */
 907         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
 908         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
 909         /* Audio Dock LEDs. */
 910         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 911
 912 #if 0
 913         /* For 96kHz */
 914         snd_emu1010_fpga_link_dst_src_write(emu,
 915                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 916         snd_emu1010_fpga_link_dst_src_write(emu,
 917                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 918         snd_emu1010_fpga_link_dst_src_write(emu,
 919                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 920         snd_emu1010_fpga_link_dst_src_write(emu,
 921                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 922 #endif
 923 #if 0
 924         /* For 192kHz */
 925         snd_emu1010_fpga_link_dst_src_write(emu,
 926                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 927         snd_emu1010_fpga_link_dst_src_write(emu,
 928                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 929         snd_emu1010_fpga_link_dst_src_write(emu,
 930                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 931         snd_emu1010_fpga_link_dst_src_write(emu,
 932                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 933         snd_emu1010_fpga_link_dst_src_write(emu,
 934                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 935         snd_emu1010_fpga_link_dst_src_write(emu,
 936                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 937         snd_emu1010_fpga_link_dst_src_write(emu,
 938                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 939         snd_emu1010_fpga_link_dst_src_write(emu,
 940                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 941 #endif
 942 #if 1
 943         /* For 48kHz */
 944         snd_emu1010_fpga_link_dst_src_write(emu,
 945                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 946         snd_emu1010_fpga_link_dst_src_write(emu,
 947                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 948         snd_emu1010_fpga_link_dst_src_write(emu,
 949                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 950         snd_emu1010_fpga_link_dst_src_write(emu,
 951                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 952         snd_emu1010_fpga_link_dst_src_write(emu,
 953                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 954         snd_emu1010_fpga_link_dst_src_write(emu,
 955                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 956         snd_emu1010_fpga_link_dst_src_write(emu,
 957                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 958         snd_emu1010_fpga_link_dst_src_write(emu,
 959                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 960         /* Pavel Hofman - setting defaults for 8 more capture channels
 961          * Defaults only, users will set their own values anyways, let's
 962          * just copy/paste.
 963          */
 964
 965         snd_emu1010_fpga_link_dst_src_write(emu,
 966                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
 967         snd_emu1010_fpga_link_dst_src_write(emu,
 968                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
 969         snd_emu1010_fpga_link_dst_src_write(emu,
 970                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
 971         snd_emu1010_fpga_link_dst_src_write(emu,
 972                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
 973         snd_emu1010_fpga_link_dst_src_write(emu,
 974                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
 975         snd_emu1010_fpga_link_dst_src_write(emu,
 976                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
 977         snd_emu1010_fpga_link_dst_src_write(emu,
 978                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
 979         snd_emu1010_fpga_link_dst_src_write(emu,
 980                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
 981 #endif
 982 #if 0
 983         /* Original */
 984         snd_emu1010_fpga_link_dst_src_write(emu,
 985                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
 986         snd_emu1010_fpga_link_dst_src_write(emu,
 987                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
 988         snd_emu1010_fpga_link_dst_src_write(emu,
 989                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
 990         snd_emu1010_fpga_link_dst_src_write(emu,
 991                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
 992         snd_emu1010_fpga_link_dst_src_write(emu,
 993                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
 994         snd_emu1010_fpga_link_dst_src_write(emu,
 995                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
 996         snd_emu1010_fpga_link_dst_src_write(emu,
 997                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
 998         snd_emu1010_fpga_link_dst_src_write(emu,
 999                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1000         snd_emu1010_fpga_link_dst_src_write(emu,
1001                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1002         snd_emu1010_fpga_link_dst_src_write(emu,
1003                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1004         snd_emu1010_fpga_link_dst_src_write(emu,
1005                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1006         snd_emu1010_fpga_link_dst_src_write(emu,
1007                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1008 #endif
1009         for (i = 0;i < 0x20; i++ ) {
1010                 /* AudioDock Elink <-  Silence */
1011                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1012         }
1013         for (i = 0;i < 4; i++) {
1014                 /* Hana SPDIF Out <- Silence */
1015                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1016         }
1017         for (i = 0;i < 7; i++) {
1018                 /* Hamoa DAC <- Silence */
1019                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1020         }
1021         for (i = 0;i < 7; i++) {
1022                 /* Hana ADAT Out <- Silence */
1023                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1024         }
1025         snd_emu1010_fpga_link_dst_src_write(emu,
1026                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1027         snd_emu1010_fpga_link_dst_src_write(emu,
1028                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1029         snd_emu1010_fpga_link_dst_src_write(emu,
1030                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1035         snd_emu1010_fpga_link_dst_src_write(emu,
1036                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1037         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1038
1039         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1040
1041         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1042          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1043          * Mute all codecs.
1044          */
1045         outl(0x0000a000, emu->port + HCFG);
1046         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1047          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1048          * Un-Mute all codecs.
1049          */
1050         outl(0x0000a001, emu->port + HCFG);
1051
1052         /* Initial boot complete. Now patches */
1053
1054         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1055         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1056         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1057         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1058         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1059         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1060         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1061
1062         /* Start Micro/Audio Dock firmware loader thread */
1063         emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1064                                    emu,
1065                                    "emu1010_firmware");
1066         wake_up_process(emu->emu1010.firmware_thread);
1067
1068 #if 0
1069         snd_emu1010_fpga_link_dst_src_write(emu,
1070                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1071         snd_emu1010_fpga_link_dst_src_write(emu,
1072                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1073         snd_emu1010_fpga_link_dst_src_write(emu,
1074                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1075         snd_emu1010_fpga_link_dst_src_write(emu,
1076                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1077 #endif
1078         /* Default outputs */
1079         snd_emu1010_fpga_link_dst_src_write(emu,
1080                 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1081         emu->emu1010.output_source[0] = 21;
1082         snd_emu1010_fpga_link_dst_src_write(emu,
1083                 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1084         emu->emu1010.output_source[1] = 22;
1085         snd_emu1010_fpga_link_dst_src_write(emu,
1086                 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1087         emu->emu1010.output_source[2] = 23;
1088         snd_emu1010_fpga_link_dst_src_write(emu,
1089                 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1090         emu->emu1010.output_source[3] = 24;
1091         snd_emu1010_fpga_link_dst_src_write(emu,
1092                 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1093         emu->emu1010.output_source[4] = 25;
1094         snd_emu1010_fpga_link_dst_src_write(emu,
1095                 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1096         emu->emu1010.output_source[5] = 26;
1097         snd_emu1010_fpga_link_dst_src_write(emu,
1098                 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1099         emu->emu1010.output_source[6] = 27;
1100         snd_emu1010_fpga_link_dst_src_write(emu,
1101                 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1102         emu->emu1010.output_source[7] = 28;
1103         snd_emu1010_fpga_link_dst_src_write(emu,
1104                 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1105         emu->emu1010.output_source[8] = 21;
1106         snd_emu1010_fpga_link_dst_src_write(emu,
1107                 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1108         emu->emu1010.output_source[9] = 22;
1109         snd_emu1010_fpga_link_dst_src_write(emu,
1110                 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1111         emu->emu1010.output_source[10] = 21;
1112         snd_emu1010_fpga_link_dst_src_write(emu,
1113                 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1114         emu->emu1010.output_source[11] = 22;
1115         snd_emu1010_fpga_link_dst_src_write(emu,
1116                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1117         emu->emu1010.output_source[12] = 21;
1118         snd_emu1010_fpga_link_dst_src_write(emu,
1119                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1120         emu->emu1010.output_source[13] = 22;
1121         snd_emu1010_fpga_link_dst_src_write(emu,
1122                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1123         emu->emu1010.output_source[14] = 21;
1124         snd_emu1010_fpga_link_dst_src_write(emu,
1125                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1126         emu->emu1010.output_source[15] = 22;
1127         snd_emu1010_fpga_link_dst_src_write(emu,
1128                 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */
1129         emu->emu1010.output_source[16] = 21;
1130         snd_emu1010_fpga_link_dst_src_write(emu,
1131                 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1132         emu->emu1010.output_source[17] = 22;
1133         snd_emu1010_fpga_link_dst_src_write(emu,
1134                 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1135         emu->emu1010.output_source[18] = 23;
1136         snd_emu1010_fpga_link_dst_src_write(emu,
1137                 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1138         emu->emu1010.output_source[19] = 24;
1139         snd_emu1010_fpga_link_dst_src_write(emu,
1140                 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1141         emu->emu1010.output_source[20] = 25;
1142         snd_emu1010_fpga_link_dst_src_write(emu,
1143                 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1144         emu->emu1010.output_source[21] = 26;
1145         snd_emu1010_fpga_link_dst_src_write(emu,
1146                 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1147         emu->emu1010.output_source[22] = 27;
1148         snd_emu1010_fpga_link_dst_src_write(emu,
1149                 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1150         emu->emu1010.output_source[23] = 28;
1151
1152         /* TEMP: Select SPDIF in/out */
1153         //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1154
1155         /* TEMP: Select 48kHz SPDIF out */
1156         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1157         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1158         /* Word Clock source, Internal 48kHz x1 */
1159         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1160         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1161         emu->emu1010.internal_clock = 1; /* 48000 */
1162         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1163         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1164         //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1165         //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1166         //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1167
1168         return 0;
1169 }
1170 /*
1171  *  Create the EMU10K1 instance
1172  */
1173
1174 #ifdef CONFIG_PM
1175 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1176 static void free_pm_buffer(struct snd_emu10k1 *emu);
1177 #endif
1178
1179 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1180 {
1181         if (emu->port) {        /* avoid access to already used hardware */
1182                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1183                 snd_emu10k1_done(emu);
1184                 /* remove reserved page */
1185                 if (emu->reserved_page) {
1186                         snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1187                         emu->reserved_page = NULL;
1188                 }
1189                 snd_emu10k1_free_efx(emu);
1190         }
1191         if (emu->card_capabilities->emu1010) {
1192                 /* Disable 48Volt power to Audio Dock */
1193                 snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
1194                 kthread_stop(emu->emu1010.firmware_thread);
1195         }
1196         if (emu->memhdr)
1197                 snd_util_memhdr_free(emu->memhdr);
1198         if (emu->silent_page.area)
1199                 snd_dma_free_pages(&emu->silent_page);
1200         if (emu->ptb_pages.area)
1201                 snd_dma_free_pages(&emu->ptb_pages);
1202         vfree(emu->page_ptr_table);
1203         vfree(emu->page_addr_table);
1204 #ifdef CONFIG_PM
1205         free_pm_buffer(emu);
1206 #endif
1207         if (emu->irq >= 0)
1208                 free_irq(emu->irq, emu);
1209         if (emu->port)
1210                 pci_release_regions(emu->pci);
1211         if (emu->card_capabilities->ca0151_chip) /* P16V */
1212                 snd_p16v_free(emu);
1213         pci_disable_device(emu->pci);
1214         kfree(emu);
1215         return 0;
1216 }
1217
1218 static int snd_emu10k1_dev_free(struct snd_device *device)
1219 {
1220         struct snd_emu10k1 *emu = device->device_data;
1221         return snd_emu10k1_free(emu);
1222 }
1223
1224 static struct snd_emu_chip_details emu_chip_details[] = {
1225         /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1226         /* Tested by James@superbug.co.uk 3rd July 2005 */
1227         /* DSP: CA0108-IAT
1228          * DAC: CS4382-KQ
1229          * ADC: Philips 1361T
1230          * AC97: STAC9750
1231          * CA0151: None
1232          */
1233         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1234          .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1235          .id = "Audigy2",
1236          .emu10k2_chip = 1,
1237          .ca0108_chip = 1,
1238          .spk71 = 1,
1239          .ac97_chip = 1} ,
1240         /* Audigy4 (Not PRO) SB0610 */
1241         /* Tested by James@superbug.co.uk 4th April 2006 */
1242         /* A_IOCFG bits
1243          * Output
1244          * 0: ?
1245          * 1: ?
1246          * 2: ?
1247          * 3: 0 - Digital Out, 1 - Line in
1248          * 4: ?
1249          * 5: ?
1250          * 6: ?
1251          * 7: ?
1252          * Input
1253          * 8: ?
1254          * 9: ?
1255          * A: Green jack sense (Front)
1256          * B: ?
1257          * C: Black jack sense (Rear/Side Right)
1258          * D: Yellow jack sense (Center/LFE/Side Left)
1259          * E: ?
1260          * F: ?
1261          *
1262          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1263          * 0 - Digital Out
1264          * 1 - Line in
1265          */
1266         /* Mic input not tested.
1267          * Analog CD input not tested
1268          * Digital Out not tested.
1269          * Line in working.
1270          * Audio output 5.1 working. Side outputs not working.
1271          */
1272         /* DSP: CA10300-IAT LF
1273          * DAC: Cirrus Logic CS4382-KQZ
1274          * ADC: Philips 1361T
1275          * AC97: Sigmatel STAC9750
1276          * CA0151: None
1277          */
1278         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1279          .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1280          .id = "Audigy2",
1281          .emu10k2_chip = 1,
1282          .ca0108_chip = 1,
1283          .spk71 = 1,
1284          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1285          .ac97_chip = 1} ,
1286         /* Audigy 2 ZS Notebook Cardbus card.*/
1287         /* Tested by James@superbug.co.uk 6th November 2006 */
1288         /* Audio output 7.1/Headphones working.
1289          * Digital output working. (AC3 not checked, only PCM)
1290          * Audio Mic/Line inputs working.
1291          * Digital input not tested.
1292          */
1293         /* DSP: Tina2
1294          * DAC: Wolfson WM8768/WM8568
1295          * ADC: Wolfson WM8775
1296          * AC97: None
1297          * CA0151: None
1298          */
1299         /* Tested by James@superbug.co.uk 4th April 2006 */
1300         /* A_IOCFG bits
1301          * Output
1302          * 0: Not Used
1303          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1304          * 2: Analog input 0 = line in, 1 = mic in
1305          * 3: Not Used
1306          * 4: Digital output 0 = off, 1 = on.
1307          * 5: Not Used
1308          * 6: Not Used
1309          * 7: Not Used
1310          * Input
1311          *      All bits 1 (0x3fxx) means nothing plugged in.
1312          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1313          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1314          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1315          * E-F: Always 0
1316          *
1317          */
1318         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1319          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1320          .id = "Audigy2",
1321          .emu10k2_chip = 1,
1322          .ca0108_chip = 1,
1323          .ca_cardbus_chip = 1,
1324          .spi_dac = 1,
1325          .i2c_adc = 1,
1326          .spk71 = 1} ,
1327         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1328          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1329          .id = "EMU1010",
1330          .emu10k2_chip = 1,
1331          .ca0108_chip = 1,
1332          .ca_cardbus_chip = 1,
1333          .spk71 = 1 ,
1334          .emu1010 = 3} ,
1335         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1336          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1337          .id = "EMU1010",
1338          .emu10k2_chip = 1,
1339          .ca0108_chip = 1,
1340          .spk71 = 1 ,
1341          .emu1010 = 2} ,
1342         {.vendor = 0x1102, .device = 0x0008,
1343          .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1344          .id = "Audigy2",
1345          .emu10k2_chip = 1,
1346          .ca0108_chip = 1,
1347          .ac97_chip = 1} ,
1348         /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */
1349         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1350          .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1351          .id = "EMU1010",
1352          .emu10k2_chip = 1,
1353          .ca0102_chip = 1,
1354          .spk71 = 1,
1355          .emu1010 = 1} ,
1356         /* Tested by James@superbug.co.uk 3rd July 2005 */
1357         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1358          .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1359          .id = "Audigy2",
1360          .emu10k2_chip = 1,
1361          .ca0102_chip = 1,
1362          .ca0151_chip = 1,
1363          .spk71 = 1,
1364          .spdif_bug = 1,
1365          .ac97_chip = 1} ,
1366         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1367         /* The 0x20061102 does have SB0350 written on it
1368          * Just like 0x20021102
1369          */
1370         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1371          .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1372          .id = "Audigy2",
1373          .emu10k2_chip = 1,
1374          .ca0102_chip = 1,
1375          .ca0151_chip = 1,
1376          .spk71 = 1,
1377          .spdif_bug = 1,
1378          .ac97_chip = 1} ,
1379         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1380          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1381          .id = "Audigy2",
1382          .emu10k2_chip = 1,
1383          .ca0102_chip = 1,
1384          .ca0151_chip = 1,
1385          .spk71 = 1,
1386          .spdif_bug = 1,
1387          .ac97_chip = 1} ,
1388         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1389          .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1390          .id = "Audigy2",
1391          .emu10k2_chip = 1,
1392          .ca0102_chip = 1,
1393          .ca0151_chip = 1,
1394          .spk71 = 1,
1395          .spdif_bug = 1,
1396          .ac97_chip = 1} ,
1397         /* Audigy 2 */
1398         /* Tested by James@superbug.co.uk 3rd July 2005 */
1399         /* DSP: CA0102-IAT
1400          * DAC: CS4382-KQ
1401          * ADC: Philips 1361T
1402          * AC97: STAC9721
1403          * CA0151: Yes
1404          */
1405         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1406          .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1407          .id = "Audigy2",
1408          .emu10k2_chip = 1,
1409          .ca0102_chip = 1,
1410          .ca0151_chip = 1,
1411          .spk71 = 1,
1412          .spdif_bug = 1,
1413          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1414          .ac97_chip = 1} ,
1415         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1416          .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1417          .id = "Audigy2",
1418          .emu10k2_chip = 1,
1419          .ca0102_chip = 1,
1420          .ca0151_chip = 1,
1421          .spk71 = 1,
1422          .spdif_bug = 1} ,
1423         /* Dell OEM/Creative Labs Audigy 2 ZS */
1424         /* See ALSA bug#1365 */
1425         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1426          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1427          .id = "Audigy2",
1428          .emu10k2_chip = 1,
1429          .ca0102_chip = 1,
1430          .ca0151_chip = 1,
1431          .spk71 = 1,
1432          .spdif_bug = 1,
1433          .ac97_chip = 1} ,
1434         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1435          .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1436          .id = "Audigy2",
1437          .emu10k2_chip = 1,
1438          .ca0102_chip = 1,
1439          .ca0151_chip = 1,
1440          .spk71 = 1,
1441          .spdif_bug = 1,
1442          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1443          .ac97_chip = 1} ,
1444         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1445          .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1446          .id = "Audigy2",
1447          .emu10k2_chip = 1,
1448          .ca0102_chip = 1,
1449          .ca0151_chip = 1,
1450          .spdif_bug = 1,
1451          .ac97_chip = 1} ,
1452         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1453          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1454          .id = "Audigy",
1455          .emu10k2_chip = 1,
1456          .ca0102_chip = 1,
1457          .ac97_chip = 1} ,
1458         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1459          .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1460          .id = "Audigy",
1461          .emu10k2_chip = 1,
1462          .ca0102_chip = 1,
1463          .spdif_bug = 1,
1464          .ac97_chip = 1} ,
1465         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1466          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1467          .id = "Audigy",
1468          .emu10k2_chip = 1,
1469          .ca0102_chip = 1,
1470          .ac97_chip = 1} ,
1471         {.vendor = 0x1102, .device = 0x0004,
1472          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1473          .id = "Audigy",
1474          .emu10k2_chip = 1,
1475          .ca0102_chip = 1,
1476          .ac97_chip = 1} ,
1477         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1478          .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1479          .id = "Live",
1480          .emu10k1_chip = 1,
1481          .ac97_chip = 1,
1482          .sblive51 = 1} ,
1483         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1484          .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1485          .id = "Live",
1486          .emu10k1_chip = 1,
1487          .ac97_chip = 1,
1488          .sblive51 = 1} ,
1489         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1490          .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1491          .id = "Live",
1492          .emu10k1_chip = 1,
1493          .ac97_chip = 1,
1494          .sblive51 = 1} ,
1495         /* Tested by ALSA bug#1680 26th December 2005 */
1496         /* note: It really has SB0220 written on the card. */
1497         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1498          .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1499          .id = "Live",
1500          .emu10k1_chip = 1,
1501          .ac97_chip = 1,
1502          .sblive51 = 1} ,
1503         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1504         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1505          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1506          .id = "Live",
1507          .emu10k1_chip = 1,
1508          .ac97_chip = 1,
1509          .sblive51 = 1} ,
1510         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1511          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1512          .id = "Live",
1513          .emu10k1_chip = 1,
1514          .ac97_chip = 1,
1515          .sblive51 = 1} ,
1516         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1517          .driver = "EMU10K1", .name = "SB Live 5.1",
1518          .id = "Live",
1519          .emu10k1_chip = 1,
1520          .ac97_chip = 1,
1521          .sblive51 = 1} ,
1522         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1523         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1524          .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1525          .id = "Live",
1526          .emu10k1_chip = 1,
1527          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1528                           * share the same IDs!
1529                           */
1530          .sblive51 = 1} ,
1531         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1532          .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1533          .id = "Live",
1534          .emu10k1_chip = 1,
1535          .ac97_chip = 1,
1536          .sblive51 = 1} ,
1537         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1538          .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1539          .id = "Live",
1540          .emu10k1_chip = 1,
1541          .ac97_chip = 1} ,
1542         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1543          .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1544          .id = "Live",
1545          .emu10k1_chip = 1,
1546          .ac97_chip = 1,
1547          .sblive51 = 1} ,
1548         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1549          .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1550          .id = "Live",
1551          .emu10k1_chip = 1,
1552          .ac97_chip = 1,
1553          .sblive51 = 1} ,
1554         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1555          .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1556          .id = "Live",
1557          .emu10k1_chip = 1,
1558          .ac97_chip = 1,
1559          .sblive51 = 1} ,
1560         /* Tested by James@superbug.co.uk 3rd July 2005 */
1561         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1562          .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1563          .id = "Live",
1564          .emu10k1_chip = 1,
1565          .ac97_chip = 1,
1566          .sblive51 = 1} ,
1567         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1568          .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1569          .id = "Live",
1570          .emu10k1_chip = 1,
1571          .ac97_chip = 1,
1572          .sblive51 = 1} ,
1573         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1574          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1575          .id = "Live",
1576          .emu10k1_chip = 1,
1577          .ac97_chip = 1,
1578          .sblive51 = 1} ,
1579         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1580          .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1581          .id = "Live",
1582          .emu10k1_chip = 1,
1583          .ac97_chip = 1,
1584          .sblive51 = 1} ,
1585         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1586          .driver = "EMU10K1", .name = "E-mu APS [4001]",
1587          .id = "APS",
1588          .emu10k1_chip = 1,
1589          .ecard = 1} ,
1590         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1591          .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1592          .id = "Live",
1593          .emu10k1_chip = 1,
1594          .ac97_chip = 1,
1595          .sblive51 = 1} ,
1596         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1597          .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1598          .id = "Live",
1599          .emu10k1_chip = 1,
1600          .ac97_chip = 1,
1601          .sblive51 = 1} ,
1602         {.vendor = 0x1102, .device = 0x0002,
1603          .driver = "EMU10K1", .name = "SB Live [Unknown]",
1604          .id = "Live",
1605          .emu10k1_chip = 1,
1606          .ac97_chip = 1,
1607          .sblive51 = 1} ,
1608         { } /* terminator */
1609 };
1610
1611 int __devinit snd_emu10k1_create(struct snd_card *card,
1612                        struct pci_dev * pci,
1613                        unsigned short extin_mask,
1614                        unsigned short extout_mask,
1615                        long max_cache_bytes,
1616                        int enable_ir,
1617                        uint subsystem,
1618                        struct snd_emu10k1 ** remu)
1619 {
1620         struct snd_emu10k1 *emu;
1621         int idx, err;
1622         int is_audigy;
1623         unsigned int silent_page;
1624         const struct snd_emu_chip_details *c;
1625         static struct snd_device_ops ops = {
1626                 .dev_free =     snd_emu10k1_dev_free,
1627         };
1628
1629         *remu = NULL;
1630
1631         /* enable PCI device */
1632         if ((err = pci_enable_device(pci)) < 0)
1633                 return err;
1634
1635         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1636         if (emu == NULL) {
1637                 pci_disable_device(pci);
1638                 return -ENOMEM;
1639         }
1640         emu->card = card;
1641         spin_lock_init(&emu->reg_lock);
1642         spin_lock_init(&emu->emu_lock);
1643         spin_lock_init(&emu->voice_lock);
1644         spin_lock_init(&emu->synth_lock);
1645         spin_lock_init(&emu->memblk_lock);
1646         mutex_init(&emu->fx8010.lock);
1647         INIT_LIST_HEAD(&emu->mapped_link_head);
1648         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1649         emu->pci = pci;
1650         emu->irq = -1;
1651         emu->synth = NULL;
1652         emu->get_synth_voice = NULL;
1653         /* read revision & serial */
1654         emu->revision = pci->revision;
1655         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1656         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1657         snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1658
1659         for (c = emu_chip_details; c->vendor; c++) {
1660                 if (c->vendor == pci->vendor && c->device == pci->device) {
1661                         if (subsystem) {
1662                                 if (c->subsystem && (c->subsystem == subsystem) ) {
1663                                         break;
1664                                 } else continue;
1665                         } else {
1666                                 if (c->subsystem && (c->subsystem != emu->serial) )
1667                                         continue;
1668                                 if (c->revision && c->revision != emu->revision)
1669                                         continue;
1670                         }
1671                         break;
1672                 }
1673         }
1674         if (c->vendor == 0) {
1675                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1676                 kfree(emu);
1677                 pci_disable_device(pci);
1678                 return -ENOENT;
1679         }
1680         emu->card_capabilities = c;
1681         if (c->subsystem && !subsystem)
1682                 snd_printdd("Sound card name=%s\n", c->name);
1683         else if (subsystem)
1684                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1685                         c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1686         else
1687                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1688                         c->name, pci->vendor, pci->device, emu->serial);
1689
1690         if (!*card->id && c->id) {
1691                 int i, n = 0;
1692                 strlcpy(card->id, c->id, sizeof(card->id));
1693                 for (;;) {
1694                         for (i = 0; i < snd_ecards_limit; i++) {
1695                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1696                                         break;
1697                         }
1698                         if (i >= snd_ecards_limit)
1699                                 break;
1700                         n++;
1701                         if (n >= SNDRV_CARDS)
1702                                 break;
1703                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1704                 }
1705         }
1706
1707         is_audigy = emu->audigy = c->emu10k2_chip;
1708
1709         /* set the DMA transfer mask */
1710         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1711         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1712             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1713                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1714                 kfree(emu);
1715                 pci_disable_device(pci);
1716                 return -ENXIO;
1717         }
1718         if (is_audigy)
1719                 emu->gpr_base = A_FXGPREGBASE;
1720         else
1721                 emu->gpr_base = FXGPREGBASE;
1722
1723         if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1724                 kfree(emu);
1725                 pci_disable_device(pci);
1726                 return err;
1727         }
1728         emu->port = pci_resource_start(pci, 0);
1729
1730         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1731                         "EMU10K1", emu)) {
1732                 err = -EBUSY;
1733                 goto error;
1734         }
1735         emu->irq = pci->irq;
1736
1737         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1738         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1739                                 32 * 1024, &emu->ptb_pages) < 0) {
1740                 err = -ENOMEM;
1741                 goto error;
1742         }
1743
1744         emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
1745         emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
1746         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1747                 err = -ENOMEM;
1748                 goto error;
1749         }
1750
1751         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1752                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1753                 err = -ENOMEM;
1754                 goto error;
1755         }
1756         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1757         if (emu->memhdr == NULL) {
1758                 err = -ENOMEM;
1759                 goto error;
1760         }
1761         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1762                 sizeof(struct snd_util_memblk);
1763
1764         pci_set_master(pci);
1765
1766         emu->fx8010.fxbus_mask = 0x303f;
1767         if (extin_mask == 0)
1768                 extin_mask = 0x3fcf;
1769         if (extout_mask == 0)
1770                 extout_mask = 0x7fff;
1771         emu->fx8010.extin_mask = extin_mask;
1772         emu->fx8010.extout_mask = extout_mask;
1773         emu->enable_ir = enable_ir;
1774
1775         if (emu->card_capabilities->ca_cardbus_chip) {
1776                 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1777                         goto error;
1778         }
1779         if (emu->card_capabilities->ecard) {
1780                 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1781                         goto error;
1782         } else if (emu->card_capabilities->emu1010) {
1783                 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1784                         snd_emu10k1_free(emu);
1785                         return err;
1786                 }
1787         } else {
1788                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1789                         does not support this, it shouldn't do any harm */
1790                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1791         }
1792
1793         /* initialize TRAM setup */
1794         emu->fx8010.itram_size = (16 * 1024)/2;
1795         emu->fx8010.etram_pages.area = NULL;
1796         emu->fx8010.etram_pages.bytes = 0;
1797
1798         /*
1799          *  Init to 0x02109204 :
1800          *  Clock accuracy    = 0     (1000ppm)
1801          *  Sample Rate       = 2     (48kHz)
1802          *  Audio Channel     = 1     (Left of 2)
1803          *  Source Number     = 0     (Unspecified)
1804          *  Generation Status = 1     (Original for Cat Code 12)
1805          *  Cat Code          = 12    (Digital Signal Mixer)
1806          *  Mode              = 0     (Mode 0)
1807          *  Emphasis          = 0     (None)
1808          *  CP                = 1     (Copyright unasserted)
1809          *  AN                = 0     (Audio data)
1810          *  P                 = 0     (Consumer)
1811          */
1812         emu->spdif_bits[0] = emu->spdif_bits[1] =
1813                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1814                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1815                 SPCS_GENERATIONSTATUS | 0x00001200 |
1816                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1817
1818         emu->reserved_page = (struct snd_emu10k1_memblk *)
1819                 snd_emu10k1_synth_alloc(emu, 4096);
1820         if (emu->reserved_page)
1821                 emu->reserved_page->map_locked = 1;
1822
1823         /* Clear silent pages and set up pointers */
1824         memset(emu->silent_page.area, 0, PAGE_SIZE);
1825         silent_page = emu->silent_page.addr << 1;
1826         for (idx = 0; idx < MAXPAGES; idx++)
1827                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1828
1829         /* set up voice indices */
1830         for (idx = 0; idx < NUM_G; idx++) {
1831                 emu->voices[idx].emu = emu;
1832                 emu->voices[idx].number = idx;
1833         }
1834
1835         if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1836                 goto error;
1837 #ifdef CONFIG_PM
1838         if ((err = alloc_pm_buffer(emu)) < 0)
1839                 goto error;
1840 #endif
1841
1842         /*  Initialize the effect engine */
1843         if ((err = snd_emu10k1_init_efx(emu)) < 0)
1844                 goto error;
1845         snd_emu10k1_audio_enable(emu);
1846
1847         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1848                 goto error;
1849
1850 #ifdef CONFIG_PROC_FS
1851         snd_emu10k1_proc_init(emu);
1852 #endif
1853
1854         snd_card_set_dev(card, &pci->dev);
1855         *remu = emu;
1856         return 0;
1857
1858  error:
1859         snd_emu10k1_free(emu);
1860         return err;
1861 }
1862
1863 #ifdef CONFIG_PM
1864 static unsigned char saved_regs[] = {
1865         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1866         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1867         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1868         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1869         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1870         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1871         0xff /* end */
1872 };
1873 static unsigned char saved_regs_audigy[] = {
1874         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1875         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1876         0xff /* end */
1877 };
1878
1879 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1880 {
1881         int size;
1882
1883         size = ARRAY_SIZE(saved_regs);
1884         if (emu->audigy)
1885                 size += ARRAY_SIZE(saved_regs_audigy);
1886         emu->saved_ptr = vmalloc(4 * NUM_G * size);
1887         if (! emu->saved_ptr)
1888                 return -ENOMEM;
1889         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1890                 return -ENOMEM;
1891         if (emu->card_capabilities->ca0151_chip &&
1892             snd_p16v_alloc_pm_buffer(emu) < 0)
1893                 return -ENOMEM;
1894         return 0;
1895 }
1896
1897 static void free_pm_buffer(struct snd_emu10k1 *emu)
1898 {
1899         vfree(emu->saved_ptr);
1900         snd_emu10k1_efx_free_pm_buffer(emu);
1901         if (emu->card_capabilities->ca0151_chip)
1902                 snd_p16v_free_pm_buffer(emu);
1903 }
1904
1905 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1906 {
1907         int i;
1908         unsigned char *reg;
1909         unsigned int *val;
1910
1911         val = emu->saved_ptr;
1912         for (reg = saved_regs; *reg != 0xff; reg++)
1913                 for (i = 0; i < NUM_G; i++, val++)
1914                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
1915         if (emu->audigy) {
1916                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1917                         for (i = 0; i < NUM_G; i++, val++)
1918                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1919         }
1920         if (emu->audigy)
1921                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1922         emu->saved_hcfg = inl(emu->port + HCFG);
1923 }
1924
1925 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1926 {
1927         if (emu->card_capabilities->ca_cardbus_chip)
1928                 snd_emu10k1_cardbus_init(emu);
1929         if (emu->card_capabilities->ecard)
1930                 snd_emu10k1_ecard_init(emu);
1931         else if (emu->card_capabilities->emu1010)
1932                 snd_emu10k1_emu1010_init(emu);
1933         else
1934                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1935         snd_emu10k1_init(emu, emu->enable_ir, 1);
1936 }
1937
1938 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1939 {
1940         int i;
1941         unsigned char *reg;
1942         unsigned int *val;
1943
1944         snd_emu10k1_audio_enable(emu);
1945
1946         /* resore for spdif */
1947         if (emu->audigy)
1948                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
1949         outl(emu->saved_hcfg, emu->port + HCFG);
1950
1951         val = emu->saved_ptr;
1952         for (reg = saved_regs; *reg != 0xff; reg++)
1953                 for (i = 0; i < NUM_G; i++, val++)
1954                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
1955         if (emu->audigy) {
1956                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1957                         for (i = 0; i < NUM_G; i++, val++)
1958                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
1959         }
1960 }
1961 #endif