1 /* Generic Philips CL RC632 Routines
3 * (C) 2005-2008 Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
27 #include <sys/types.h>
29 #include <librfid/rfid.h>
30 #include <librfid/rfid_asic.h>
31 #include <librfid/rfid_asic_rc632.h>
32 #include <librfid/rfid_reader_cm5121.h>
33 #include <librfid/rfid_layer2_iso14443a.h>
34 #include <librfid/rfid_layer2_iso15693.h>
35 #include <librfid/rfid_protocol_mifare_classic.h>
37 #include "rfid_iso14443_common.h"
44 #define RC632_TMO_AUTH1 140
46 #define TIMER_RELAX_FACTOR 10
48 #define ENTER() DEBUGP("entering\n")
49 const struct rfid_asic rc632;
51 struct register_file {
56 /* Register and FIFO Access functions */
58 rc632_reg_write(struct rfid_asic_handle *handle,
62 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
66 rc632_reg_read(struct rfid_asic_handle *handle,
70 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
74 rc632_fifo_write(struct rfid_asic_handle *handle,
79 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
84 rc632_fifo_read(struct rfid_asic_handle *handle,
88 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
93 rc632_set_bits(struct rfid_asic_handle *handle,
100 ret = rc632_reg_read(handle, reg, &tmp);
104 /* if bits are already set, no need to set them again */
105 if ((tmp & val) == val)
108 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
111 rc632_set_bit_mask(struct rfid_asic_handle *handle,
112 u_int8_t reg, u_int8_t mask, u_int8_t val)
117 ret = rc632_reg_read(handle, reg, &tmp);
121 /* if bits are already like we want them, abort */
122 if ((tmp & mask) == val)
125 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
129 rc632_clear_bits(struct rfid_asic_handle *handle,
136 ret = rc632_reg_read(handle, reg, &tmp);
138 DEBUGP("error during reg_read(%p, %d):%d\n",
142 /* if bits are already cleared, no need to clear them again */
143 if ((tmp & val) == 0)
146 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
150 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
152 return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
156 rc632_rf_power(struct rfid_asic_handle *handle, int on)
160 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
161 RC632_TXCTRL_TX1_RF_EN|
162 RC632_TXCTRL_TX2_RF_EN);
164 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
165 RC632_TXCTRL_TX1_RF_EN|
166 RC632_TXCTRL_TX2_RF_EN);
170 rc632_power(struct rfid_asic_handle *handle, int on)
174 return rc632_clear_bits(handle, RC632_REG_CONTROL,
175 RC632_CONTROL_POWERDOWN);
177 return rc632_set_bits(handle, RC632_REG_CONTROL,
178 RC632_CONTROL_POWERDOWN);
182 rc632_execute_script(struct rfid_asic_handle *h, struct register_file *f,
187 for (i = 0; i < len; i++) {
188 ret = rc632_reg_write(h, f[i].reg, f[i].val);
196 /* calculate best 8bit prescaler and divisor for given usec timeout */
197 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
200 u_int8_t best_prescaler, best_divisor, i;
201 int64_t smallest_diff;
203 smallest_diff = LLONG_MAX;
206 for (i = 0; i < 21; i++) {
207 u_int64_t clk, tmp_div, res;
209 clk = 13560000 / (1 << i);
210 tmp_div = (clk * timeout) / 1000000;
213 if ((tmp_div > 0xff) || (tmp_div > clk))
216 res = 1000000 / (clk / tmp_div);
217 diff = res - timeout;
222 if (diff < smallest_diff) {
224 best_divisor = tmp_div;
225 smallest_diff = diff;
229 *prescaler = best_prescaler;
230 *divisor = best_divisor;
232 DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
233 timeout, best_prescaler, best_divisor);
239 rc632_timer_set(struct rfid_asic_handle *handle,
243 u_int8_t prescaler, divisor;
245 timeout *= TIMER_RELAX_FACTOR;
247 ret = best_prescaler(timeout, &prescaler, &divisor);
249 ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
254 ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
255 RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
257 /* clear timer irq bit */
258 ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
260 ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
265 /* Wait until RC632 is idle or TIMER IRQ has happened */
266 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
269 u_int8_t stat, irq, cmd;
272 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &stat);
273 DEBUGP_STATUS_FLAG(stat);
274 if (stat & RC632_STAT_ERR) {
276 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &err);
277 DEBUGP_ERROR_FLAG(err);
278 if (err & (RC632_ERR_FLAG_COL_ERR |
279 RC632_ERR_FLAG_PARITY_ERR |
280 RC632_ERR_FLAG_FRAMING_ERR |
281 RC632_ERR_FLAG_CRC_ERR))
284 if (stat & RC632_STAT_IRQ) {
285 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
288 DEBUGP_INTERRUPT_FLAG(irq);
290 if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
291 DEBUGP("timer expired before RX!!\n");
296 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
303 /* poll every millisecond */
308 /* Stupid RC632 implementations don't evaluate interrupts but poll the
309 * command register for "status idle" */
311 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
315 #define USLEEP_PER_CYCLE 128
317 timeout *= TIMER_RELAX_FACTOR;
320 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
326 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
327 DEBUGP_STATUS_FLAG(foo);
328 /* check if Error has occured (ERR flag set) */
329 if (foo & RC632_STAT_ERR) {
330 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
331 DEBUGP_ERROR_FLAG(foo);
333 /* check if IRQ has occurred (IRQ flag set)*/
334 if (foo & RC632_STAT_IRQ) {
335 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
336 DEBUGP_INTERRUPT_FLAG(foo);
337 /* clear all interrupts */
338 rc632_clear_irqs(handle, 0xff);
342 /* FIXME: read second time ?? */
343 DEBUGP("cmd == 0 (IDLE)\n");
347 /* Abort after some timeout */
348 if (cycles > timeout/USLEEP_PER_CYCLE) {
349 DEBUGP("timeout...\n");
354 usleep(USLEEP_PER_CYCLE);
361 rc632_transmit(struct rfid_asic_handle *handle,
367 const u_int8_t *cur_buf = buf;
369 DEBUGP("timeout=%u, tx_len=%u\n", timeout, len);
377 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
381 if (cur_buf == buf) {
382 /* only start transmit first time */
383 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
390 if (cur_buf < buf + len) {
391 cur_len = buf - cur_buf;
399 return rc632_wait_idle(handle, timeout);
403 tcl_toggle_pcb(struct rfid_asic_handle *handle)
405 /* FIXME: toggle something between 0x0a and 0x0b */
410 rc632_transceive(struct rfid_asic_handle *handle,
411 const u_int8_t *tx_buf,
418 int ret, cur_tx_len, i;
420 const u_int8_t *cur_tx_buf = tx_buf;
422 DEBUGP("timeout=%u, rx_len=%u, tx_len=%u\n", timer, *rx_len, tx_len);
430 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
431 /* clear all interrupts */
432 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
433 ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
436 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
437 DEBUGP_STATUS_FLAG(tmp);
438 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
439 DEBUGP_STATUS_FLAG(tmp);
440 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
441 DEBUGP_STATUS_FLAG(tmp);
442 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
443 DEBUGP_ERROR_FLAG(tmp);
446 ret = rc632_timer_set(handle, timer);
451 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
455 if (cur_tx_buf == tx_buf) {
456 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
457 RC632_CMD_TRANSCEIVE);
462 cur_tx_buf += cur_tx_len;
463 if (cur_tx_buf < tx_buf + tx_len) {
465 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
470 cur_tx_len = 64 - fifo_fill;
474 } while (cur_tx_len);
477 tcl_toggle_pcb(handle);
479 ret = rc632_wait_idle_timer(handle);
480 //ret = rc632_wait_idle(handle, timer);
482 DEBUGP("rc632_wait_idle >> ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
486 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
490 if (rx_avail > *rx_len)
491 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
492 else if (*rx_len > rx_avail)
495 DEBUGP("rx_len == %d\n",*rx_len);
500 for (i = 0; i < 1; i++){
501 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
502 DEBUGP_STATUS_FLAG(tmp);
503 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
504 DEBUGP_ERROR_FLAG(tmp);
506 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
512 return rc632_fifo_read(handle, *rx_len, rx_buf);
513 /* FIXME: discard addidional bytes in FIFO */
518 rc632_receive(struct rfid_asic_handle *handle,
523 int ret, cur_tx_len, i;
526 DEBUGP("timeout=%u, rx_len=%u\n", timer, *rx_len);
527 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
528 /* clear all interrupts */
529 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
531 ret = rc632_timer_set(handle, timer);
535 ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
539 /* the timer cannot start in hardware based on the command we just
540 * sent. this means that our timing will always be quite a bit more lax,
541 * i.e. we'll always wait for a bit longer than the specs ask us to. */
542 ret = rc632_set_bits(handle, RC632_REG_CONTROL,
543 RC632_CONTROL_TIMER_START);
547 //ret = rc632_wait_idle(handle, timer);
548 ret = rc632_wait_idle_timer(handle);
552 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
556 if (rx_avail > *rx_len) {
557 //DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
558 } else if (*rx_len > rx_avail)
564 DEBUGP("rx_len == 0\n");
566 for (i = 0; i < 1; i++) {
567 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
568 DEBUGP_STATUS_FLAG(tmp);
569 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
570 DEBUGP_ERROR_FLAG(tmp);
573 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
577 return rc632_fifo_read(handle, *rx_len, rx_buf);
578 /* FIXME: discard additional bytes in FIFO */
582 rc632_read_eeprom(struct rfid_asic_handle *handle)
584 u_int8_t recvbuf[60];
592 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
596 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
602 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
606 /* FIXME: do something with eeprom contents */
611 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
613 u_int8_t sndbuf[2] = { 0x01, 0x02 };
614 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
617 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
621 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
625 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
629 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
633 usleep(10000); /* FIXME: no checking for cmd completion? *
635 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
639 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
643 /* FIXME: what to do with crc result? */
649 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
654 for (i = 0; i <= 0x3f; i++)
655 ret |= rc632_reg_read(handle, i, &buf[i]);
660 /* generic FIFO access functions (if no more efficient ones provided by
661 * transport driver) */
666 /* FIXME: implementation (not needed for CM 5121) */
673 /* FIXME: implementation (not neded for CM 5121) */
678 rc632_init(struct rfid_asic_handle *ah)
682 /* switch off rf (make sure PICCs are reset at init time) */
683 ret = rc632_power(ah, 0);
690 ret = rc632_power(ah, 1);
694 /* disable register paging */
695 ret = rc632_reg_write(ah, 0x00, 0x00);
699 /* set some sane default values */
700 ret = rc632_reg_write(ah, 0x11, 0x5b);
705 ret = rc632_rf_power(ah, 0);
712 ret = rc632_rf_power(ah, 1);
720 rc632_fini(struct rfid_asic_handle *ah)
725 ret = rc632_rf_power(ah, 0);
729 ret = rc632_power(ah, 0);
736 struct rfid_asic_handle *
737 rc632_open(struct rfid_asic_transport_handle *th)
739 struct rfid_asic_handle *h;
741 h = malloc_asic_handle(sizeof(*h));
744 memset(h, 0, sizeof(*h));
746 h->asic = (void*)&rc632;
749 /* FIXME: this is only cm5121 specific, since the latency
750 * down to the RC632 FIFO is too long to refill during TX/RX */
751 h->mtu = h->mru = 64;
753 if (rc632_init(h) < 0) {
762 rc632_close(struct rfid_asic_handle *h)
772 /* Register file for ISO14443A standard */
773 static struct register_file iso14443a_script[] = {
775 .reg = RC632_REG_TX_CONTROL,
776 .val = RC632_TXCTRL_MOD_SRC_INT |
777 RC632_TXCTRL_TX2_INV |
778 RC632_TXCTRL_FORCE_100_ASK |
779 RC632_TXCTRL_TX2_RF_EN |
780 RC632_TXCTRL_TX1_RF_EN,
782 .reg = RC632_REG_CW_CONDUCTANCE,
783 .val = CM5121_CW_CONDUCTANCE,
785 .reg = RC632_REG_MOD_CONDUCTANCE,
786 .val = CM5121_MOD_CONDUCTANCE,
788 .reg = RC632_REG_CODER_CONTROL,
789 .val = (RC632_CDRCTRL_TXCD_14443A |
790 RC632_CDRCTRL_RATE_106K),
792 .reg = RC632_REG_MOD_WIDTH,
795 .reg = RC632_REG_MOD_WIDTH_SOF,
798 .reg = RC632_REG_TYPE_B_FRAMING,
801 .reg = RC632_REG_RX_CONTROL1,
802 .val = (RC632_RXCTRL1_GAIN_35DB |
803 RC632_RXCTRL1_ISO14443 |
804 RC632_RXCTRL1_SUBCP_8),
806 .reg = RC632_REG_DECODER_CONTROL,
807 .val = (RC632_DECCTRL_MANCHESTER |
808 RC632_DECCTRL_RXFR_14443A),
810 .reg = RC632_REG_BIT_PHASE,
811 .val = CM5121_14443A_BITPHASE,
813 .reg = RC632_REG_RX_THRESHOLD,
814 .val = CM5121_14443A_THRESHOLD,
816 .reg = RC632_REG_BPSK_DEM_CONTROL,
819 .reg = RC632_REG_RX_CONTROL2,
820 .val = (RC632_RXCTRL2_DECSRC_INT |
821 RC632_RXCTRL2_CLK_Q),
823 .reg = RC632_REG_RX_WAIT,
824 //.val = 0x03, /* default value */
825 .val = 0x06, /* omnikey */
827 .reg = RC632_REG_CHANNEL_REDUNDANCY,
828 .val = (RC632_CR_PARITY_ENABLE |
829 RC632_CR_PARITY_ODD),
831 .reg = RC632_REG_CRC_PRESET_LSB,
834 .reg = RC632_REG_CRC_PRESET_MSB,
840 rc632_iso14443a_init(struct rfid_asic_handle *handle)
844 /* flush fifo (our way) */
845 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
846 RC632_CONTROL_FIFO_FLUSH);
848 ret = rc632_execute_script(handle, iso14443a_script,
849 ARRAY_SIZE(iso14443a_script));
857 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
861 ret = rc632_rf_power(handle, 0);
871 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
873 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
875 struct iso14443a_atqa *atqa)
882 memset(atqa, 0, sizeof(*atqa));
886 /* transfer only 7 bits of last byte in frame */
887 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
891 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
892 RC632_CONTROL_CRYPTO1_ON);
897 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
898 (RC632_CR_PARITY_ENABLE |
899 RC632_CR_PARITY_ODD));
901 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
902 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
908 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
909 (u_int8_t *)atqa, &rx_len,
910 ISO14443A_FDT_ANTICOL_LAST1, 0);
912 DEBUGP("error during rc632_transceive()\n");
916 /* switch back to normal 8bit last byte */
917 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
921 /* determine whether there was a collission */
922 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
926 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
928 /* retrieve bit of collission */
929 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
932 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
933 /* FIXME: how to signal this up the stack */
937 DEBUGP("rx_len(%d) != 2\n", rx_len);
944 /* transceive regular frame */
946 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
947 unsigned int frametype,
948 const u_int8_t *tx_buf, unsigned int tx_len,
949 u_int8_t *rx_buf, unsigned int *rx_len,
950 u_int64_t timeout, unsigned int flags)
954 u_int8_t channel_red;
961 memset(rx_buf, 0, *rx_len);
964 case RFID_14443A_FRAME_REGULAR:
965 case RFID_MIFARE_FRAME:
966 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
967 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
969 case RFID_14443B_FRAME_REGULAR:
970 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
974 case RFID_MIFARE_FRAME:
975 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
978 case RFID_15693_FRAME:
979 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
980 | RC632_CR_TX_CRC_ENABLE;
982 case RFID_15693_FRAME_ICODE1:
983 /* FIXME: implement */
988 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
992 DEBUGP("tx_len=%u\n",tx_len);
993 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
1002 /* transceive anti collission bitframe */
1004 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
1005 struct iso14443a_anticol_cmd *acf,
1006 unsigned int *bit_of_col)
1009 u_int8_t rx_buf[64];
1010 u_int8_t rx_len = sizeof(rx_buf);
1011 u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
1013 u_int8_t error_flag;
1014 *bit_of_col = ISO14443A_BITOFCOL_NONE;
1015 memset(rx_buf, 0, sizeof(rx_buf));
1017 /* disable mifare cryto */
1018 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
1019 RC632_CONTROL_CRYPTO1_ON);
1023 /* disable CRC summing */
1025 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1026 (RC632_CR_PARITY_ENABLE |
1027 RC632_CR_PARITY_ODD));
1029 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1030 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1035 tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1036 tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1038 tx_bytes_total = tx_bytes+1;
1039 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1042 tx_bytes_total = tx_bytes;
1044 /* set RxAlign and TxLastBits*/
1045 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1046 (rx_align << 4) | (tx_last_bits));
1050 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1051 rx_buf, &rx_len, 0x32, 0);
1055 /* bitwise-OR the two halves of the split byte */
1056 acf->uid_bits[tx_bytes-2] = (
1057 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1062 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1064 /* determine whether there was a collission */
1065 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1069 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1070 /* retrieve bit of collission */
1071 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1075 /* bit of collission relative to start of part 1 of
1076 * anticollision frame (!) */
1077 *bit_of_col = 2*8 + boc;
1084 RC632_RATE_106 = 0x00,
1085 RC632_RATE_212 = 0x01,
1086 RC632_RATE_424 = 0x02,
1087 RC632_RATE_848 = 0x03,
1091 u_int8_t subc_pulses;
1093 u_int8_t rx_threshold;
1094 u_int8_t bpsk_dem_ctrl;
1102 static struct rx_config rx_configs[] = {
1104 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
1105 .rx_coding = RC632_DECCTRL_MANCHESTER,
1106 .rx_threshold = 0x88,
1107 .bpsk_dem_ctrl = 0x00,
1110 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
1111 .rx_coding = RC632_DECCTRL_BPSK,
1112 .rx_threshold = 0x50,
1113 .bpsk_dem_ctrl = 0x0c,
1116 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
1117 .rx_coding = RC632_DECCTRL_BPSK,
1118 .rx_threshold = 0x50,
1119 .bpsk_dem_ctrl = 0x0c,
1122 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
1123 .rx_coding = RC632_DECCTRL_BPSK,
1124 .rx_threshold = 0x50,
1125 .bpsk_dem_ctrl = 0x0c,
1129 static struct tx_config tx_configs[] = {
1131 .rate = RC632_CDRCTRL_RATE_106K,
1135 .rate = RC632_CDRCTRL_RATE_212K,
1139 .rate = RC632_CDRCTRL_RATE_424K,
1143 .rate = RC632_CDRCTRL_RATE_848K,
1148 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1149 unsigned int tx, unsigned int rate)
1157 if (rate > ARRAY_SIZE(rx_configs))
1160 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1161 RC632_RXCTRL1_SUBCP_MASK,
1162 rx_configs[rate].subc_pulses);
1166 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1168 rx_configs[rate].rx_coding);
1172 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1173 rx_configs[rate].rx_threshold);
1177 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1178 rc = rc632_reg_write(handle,
1179 RC632_REG_BPSK_DEM_CONTROL,
1180 rx_configs[rate].bpsk_dem_ctrl);
1186 if (rate > ARRAY_SIZE(tx_configs))
1189 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1190 RC632_CDRCTRL_RATE_MASK,
1191 tx_configs[rate].rate);
1195 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1196 tx_configs[rate].mod_width);
1205 static struct register_file iso14443b_script[] = {
1207 .reg = RC632_REG_TX_CONTROL,
1208 .val = (RC632_TXCTRL_TX1_RF_EN |
1209 RC632_TXCTRL_TX2_RF_EN |
1210 RC632_TXCTRL_TX2_INV |
1211 RC632_TXCTRL_MOD_SRC_INT),
1213 .reg = RC632_REG_CW_CONDUCTANCE,
1216 .reg = RC632_REG_MOD_CONDUCTANCE,
1219 .reg = RC632_REG_CODER_CONTROL,
1220 .val = (RC632_CDRCTRL_TXCD_NRZ |
1221 RC632_CDRCTRL_RATE_14443B),
1223 .reg = RC632_REG_MOD_WIDTH,
1226 .reg = RC632_REG_MOD_WIDTH_SOF,
1229 .reg = RC632_REG_TYPE_B_FRAMING,
1230 .val = (RC632_TBFRAMING_SOF_11L_3H |
1231 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1232 RC632_TBFRAMING_EOF_11);
1234 .reg = RC632_REG_RX_CONTROL1,
1235 .val = (RC632_RXCTRL1_GAIN_35DB |
1236 RC632_RXCTRL1_ISO14443,
1237 RC632_RXCTRL1_SUBCP_8),
1239 .reg = RC632_REG_DECODER_CONTROL,
1240 .val = (RC632_DECCTRL_BPSK |
1241 RC632_DECCTRL_RXFR_14443B),
1243 .reg = RC632_REG_BIT_PHASE,
1244 .val = CM5121_14443B_BITPHASE,
1246 .reg = RC632_REG_RX_THRESHOLD,
1247 .val = CM5121_14443B_THRESHOLD,
1249 .reg = RC632_REG_BPSK_DEM_CONTROL,
1250 .val = ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1251 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1252 RC632_BPSKD_FILTER_AMP_DETECT |
1253 RC632_BPSKD_NO_RX_EOF |
1254 RC632_BPSKD_NO_RX_EGT),
1256 .reg = RC632_REG_RX_CONTROL2,
1257 .val = (RC632_RXCTRL2_AUTO_PD |
1258 RC632_RXCTRL2_DECSRC_INT),
1260 .reg = RC632_REG_RX_WAIT,
1263 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1264 .val = (RC632_CR_TX_CRC_ENABLE |
1265 RC632_CR_RX_CRC_ENABLE |
1268 .reg = RC632_REG_CRC_PRESET_LSB,
1271 .reg = RC632_REG_CRC_PRESET_MSB,
1277 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1281 /* FIXME: some FIFO work */
1283 /* flush fifo (our way) */
1284 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1285 RC632_CONTROL_FIFO_FLUSH);
1289 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1290 (RC632_TXCTRL_TX1_RF_EN |
1291 RC632_TXCTRL_TX2_RF_EN |
1292 RC632_TXCTRL_TX2_INV |
1293 RC632_TXCTRL_MOD_SRC_INT));
1297 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1301 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1305 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1306 (RC632_CDRCTRL_TXCD_NRZ |
1307 RC632_CDRCTRL_RATE_14443B));
1311 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1315 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1319 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1320 (RC632_TBFRAMING_SOF_11L_3H |
1321 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1322 RC632_TBFRAMING_EOF_11));
1326 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1327 (RC632_RXCTRL1_GAIN_35DB |
1328 RC632_RXCTRL1_ISO14443 |
1329 RC632_RXCTRL1_SUBCP_8));
1333 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1334 (RC632_DECCTRL_BPSK |
1335 RC632_DECCTRL_RXFR_14443B));
1339 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1340 CM5121_14443B_BITPHASE);
1344 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1345 CM5121_14443B_THRESHOLD);
1349 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1350 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1351 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1352 RC632_BPSKD_FILTER_AMP_DETECT |
1353 RC632_BPSKD_NO_RX_EOF |
1354 RC632_BPSKD_NO_RX_EGT));
1358 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1359 (RC632_RXCTRL2_AUTO_PD |
1360 RC632_RXCTRL2_DECSRC_INT));
1364 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1368 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1369 (RC632_CR_TX_CRC_ENABLE |
1370 RC632_CR_RX_CRC_ENABLE |
1375 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1379 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1392 /* Register file for ISO15693 standard */
1393 static struct register_file iso15693_fast_script[] = {
1395 .reg = RC632_REG_TX_CONTROL,
1396 .val = RC632_TXCTRL_MOD_SRC_INT |
1397 RC632_TXCTRL_TX2_INV |
1398 RC632_TXCTRL_TX2_RF_EN |
1399 RC632_TXCTRL_TX1_RF_EN,
1401 .reg = RC632_REG_CW_CONDUCTANCE,
1404 .reg = RC632_REG_MOD_CONDUCTANCE,
1405 /* FIXME: nxp default for icode1/15693: 0x05 */
1407 .val = 0x21, /* omnikey */
1409 .reg = RC632_REG_CODER_CONTROL,
1410 .val = RC632_CDRCTRL_TXCD_15693_FAST |
1411 RC632_CDRCTRL_RATE_15693,
1413 .reg = RC632_REG_MOD_WIDTH,
1416 .reg = RC632_REG_MOD_WIDTH_SOF,
1419 .reg = RC632_REG_TYPE_B_FRAMING,
1422 .reg = RC632_REG_RX_CONTROL1,
1423 .val = RC632_RXCTRL1_ISO15693 |
1424 RC632_RXCTRL1_SUBCP_16 |
1425 RC632_RXCTRL1_GAIN_35DB,
1427 /* FIXME: this should always be the case */
1428 .reg = RC632_REG_RX_CONTROL2,
1429 .val = RC632_RXCTRL2_DECSRC_INT,
1431 .reg = RC632_REG_DECODER_CONTROL,
1432 .val = RC632_DECCTRL_MANCHESTER |
1433 RC632_DECCTRL_RX_INVERT |
1434 RC632_DECCTRL_ZEROAFTERCOL |
1435 RC632_DECCTRL_RXFR_15693,
1437 .reg = RC632_REG_BIT_PHASE,
1438 /* FIXME: nxp default for icode1/15693: 0x54 */
1440 .val = 0xd0, /* omnikey */
1442 .reg = RC632_REG_RX_THRESHOLD,
1443 /* FIXME: nxp default for icode1/15693: 0x68 */
1447 .reg = RC632_REG_BPSK_DEM_CONTROL,
1450 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1451 .val = RC632_CR_RX_CRC_ENABLE |
1452 RC632_CR_TX_CRC_ENABLE |
1455 .reg = RC632_REG_CRC_PRESET_LSB,
1458 .reg = RC632_REG_CRC_PRESET_MSB,
1463 /* Register file for I*Code standard */
1464 static struct register_file icode1_std_script[] = {
1466 .reg = RC632_REG_TX_CONTROL,
1467 .val = RC632_TXCTRL_MOD_SRC_INT |
1468 RC632_TXCTRL_TX2_INV |
1469 RC632_TXCTRL_TX2_RF_EN |
1470 RC632_TXCTRL_TX1_RF_EN,
1472 .reg = RC632_REG_CW_CONDUCTANCE,
1475 .reg = RC632_REG_MOD_CONDUCTANCE,
1476 /* FIXME: nxp default for icode1/15693: 0x05 */
1479 .reg = RC632_REG_CODER_CONTROL,
1480 .val = RC632_CDRCTRL_TXCD_ICODE_STD |
1481 RC632_CDRCTRL_RATE_15693,
1483 .reg = RC632_REG_MOD_WIDTH,
1486 .reg = RC632_REG_MOD_WIDTH_SOF,
1489 .reg = RC632_REG_TYPE_B_FRAMING,
1492 .reg = RC632_REG_RX_CONTROL1,
1493 .val = RC632_RXCTRL1_ISO15693 |
1494 RC632_RXCTRL1_SUBCP_16 |
1495 RC632_RXCTRL1_GAIN_35DB,
1497 /* FIXME: this should always be the case */
1498 .reg = RC632_REG_RX_CONTROL2,
1499 .val = RC632_RXCTRL2_DECSRC_INT,
1501 .reg = RC632_REG_DECODER_CONTROL,
1502 .val = RC632_DECCTRL_MANCHESTER |
1503 RC632_DECCTRL_RXFR_ICODE,
1505 .reg = RC632_REG_BIT_PHASE,
1506 /* FIXME: nxp default for icode1/15693: 0x54 */
1509 .reg = RC632_REG_RX_THRESHOLD,
1510 /* FIXME: nxp default for icode1/15693: 0x68 */
1513 .reg = RC632_REG_BPSK_DEM_CONTROL,
1516 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1517 /* 16bit CRC, no parity, not CRC3309 */
1518 .val = RC632_CR_RX_CRC_ENABLE |
1519 RC632_CR_TX_CRC_ENABLE,
1521 .reg = RC632_REG_CRC_PRESET_LSB,
1524 .reg = RC632_REG_CRC_PRESET_MSB,
1529 /* incremental changes on top of icode1_std_script */
1530 static struct register_file icode1_fast_patch[] = {
1532 .reg = RC632_REG_CODER_CONTROL,
1533 .val = RC632_CDRCTRL_TXCD_ICODE_FAST |
1534 RC632_CDRCTRL_RATE_ICODE_FAST,
1536 .reg = RC632_REG_MOD_WIDTH_SOF,
1537 .val = 0x73, /* 18.88uS */
1543 rc632_iso15693_init(struct rfid_asic_handle *h)
1547 /* flush fifo (our way) */
1548 ret = rc632_reg_write(h, RC632_REG_CONTROL,
1549 RC632_CONTROL_FIFO_FLUSH);
1553 ret = rc632_execute_script(h, iso15693_fast_script,
1554 ARRAY_SIZE(iso15693_fast_script));
1562 rc632_iso15693_icode1_init(struct rfid_asic_handle *h)
1566 ret = rc632_execute_script(h, icode1_std_script,
1567 ARRAY_SIZE(icode1_std_script));
1571 /* FIXME: how to configure fast/slow properly? */
1574 ret = rc632_execute_script(h, icode1_fast_patch,
1575 ARRAY_SIZE(icode1_fast_patch));
1585 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1591 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1592 (RC632_TXCTRL_MOD_SRC_INT |
1593 RC632_TXCTRL_TX2_INV |
1594 RC632_TXCTRL_TX2_RF_EN |
1595 RC632_TXCTRL_TX1_RF_EN));
1599 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1603 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1607 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1608 (RC632_CDRCTRL_RATE_15693 |
1609 RC632_CDRCTRL_TXCD_ICODE_STD |
1614 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1618 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1621 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1622 (RC632_RXCTRL1_SUBCP_16|
1623 RC632_RXCTRL1_ISO15693|
1624 RC632_RXCTRL1_GAIN_35DB));
1627 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1628 (RC632_DECCTRL_RX_INVERT|
1629 RC632_DECCTRL_RXFR_15693));
1633 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1637 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1641 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1645 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1646 RC632_RXCTRL2_DECSRC_INT);
1650 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1654 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1658 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1665 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1676 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1677 const struct iso15693_anticol_cmd *acf,
1678 unsigned int acf_len,
1679 struct iso15693_anticol_resp *resp,
1680 unsigned int *rx_len, char *bit_of_col)
1682 u_int8_t error_flag, boc;
1685 int ret, tx_len, mask_len_bytes;
1686 unsigned int rate = ISO15693_T_SLOW;
1688 if (acf->req.flags & RFID_15693_F_RATE_HIGH)
1689 rate = ISO15693_T_FAST;
1691 DEBUGP("acf = %s\n", rfid_hexdump(acf, acf_len));
1693 ret = rc632_transceive(handle, (u_int8_t *)acf, acf_len,
1694 (u_int8_t *) resp, rx_len,
1695 iso15693_timing[rate][ISO15693_T1], 0);
1696 if (ret == -ETIMEDOUT)
1699 /* determine whether there was a collission */
1700 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1703 DEBUGP_ERROR_FLAG(error_flag);
1705 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1706 /* retrieve bit of collission */
1707 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1718 mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1720 if (acf->current_slot == 0) {
1721 /* first call: transmit Inventory frame */
1722 DEBUGP("first_frame\n");
1724 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1726 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1727 (u_int8_t *)&rx_buf, &rx_len, ISO15693_T1, 0);
1728 acf->current_slot = 1;
1729 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1730 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1734 /* second++ call: end timeslot with EOFpulse and read */
1735 DEBUGP("second++_frame\n");
1736 if ((acf->current_slot > 16) ||
1737 ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1738 && (acf->current_slot > 1))) {
1740 memset(uuid, 0, ISO15693_UID_LEN);
1744 /* reset EOF-pulse-bit to 0 */
1745 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1746 RC632_CDRCTRL_15693_EOF_PULSE);
1748 /* generate EOF pulse */
1749 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1750 RC632_CDRCTRL_15693_EOF_PULSE);
1753 // DEBUGP("waiting for EOF pulse\n");
1754 // ret = rc632_wait_idle(handle, 10); //wait for idle
1756 rx_len = sizeof(rx_buf);
1757 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, ISO15693_T3);
1758 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1759 acf->current_slot++;
1761 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1765 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1766 DEBUGP_STATUS_FLAG(tmp);
1768 if (ret == -ETIMEDOUT) {
1769 /* no VICC answer in this timeslot*/
1770 memset(uuid, 0, ISO15693_UID_LEN);
1773 /* determine whether there was a collission */
1774 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1775 DEBUGP_ERROR_FLAG(error_flag);
1779 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1780 /* retrieve bit of collission */
1781 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1785 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1786 // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1787 DEBUGP("Collision in slot %d bit %d\n",
1788 acf->current_slot,boc);
1791 /* no collision-> retrieve uuid */
1792 DEBUGP("no collision in slot %d\n", acf->current_slot);
1793 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1794 //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1802 struct mifare_authcmd {
1804 u_int8_t block_address;
1805 u_int32_t serno; /* lsb 1 2 msb */
1806 } __attribute__ ((packed));
1809 #define RFID_MIFARE_KEY_LEN 6
1810 #define RFID_MIFARE_KEY_CODED_LEN 12
1812 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1814 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1820 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1821 ln = key6[i] & 0x0f;
1823 key12[i * 2 + 1] = (~ln << 4) | ln;
1824 key12[i * 2] = (~hn << 4) | hn;
1830 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1832 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1836 ret = rc632_mifare_transform_key(key, coded_key);
1840 /* Terminate probably running command */
1841 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1845 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1849 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1853 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1857 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1858 ret = rc632_wait_idle_timer(h);
1862 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1866 if (reg & RC632_ERR_FLAG_KEY_ERR)
1873 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1877 struct mifare_authcmd acmd;
1880 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
1881 DEBUGP("invalid auth command\n");
1885 /* Initialize acmd */
1886 acmd.block_address = block & 0xff;
1887 acmd.auth_cmd = cmd;
1888 //acmd.serno = htonl(serno);
1893 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1894 RC632_CR_RX_CRC_ENABLE);
1896 /* Clear Rx CRC, Set Tx CRC and Odd Parity */
1897 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1898 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
1899 RC632_CR_PARITY_ENABLE);
1904 /* Send Authent1 Command */
1905 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1909 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1911 DEBUGP("error during AUTHENT1");
1915 /* Wait until transmitter is idle */
1916 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1920 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1921 ret = rc632_wait_idle_timer(h);
1925 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1929 DEBUGP("bitframe?");
1934 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1935 RC632_CR_TX_CRC_ENABLE);
1939 /* Wait until transmitter is idle */
1940 ret = rc632_timer_set(h, RC632_TMO_AUTH1);
1944 /* Send Authent2 Command */
1945 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1949 /* Wait until transmitter is idle */
1950 //ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1951 ret = rc632_wait_idle_timer(h);
1955 /* Check whether authentication was successful */
1956 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1960 if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
1961 DEBUGP("authentication not successful");
1968 /* transceive regular frame */
1970 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1971 const u_int8_t *tx_buf, unsigned int tx_len,
1972 u_int8_t *rx_buf, unsigned int *rx_len,
1973 u_int64_t timeout, unsigned int flags)
1976 u_int8_t rxl = *rx_len & 0xff;
1978 DEBUGP("entered\n");
1979 memset(rx_buf, 0, *rx_len);
1982 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1983 (RC632_CR_PARITY_ENABLE |
1984 RC632_CR_PARITY_ODD |
1985 RC632_CR_TX_CRC_ENABLE |
1986 RC632_CR_RX_CRC_ENABLE));
1988 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1989 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1994 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
2005 rc632_layer2_init(struct rfid_asic_handle *h, enum rfid_layer2_id l2)
2008 case RFID_LAYER2_ISO14443A:
2009 return rc632_iso14443a_init(h);
2010 case RFID_LAYER2_ISO14443B:
2011 return rc632_iso14443b_init(h);
2012 case RFID_LAYER2_ISO15693:
2013 return rc632_iso15693_init(h);
2014 case RFID_LAYER2_ICODE1:
2015 return rc632_iso15693_icode1_init(h);
2021 const struct rfid_asic rc632 = {
2022 .name = "Philips CL RC632",
2023 .fc = ISO14443_FREQ_CARRIER,
2026 .power = &rc632_power,
2027 .rf_power = &rc632_rf_power,
2028 .transceive = &rc632_iso14443ab_transceive,
2029 .init = &rc632_layer2_init,
2031 .transceive_sf = &rc632_iso14443a_transceive_sf,
2032 .transceive_acf = &rc632_iso14443a_transceive_acf,
2033 .set_speed = &rc632_iso14443a_set_speed,
2036 .transceive_ac = &rc632_iso15693_transceive_ac,
2039 .setkey = &rc632_mifare_set_key,
2040 .auth = &rc632_mifare_auth,