1 /* Generic Philips CL RC632 Routines
3 * (C) 2005-2006 Harald Welte <laforge@gnumonks.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * as published by the Free Software Foundation
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
27 #include <sys/types.h>
29 #include <librfid/rfid.h>
30 #include <librfid/rfid_asic.h>
31 #include <librfid/rfid_asic_rc632.h>
32 #include <librfid/rfid_reader_cm5121.h>
33 #include <librfid/rfid_layer2_iso14443a.h>
34 #include <librfid/rfid_layer2_iso15693.h>
35 #include <librfid/rfid_protocol_mifare_classic.h>
37 #include "rfid_iso14443_common.h"
44 #define RC632_TMO_AUTH1 140
46 #define ENTER() DEBUGP("entering\n")
47 const struct rfid_asic rc632;
49 /* Register and FIFO Access functions */
51 rc632_reg_write(struct rfid_asic_handle *handle,
55 return handle->rath->rat->priv.rc632.fn.reg_write(handle->rath, reg, val);
59 rc632_reg_read(struct rfid_asic_handle *handle,
63 return handle->rath->rat->priv.rc632.fn.reg_read(handle->rath, reg, val);
67 rc632_fifo_write(struct rfid_asic_handle *handle,
72 return handle->rath->rat->priv.rc632.fn.fifo_write(handle->rath,
77 rc632_fifo_read(struct rfid_asic_handle *handle,
81 return handle->rath->rat->priv.rc632.fn.fifo_read(handle->rath, len, buf);
86 rc632_set_bits(struct rfid_asic_handle *handle,
93 ret = rc632_reg_read(handle, reg, &tmp);
97 /* if bits are already set, no need to set them again */
98 if ((tmp & val) == val)
101 return rc632_reg_write(handle, reg, (tmp|val)&0xff);
104 rc632_set_bit_mask(struct rfid_asic_handle *handle,
105 u_int8_t reg, u_int8_t mask, u_int8_t val)
110 ret = rc632_reg_read(handle, reg, &tmp);
114 /* if bits are already like we want them, abort */
115 if ((tmp & mask) == val)
118 return rc632_reg_write(handle, reg, (tmp & ~mask)|(val & mask));
122 rc632_clear_bits(struct rfid_asic_handle *handle,
129 ret = rc632_reg_read(handle, reg, &tmp);
131 DEBUGP("error during reg_read(%p, %d):%d\n",
135 /* if bits are already cleared, no need to clear them again */
136 if ((tmp & val) == 0)
139 return rc632_reg_write(handle, reg, (tmp & ~val)&0xff);
143 rc632_clear_irqs(struct rfid_asic_handle *handle, u_int8_t bits)
145 return rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, (~RC632_INT_SET)&bits);
149 rc632_rf_power(struct rfid_asic_handle *handle, int on)
153 return rc632_set_bits(handle, RC632_REG_TX_CONTROL,
154 RC632_TXCTRL_TX1_RF_EN|
155 RC632_TXCTRL_TX2_RF_EN);
157 return rc632_clear_bits(handle, RC632_REG_TX_CONTROL,
158 RC632_TXCTRL_TX1_RF_EN|
159 RC632_TXCTRL_TX2_RF_EN);
163 rc632_power_up(struct rfid_asic_handle *handle)
166 return rc632_clear_bits(handle, RC632_REG_CONTROL,
167 RC632_CONTROL_POWERDOWN);
171 rc632_power_down(struct rfid_asic_handle *handle)
173 return rc632_set_bits(handle, RC632_REG_CONTROL,
174 RC632_CONTROL_POWERDOWN);
177 /* calculate best 8bit prescaler and divisor for given usec timeout */
178 static int best_prescaler(u_int64_t timeout, u_int8_t *prescaler,
181 u_int8_t best_prescaler, best_divisor, i;
182 int64_t smallest_diff;
184 smallest_diff = LLONG_MAX;
187 for (i = 0; i < 21; i++) {
188 u_int64_t clk, tmp_div, res;
190 clk = 13560000 / (1 << i);
191 tmp_div = (clk * timeout) / 1000000;
194 if ((tmp_div > 0xff) || (tmp_div > clk))
197 res = 1000000 / (clk / tmp_div);
198 diff = res - timeout;
203 if (diff < smallest_diff) {
205 best_divisor = tmp_div;
206 smallest_diff = diff;
210 *prescaler = best_prescaler;
211 *divisor = best_divisor;
213 DEBUGP("timeout %u usec, prescaler = %u, divisor = %u\n",
214 timeout, best_prescaler, best_divisor);
220 rc632_timer_set(struct rfid_asic_handle *handle,
224 u_int8_t prescaler, divisor;
226 ret = best_prescaler(timeout, &prescaler, &divisor);
228 ret = rc632_reg_write(handle, RC632_REG_TIMER_CLOCK,
233 ret = rc632_reg_write(handle, RC632_REG_TIMER_CONTROL,
234 RC632_TMR_START_TX_END|RC632_TMR_STOP_RX_BEGIN);
236 /* clear timer irq bit */
237 ret = rc632_set_bits(handle, RC632_REG_INTERRUPT_RQ, RC632_IRQ_TIMER);
239 ret |= rc632_reg_write(handle, RC632_REG_TIMER_RELOAD, divisor);
244 /* Wait until RC632 is idle or TIMER IRQ has happened */
245 static int rc632_wait_idle_timer(struct rfid_asic_handle *handle)
251 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &irq);
252 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &irq);
253 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &irq);
257 /* FIXME: currently we're lazy: If we actually received
258 * something even after the timer expired, we accept it */
259 if (irq & RC632_IRQ_TIMER && !(irq & RC632_IRQ_RX)) {
261 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
263 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
268 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
275 /* poll every millisecond */
280 /* Stupid RC632 implementations don't evaluate interrupts but poll the
281 * command register for "status idle" */
283 rc632_wait_idle(struct rfid_asic_handle *handle, u_int64_t timeout)
287 #define USLEEP_PER_CYCLE 128
290 ret = rc632_reg_read(handle, RC632_REG_COMMAND, &cmd);
296 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &foo);
297 DEBUGP_STATUS_FLAG(foo);
298 /* check if Error has occured (ERR flag set) */
299 if (foo & RC632_STAT_ERR) {
300 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &foo);
301 DEBUGP_ERROR_FLAG(foo);
303 /* check if IRQ has occurred (IRQ flag set)*/
304 if (foo & RC632_STAT_IRQ) {
305 ret = rc632_reg_read(handle, RC632_REG_INTERRUPT_RQ, &foo);
306 DEBUGP_INTERRUPT_FLAG(foo);
307 /* clear all interrupts */
308 rc632_clear_irqs(handle, 0xff);
312 /* FIXME: read second time ?? */
313 DEBUGP("cmd == 0 (IDLE)\n");
317 /* Abort after some timeout */
318 if (cycles > timeout*100/USLEEP_PER_CYCLE) {
319 DEBUGP("timeout...\n");
324 usleep(USLEEP_PER_CYCLE);
331 rc632_transmit(struct rfid_asic_handle *handle,
337 const u_int8_t *cur_buf = buf;
345 ret = rc632_fifo_write(handle, cur_len, cur_buf, 0x03);
349 if (cur_buf == buf) {
350 /* only start transmit first time */
351 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
358 if (cur_buf < buf + len) {
359 cur_len = buf - cur_buf;
367 return rc632_wait_idle(handle, timeout);
371 tcl_toggle_pcb(struct rfid_asic_handle *handle)
373 /* FIXME: toggle something between 0x0a and 0x0b */
378 rc632_transceive(struct rfid_asic_handle *handle,
379 const u_int8_t *tx_buf,
386 int ret, cur_tx_len, i;
388 const u_int8_t *cur_tx_buf = tx_buf;
390 DEBUGP("timer=%u, rx_len=%u, tx_len=%u,", timer, rx_len, tx_len);
397 ret = rc632_timer_set(handle, timer);
401 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00);
402 /* clear all interrupts */
403 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
404 ret = rc632_reg_write(handle, RC632_REG_ERROR_FLAG, 0xff);
407 ret = rc632_fifo_write(handle, cur_tx_len, cur_tx_buf, 0x03);
411 if (cur_tx_buf == tx_buf) {
412 ret = rc632_reg_write(handle, RC632_REG_COMMAND,
413 RC632_CMD_TRANSCEIVE);
418 cur_tx_buf += cur_tx_len;
419 if (cur_tx_buf < tx_buf + tx_len) {
421 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH,
426 cur_tx_len = 64 - fifo_fill;
430 } while (cur_tx_len);
433 tcl_toggle_pcb(handle);
435 //ret = rc632_wait_idle_timer(handle);
436 ret = rc632_wait_idle(handle, timer);
438 DEBUGP("rc632_wait_idle>>ret=%d %s\n",ret,(ret==-ETIMEDOUT)?"ETIMEDOUT":"");
442 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
446 if (rx_avail > *rx_len)
447 DEBUGP("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
448 else if (*rx_len > rx_avail)
451 DEBUGP("rx_len == %d\n",*rx_len);
456 for (i = 0; i < 1; i++){
457 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
458 DEBUGP_STATUS_FLAG(tmp);
459 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
460 DEBUGP_ERROR_FLAG(tmp);
462 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
468 return rc632_fifo_read(handle, *rx_len, rx_buf);
469 /* FIXME: discard addidional bytes in FIFO */
474 rc632_receive(struct rfid_asic_handle *handle,
479 int ret, cur_tx_len, i;
483 DEBUGP("timer = %u\n", timer);
484 ret = rc632_timer_set(handle, timer*10);
488 ret = rc632_reg_write(handle, RC632_REG_COMMAND, 0x00); /* IDLE */
489 /* clear all interrupts */
490 ret = rc632_reg_write(handle, RC632_REG_INTERRUPT_RQ, 0x7f);
492 ret = rc632_reg_write(handle, RC632_REG_COMMAND,RC632_CMD_RECEIVE);
496 ret = rc632_wait_idle(handle, timer);
500 ret = rc632_reg_read(handle, RC632_REG_FIFO_LENGTH, &rx_avail);
504 if (rx_avail > *rx_len) {
505 //printf("rx_avail(%d) > rx_len(%d), JFYI\n", rx_avail, *rx_len);
506 } else if (*rx_len > rx_avail)
512 DEBUGP("rx_len == 0\n");
514 for (i = 0; i < 1; i++) {
515 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
516 DEBUGP_STATUS_FLAG(tmp);
517 rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &tmp);
518 DEBUGP_ERROR_FLAG(tmp);
521 rc632_reg_read(handle, RC632_REG_CHANNEL_REDUNDANCY, &tmp);
525 return rc632_fifo_read(handle, *rx_len, rx_buf);
526 /* FIXME: discard additional bytes in FIFO */
530 rc632_read_eeprom(struct rfid_asic_handle *handle)
532 u_int8_t recvbuf[60];
540 ret = rc632_fifo_write(handle, 3, sndbuf, 0x03);
544 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_READ_E2);
550 ret = rc632_fifo_read(handle, sizeof(recvbuf), recvbuf);
554 /* FIXME: do something with eeprom contents */
559 rc632_calc_crc16_from(struct rfid_asic_handle *handle)
561 u_int8_t sndbuf[2] = { 0x01, 0x02 };
562 u_int8_t crc_lsb = 0x00 , crc_msb = 0x00;
565 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x12);
569 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xe0);
573 ret = rc632_fifo_write(handle, sizeof(sndbuf), sndbuf, 3);
577 ret = rc632_reg_write(handle, RC632_REG_COMMAND, RC632_CMD_CALC_CRC);
581 usleep(10000); /* FIXME: no checking for cmd completion? *
583 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_LSB, &crc_lsb);
587 ret = rc632_reg_read(handle, RC632_REG_CRC_RESULT_MSB, &crc_msb);
591 /* FIXME: what to do with crc result? */
597 rc632_register_dump(struct rfid_asic_handle *handle, u_int8_t *buf)
602 for (i = 0; i <= 0x3f; i++)
603 ret |= rc632_reg_read(handle, i, &buf[i]);
608 /* generic FIFO access functions (if no more efficient ones provided by
609 * transport driver) */
614 /* FIXME: implementation (not needed for CM 5121) */
621 /* FIXME: implementation (not neded for CM 5121) */
626 rc632_init(struct rfid_asic_handle *ah)
630 /* switch off rf (make sure PICCs are reset at init time) */
631 ret = rc632_power_down(ah);
638 ret = rc632_power_up(ah);
642 /* disable register paging */
643 ret = rc632_reg_write(ah, 0x00, 0x00);
647 /* set some sane default values */
648 ret = rc632_reg_write(ah, 0x11, 0x5b);
653 ret = rc632_rf_power(ah, 0);
660 ret = rc632_rf_power(ah, 1);
668 rc632_fini(struct rfid_asic_handle *ah)
673 ret = rc632_rf_power(ah, 0);
677 ret = rc632_power_down(ah);
684 struct rfid_asic_handle *
685 rc632_open(struct rfid_asic_transport_handle *th)
687 struct rfid_asic_handle *h;
689 h = malloc_asic_handle(sizeof(*h));
692 memset(h, 0, sizeof(*h));
694 h->asic = (void*)&rc632;
697 /* FIXME: this is only cm5121 specific, since the latency
698 * down to the RC632 FIFO is too long to refill during TX/RX */
699 h->mtu = h->mru = 64;
701 if (rc632_init(h) < 0) {
710 rc632_close(struct rfid_asic_handle *h)
718 * Philips CL RC632 primitives for ISO 14443-A compliant PICC's
720 * (C) 2005-2006 by Harald Welte <laforge@gnumonks.org>
725 rc632_iso14443a_init(struct rfid_asic_handle *handle)
729 /* FIXME: some fifo work (drain fifo?) */
731 /* flush fifo (our way) */
732 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
733 RC632_CONTROL_FIFO_FLUSH);
735 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
736 (RC632_TXCTRL_TX1_RF_EN |
737 RC632_TXCTRL_TX2_RF_EN |
738 RC632_TXCTRL_TX2_INV |
739 RC632_TXCTRL_FORCE_100_ASK |
740 RC632_TXCTRL_MOD_SRC_INT));
744 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE,
745 CM5121_CW_CONDUCTANCE);
749 /* Since FORCE_100_ASK is set (cf mc073930.pdf), this line may be left out? */
750 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE,
751 CM5121_MOD_CONDUCTANCE);
755 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
756 (RC632_CDRCTRL_TXCD_14443A |
757 RC632_CDRCTRL_RATE_106K));
761 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
765 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
769 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING, 0x00);
773 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
774 (RC632_RXCTRL1_GAIN_35DB |
775 RC632_RXCTRL1_ISO14443 |
776 RC632_RXCTRL1_SUBCP_8));
780 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
781 (RC632_DECCTRL_MANCHESTER |
782 RC632_DECCTRL_RXFR_14443A));
786 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
787 CM5121_14443A_BITPHASE);
791 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
792 CM5121_14443A_THRESHOLD);
796 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL, 0x00);
800 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
801 (RC632_RXCTRL2_DECSRC_INT |
802 RC632_RXCTRL2_CLK_Q));
806 /* Omnikey proprietary driver has 0x03, but 0x06 is the default reset value ?!? */
807 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x06);
811 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
812 (RC632_CR_PARITY_ENABLE |
813 RC632_CR_PARITY_ODD));
817 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0x63);
821 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0x63);
829 rc632_iso14443a_fini(struct iso14443a_handle *handle_14443)
833 ret = rc632_rf_power(handle, 0);
843 /* issue a 14443-3 A PCD -> PICC command in a short frame, such as REQA, WUPA */
845 rc632_iso14443a_transceive_sf(struct rfid_asic_handle *handle,
847 struct iso14443a_atqa *atqa)
854 memset(atqa, 0, sizeof(*atqa));
858 /* transfer only 7 bits of last byte in frame */
859 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x07);
863 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
864 RC632_CONTROL_CRYPTO1_ON);
869 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
870 (RC632_CR_PARITY_ENABLE |
871 RC632_CR_PARITY_ODD));
873 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
874 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
880 ret = rc632_transceive(handle, tx_buf, sizeof(tx_buf),
881 (u_int8_t *)atqa, &rx_len,
882 ISO14443A_FDT_ANTICOL_LAST1, 0);
884 DEBUGP("error during rc632_transceive()\n");
888 /* switch back to normal 8bit last byte */
889 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING, 0x00);
893 /* determine whether there was a collission */
894 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
898 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
900 /* retrieve bit of collission */
901 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
904 DEBUGP("collision detected in xcv_sf: bit_of_col=%u\n", boc);
905 /* FIXME: how to signal this up the stack */
909 DEBUGP("rx_len(%d) != 2\n", rx_len);
916 /* transceive regular frame */
918 rc632_iso14443ab_transceive(struct rfid_asic_handle *handle,
919 unsigned int frametype,
920 const u_int8_t *tx_buf, unsigned int tx_len,
921 u_int8_t *rx_buf, unsigned int *rx_len,
922 u_int64_t timeout, unsigned int flags)
926 u_int8_t channel_red;
933 memset(rx_buf, 0, *rx_len);
936 case RFID_14443A_FRAME_REGULAR:
937 case RFID_MIFARE_FRAME:
938 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
939 |RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
941 case RFID_14443B_FRAME_REGULAR:
942 channel_red = RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE
946 case RFID_MIFARE_FRAME:
947 channel_red = RC632_CR_PARITY_ENABLE|RC632_CR_PARITY_ODD;
950 case RFID_15693_FRAME:
951 channel_red = RC632_CR_CRC3309 | RC632_CR_RX_CRC_ENABLE
952 | RC632_CR_TX_CRC_ENABLE;
954 case RFID_15693_FRAME_ICODE1:
955 /* FIXME: implement */
960 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
964 DEBUGP("tx_len=%u\n",tx_len);
965 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, timeout, 0);
974 /* transceive anti collission bitframe */
976 rc632_iso14443a_transceive_acf(struct rfid_asic_handle *handle,
977 struct iso14443a_anticol_cmd *acf,
978 unsigned int *bit_of_col)
982 u_int8_t rx_len = sizeof(rx_buf);
983 u_int8_t rx_align = 0, tx_last_bits, tx_bytes, tx_bytes_total;
986 *bit_of_col = ISO14443A_BITOFCOL_NONE;
987 memset(rx_buf, 0, sizeof(rx_buf));
989 /* disable mifare cryto */
990 ret = rc632_clear_bits(handle, RC632_REG_CONTROL,
991 RC632_CONTROL_CRYPTO1_ON);
995 /* disable CRC summing */
997 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
998 (RC632_CR_PARITY_ENABLE |
999 RC632_CR_PARITY_ODD));
1001 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1002 RC632_CR_TX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1007 tx_last_bits = acf->nvb & 0x07; /* lower nibble indicates bits */
1008 tx_bytes = ( acf->nvb >> 4 ) & 0x07;
1010 tx_bytes_total = tx_bytes+1;
1011 rx_align = tx_last_bits & 0x07; /* rx frame complements tx */
1014 tx_bytes_total = tx_bytes;
1016 /* set RxAlign and TxLastBits*/
1017 ret = rc632_reg_write(handle, RC632_REG_BIT_FRAMING,
1018 (rx_align << 4) | (tx_last_bits));
1022 ret = rc632_transceive(handle, (u_int8_t *)acf, tx_bytes_total,
1023 rx_buf, &rx_len, 0x32, 0);
1027 /* bitwise-OR the two halves of the split byte */
1028 acf->uid_bits[tx_bytes-2] = (
1029 (acf->uid_bits[tx_bytes-2] & (0xff >> (8-tx_last_bits)))
1034 memcpy(&acf->uid_bits[tx_bytes-1], &rx_buf[1], rx_len-1);
1036 /* determine whether there was a collission */
1037 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1041 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1042 /* retrieve bit of collission */
1043 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1047 /* bit of collission relative to start of part 1 of
1048 * anticollision frame (!) */
1049 *bit_of_col = 2*8 + boc;
1055 static void uuid_reversecpy(unsigned char* out, unsigned char* in, int len)
1067 rc632_iso15693_transceive_ac(struct rfid_asic_handle *handle,
1068 struct iso15693_anticol_cmd *acf,
1069 unsigned char uuid[ISO15693_UID_LEN],
1073 u_int8_t error_flag, tmp;
1076 int ret, tx_len, mask_len_bytes;
1078 struct iso15693_request_inventory {
1079 struct iso15693_request head;
1080 unsigned char mask_length;
1081 /* mask_value[0] + (maybe crc[2]) */
1082 unsigned char data[ISO15693_UID_LEN];
1086 struct iso15693_response head;
1087 unsigned char dsfid;
1088 unsigned char uuid[ISO15693_UID_LEN];
1091 memset(uuid, 0, ISO15693_UID_LEN);
1094 rx_len = sizeof(rx_buf);
1095 mask_len_bytes = (acf->mask_len % 8) ? acf->mask_len/8+1 : acf->mask_len/8;
1098 if (acf->current_slot == 0) {
1099 /* first call: transmit Inventory frame */
1100 DEBUGP("first_frame\n");
1101 req.head.command = ISO15693_CMD_INVENTORY;
1102 req.head.flags = (acf->flags & 0xf0)
1103 | RFID_15693_F_INV_TABLE_5
1104 | RFID_15693_F_RATE_HIGH;
1105 //| RFID_15693_F_SUBC_TWO | RFID_15693_F_RATE_HIGH;
1106 req.mask_length = acf->mask_len;
1107 memset(req.data, 0, ISO15693_UID_LEN);
1108 memcpy(req.data, acf->mask_bits, mask_len_bytes);
1110 tx_len = sizeof(struct iso15693_request) + 1 + mask_len_bytes;
1112 ret = rc632_transceive(handle, (u_int8_t *)&req, tx_len,
1113 (u_int8_t *)&rx_buf, &rx_len, 10, 0);
1114 acf->current_slot = 1;
1115 DEBUGP("rc632_transceive ret: %d rx_len: %d\n",ret,rx_len);
1116 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1120 /* second++ call: end timeslot with EOFpulse and read */
1121 DEBUGP("second++_frame\n");
1122 if ((acf->current_slot > 16) ||
1123 ((acf->flags & RFID_15693_F5_NSLOTS_1 == 0)
1124 && (acf->current_slot > 1))) {
1126 memset(uuid, 0, ISO15693_UID_LEN);
1130 /* reset EOF-pulse-bit to 0 */
1131 ret = rc632_clear_bits(handle, RC632_REG_CODER_CONTROL,
1132 RC632_CDRCTRL_15693_EOF_PULSE);
1134 /* generate EOF pulse */
1135 ret = rc632_set_bits(handle, RC632_REG_CODER_CONTROL,
1136 RC632_CDRCTRL_15693_EOF_PULSE);
1139 // DEBUGP("waiting for EOF pulse\n");
1140 // ret = rc632_wait_idle(handle, 10); //wait for idle
1142 rx_len = sizeof(rx_buf);
1143 ret = rc632_receive(handle, (u_int8_t*)&rx_buf, &rx_len, 50);
1144 DEBUGP("rc632_receive ret: %d rx_len: %d\n", ret, rx_len);
1145 acf->current_slot++;
1147 /* if ((ret < 0)&&(ret != -ETIMEDOUT))
1151 rc632_reg_read(handle, RC632_REG_PRIMARY_STATUS, &tmp);
1152 DEBUGP_STATUS_FLAG(tmp);
1154 if (ret == -ETIMEDOUT) {
1155 /* no VICC answer in this timeslot*/
1156 memset(uuid, 0, ISO15693_UID_LEN);
1159 /* determine whether there was a collission */
1160 ret = rc632_reg_read(handle, RC632_REG_ERROR_FLAG, &error_flag);
1161 DEBUGP_ERROR_FLAG(error_flag);
1165 if (error_flag & RC632_ERR_FLAG_COL_ERR) {
1166 /* retrieve bit of collission */
1167 ret = rc632_reg_read(handle, RC632_REG_COLL_POS, &boc);
1171 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1172 // uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1173 DEBUGP("Collision in slot %d bit %d\n",
1174 acf->current_slot,boc);
1177 /* no collision-> retrieve uuid */
1178 DEBUGP("no collision in slot %d\n", acf->current_slot);
1179 memcpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1180 //uuid_reversecpy(uuid, rx_buf.uuid, ISO15693_UID_LEN);
1188 RC632_RATE_106 = 0x00,
1189 RC632_RATE_212 = 0x01,
1190 RC632_RATE_424 = 0x02,
1191 RC632_RATE_848 = 0x03,
1195 u_int8_t subc_pulses;
1197 u_int8_t rx_threshold;
1198 u_int8_t bpsk_dem_ctrl;
1206 static struct rx_config rx_configs[] = {
1208 .subc_pulses = RC632_RXCTRL1_SUBCP_8,
1209 .rx_coding = RC632_DECCTRL_MANCHESTER,
1210 .rx_threshold = 0x88,
1211 .bpsk_dem_ctrl = 0x00,
1214 .subc_pulses = RC632_RXCTRL1_SUBCP_4,
1215 .rx_coding = RC632_DECCTRL_BPSK,
1216 .rx_threshold = 0x50,
1217 .bpsk_dem_ctrl = 0x0c,
1220 .subc_pulses = RC632_RXCTRL1_SUBCP_2,
1221 .rx_coding = RC632_DECCTRL_BPSK,
1222 .rx_threshold = 0x50,
1223 .bpsk_dem_ctrl = 0x0c,
1226 .subc_pulses = RC632_RXCTRL1_SUBCP_1,
1227 .rx_coding = RC632_DECCTRL_BPSK,
1228 .rx_threshold = 0x50,
1229 .bpsk_dem_ctrl = 0x0c,
1233 static struct tx_config tx_configs[] = {
1235 .rate = RC632_CDRCTRL_RATE_106K,
1239 .rate = RC632_CDRCTRL_RATE_212K,
1243 .rate = RC632_CDRCTRL_RATE_424K,
1247 .rate = RC632_CDRCTRL_RATE_848K,
1252 static int rc632_iso14443a_set_speed(struct rfid_asic_handle *handle,
1253 unsigned int tx, unsigned int rate)
1261 if (rate > ARRAY_SIZE(rx_configs))
1264 rc = rc632_set_bit_mask(handle, RC632_REG_RX_CONTROL1,
1265 RC632_RXCTRL1_SUBCP_MASK,
1266 rx_configs[rate].subc_pulses);
1270 rc = rc632_set_bit_mask(handle, RC632_REG_DECODER_CONTROL,
1272 rx_configs[rate].rx_coding);
1276 rc = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1277 rx_configs[rate].rx_threshold);
1281 if (rx_configs[rate].rx_coding == RC632_DECCTRL_BPSK) {
1282 rc = rc632_reg_write(handle,
1283 RC632_REG_BPSK_DEM_CONTROL,
1284 rx_configs[rate].bpsk_dem_ctrl);
1290 if (rate > ARRAY_SIZE(tx_configs))
1293 rc = rc632_set_bit_mask(handle, RC632_REG_CODER_CONTROL,
1294 RC632_CDRCTRL_RATE_MASK,
1295 tx_configs[rate].rate);
1299 rc = rc632_reg_write(handle, RC632_REG_MOD_WIDTH,
1300 tx_configs[rate].mod_width);
1308 static int rc632_iso14443b_init(struct rfid_asic_handle *handle)
1312 /* FIXME: some FIFO work */
1314 /* flush fifo (our way) */
1315 ret = rc632_reg_write(handle, RC632_REG_CONTROL,
1316 RC632_CONTROL_FIFO_FLUSH);
1320 ret = rc632_reg_write(handle, RC632_REG_TX_CONTROL,
1321 (RC632_TXCTRL_TX1_RF_EN |
1322 RC632_TXCTRL_TX2_RF_EN |
1323 RC632_TXCTRL_TX2_INV |
1324 RC632_TXCTRL_MOD_SRC_INT));
1328 ret = rc632_reg_write(handle, RC632_REG_CW_CONDUCTANCE, 0x3f);
1332 ret = rc632_reg_write(handle, RC632_REG_MOD_CONDUCTANCE, 0x04);
1336 ret = rc632_reg_write(handle, RC632_REG_CODER_CONTROL,
1337 (RC632_CDRCTRL_TXCD_NRZ |
1338 RC632_CDRCTRL_RATE_14443B));
1342 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH, 0x13);
1346 ret = rc632_reg_write(handle, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1350 ret = rc632_reg_write(handle, RC632_REG_TYPE_B_FRAMING,
1351 (RC632_TBFRAMING_SOF_11L_3H |
1352 (6 << RC632_TBFRAMING_SPACE_SHIFT) |
1353 RC632_TBFRAMING_EOF_11));
1357 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL1,
1358 (RC632_RXCTRL1_GAIN_35DB |
1359 RC632_RXCTRL1_ISO14443 |
1360 RC632_RXCTRL1_SUBCP_8));
1364 ret = rc632_reg_write(handle, RC632_REG_DECODER_CONTROL,
1365 (RC632_DECCTRL_BPSK |
1366 RC632_DECCTRL_RXFR_14443B));
1370 ret = rc632_reg_write(handle, RC632_REG_BIT_PHASE,
1371 CM5121_14443B_BITPHASE);
1375 ret = rc632_reg_write(handle, RC632_REG_RX_THRESHOLD,
1376 CM5121_14443B_THRESHOLD);
1380 ret = rc632_reg_write(handle, RC632_REG_BPSK_DEM_CONTROL,
1381 ((0x2 & RC632_BPSKD_TAUB_MASK)<<RC632_BPSKD_TAUB_SHIFT |
1382 (0x3 & RC632_BPSKD_TAUD_MASK)<<RC632_BPSKD_TAUD_SHIFT |
1383 RC632_BPSKD_FILTER_AMP_DETECT |
1384 RC632_BPSKD_NO_RX_EOF |
1385 RC632_BPSKD_NO_RX_EGT));
1389 ret = rc632_reg_write(handle, RC632_REG_RX_CONTROL2,
1390 (RC632_RXCTRL2_AUTO_PD |
1391 RC632_RXCTRL2_DECSRC_INT));
1395 ret = rc632_reg_write(handle, RC632_REG_RX_WAIT, 0x03);
1399 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1400 (RC632_CR_TX_CRC_ENABLE |
1401 RC632_CR_RX_CRC_ENABLE |
1406 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_LSB, 0xff);
1410 ret = rc632_reg_write(handle, RC632_REG_CRC_PRESET_MSB, 0xff);
1417 struct register_file {
1422 /* Register file for ISO15693 standard */
1423 static struct register_file iso15693_fast_script[] = {
1425 .reg = RC632_REG_TX_CONTROL,
1426 .val = RC632_TXCTRL_MOD_SRC_INT |
1427 RC632_TXCTRL_TX2_INV |
1428 RC632_TXCTRL_TX2_RF_EN |
1429 RC632_TXCTRL_TX1_RF_EN,
1431 .reg = RC632_REG_CW_CONDUCTANCE,
1434 .reg = RC632_REG_MOD_CONDUCTANCE,
1435 /* FIXME: nxp default for icode1/15693: 0x05 */
1437 .val = 0x21, /* omnikey */
1439 .reg = RC632_REG_CODER_CONTROL,
1440 .val = RC632_CDRCTRL_TXCD_15693_FAST |
1441 RC632_CDRCTRL_RATE_15693,
1443 .reg = RC632_REG_MOD_WIDTH,
1446 .reg = RC632_REG_MOD_WIDTH_SOF,
1449 .reg = RC632_REG_TYPE_B_FRAMING,
1452 .reg = RC632_REG_RX_CONTROL1,
1453 .val = RC632_RXCTRL1_ISO15693 |
1454 RC632_RXCTRL1_SUBCP_16 |
1455 RC632_RXCTRL1_GAIN_35DB,
1457 /* FIXME: this should always be the case */
1458 .reg = RC632_REG_RX_CONTROL2,
1459 .val = RC632_RXCTRL2_DECSRC_INT,
1461 .reg = RC632_REG_DECODER_CONTROL,
1462 .val = RC632_DECCTRL_MANCHESTER |
1463 RC632_DECCTRL_RX_INVERT |
1464 RC632_DECCTRL_ZEROAFTERCOL |
1465 RC632_DECCTRL_RXFR_15693,
1467 .reg = RC632_REG_BIT_PHASE,
1468 /* FIXME: nxp default for icode1/15693: 0x54 */
1470 .val = 0xd0, /* omnikey */
1472 .reg = RC632_REG_RX_THRESHOLD,
1473 /* FIXME: nxp default for icode1/15693: 0x68 */
1477 .reg = RC632_REG_BPSK_DEM_CONTROL,
1480 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1481 .val = RC632_CR_RX_CRC_ENABLE |
1482 RC632_CR_TX_CRC_ENABLE |
1485 .reg = RC632_REG_CRC_PRESET_LSB,
1488 .reg = RC632_REG_CRC_PRESET_MSB,
1493 /* Register file for I*Code standard */
1494 static struct register_file icode1_std_script[] = {
1496 .reg = RC632_REG_TX_CONTROL,
1497 .val = RC632_TXCTRL_MOD_SRC_INT |
1498 RC632_TXCTRL_TX2_INV |
1499 RC632_TXCTRL_TX2_RF_EN |
1500 RC632_TXCTRL_TX1_RF_EN,
1502 .reg = RC632_REG_CW_CONDUCTANCE,
1505 .reg = RC632_REG_MOD_CONDUCTANCE,
1506 /* FIXME: nxp default for icode1/15693: 0x05 */
1509 .reg = RC632_REG_CODER_CONTROL,
1510 .val = RC632_CDRCTRL_TXCD_ICODE_STD |
1511 RC632_CDRCTRL_RATE_15693,
1513 .reg = RC632_REG_MOD_WIDTH,
1516 .reg = RC632_REG_MOD_WIDTH_SOF,
1519 .reg = RC632_REG_TYPE_B_FRAMING,
1522 .reg = RC632_REG_RX_CONTROL1,
1523 .val = RC632_RXCTRL1_ISO15693 |
1524 RC632_RXCTRL1_SUBCP_16 |
1525 RC632_RXCTRL1_GAIN_35DB,
1527 /* FIXME: this should always be the case */
1528 .reg = RC632_REG_RX_CONTROL2,
1529 .val = RC632_RXCTRL2_DECSRC_INT,
1531 .reg = RC632_REG_DECODER_CONTROL,
1532 .val = RC632_DECCTRL_MANCHESTER |
1533 RC632_DECCTRL_RXFR_ICODE,
1535 .reg = RC632_REG_BIT_PHASE,
1536 /* FIXME: nxp default for icode1/15693: 0x54 */
1539 .reg = RC632_REG_RX_THRESHOLD,
1540 /* FIXME: nxp default for icode1/15693: 0x68 */
1543 .reg = RC632_REG_BPSK_DEM_CONTROL,
1546 .reg = RC632_REG_CHANNEL_REDUNDANCY,
1547 /* 16bit CRC, no parity, not CRC3309 */
1548 .val = RC632_CR_RX_CRC_ENABLE |
1549 RC632_CR_TX_CRC_ENABLE,
1551 .reg = RC632_REG_CRC_PRESET_LSB,
1554 .reg = RC632_REG_CRC_PRESET_MSB,
1559 /* incremental changes on top of icode1_std_script */
1560 static struct register_file icode1_fast_patch[] = {
1562 .reg = RC632_REG_CODER_CONTROL,
1563 .val = RC632_CDRCTRL_TXCD_ICODE_FAST |
1564 RC632_CDRCTRL_RATE_ICODE_FAST,
1566 .reg = RC632_REG_MOD_WIDTH_SOF,
1567 .val = 0x73, /* 18.88uS */
1572 rc632_iso15693_init(struct rfid_asic_handle *h)
1577 /* flush fifo (our way) */
1578 ret = rc632_reg_write(h, RC632_REG_CONTROL,
1579 RC632_CONTROL_FIFO_FLUSH);
1581 for (i = 0; i < ARRAY_SIZE(iso15693_fast_script); i++) {
1582 ret = rc632_reg_write(h, iso15693_fast_script[i].reg,
1583 iso15693_fast_script[i].val);
1592 rc632_iso15693_icode1_init(struct rfid_asic_handle *h, int fast)
1597 for (i = 0; i < ARRAY_SIZE(icode1_std_script); i++) {
1598 ret = rc632_reg_write(h, icode1_std_script[i].reg,
1599 icode1_std_script[i].val);
1605 for (i = 0; i < ARRAY_SIZE(icode1_fast_patch); i++) {
1606 ret = rc632_reg_write(h, icode1_fast_patch[i].reg,
1607 icode1_fast_patch[i].val);
1617 rc632_iso15693_icl_init(struct rfid_asic_handle *h)
1623 ret = rc632_reg_write(h, RC632_REG_TX_CONTROL,
1624 (RC632_TXCTRL_MOD_SRC_INT |
1625 RC632_TXCTRL_TX2_INV |
1626 RC632_TXCTRL_TX2_RF_EN |
1627 RC632_TXCTRL_TX1_RF_EN));
1631 ret = rc632_reg_write(h, RC632_REG_CW_CONDUCTANCE, 0x3f);
1635 ret = rc632_reg_write(h, RC632_REG_MOD_CONDUCTANCE, 0x11);
1639 ret = rc632_reg_write(h, RC632_REG_CODER_CONTROL,
1640 (RC632_CDRCTRL_RATE_15693 |
1641 RC632_CDRCTRL_TXCD_ICODE_STD |
1646 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH, 0x3f);
1650 ret = rc632_reg_write(h, RC632_REG_MOD_WIDTH_SOF, 0x3f);
1653 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL1,
1654 (RC632_RXCTRL1_SUBCP_16|
1655 RC632_RXCTRL1_ISO15693|
1656 RC632_RXCTRL1_GAIN_35DB));
1659 ret = rc632_reg_write(h, RC632_REG_DECODER_CONTROL,
1660 (RC632_DECCTRL_RX_INVERT|
1661 RC632_DECCTRL_RXFR_15693));
1665 ret = rc632_reg_write(h, RC632_REG_BIT_PHASE, 0xbd);
1669 ret = rc632_reg_write(h, RC632_REG_RX_THRESHOLD, 0xff);
1673 ret = rc632_reg_write(h, RC632_REG_BPSK_DEM_CONTROL, 0x00);
1677 ret = rc632_reg_write(h, RC632_REG_RX_CONTROL2,
1678 RC632_RXCTRL2_DECSRC_INT);
1682 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY, 0x00);
1686 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_LSB, 0x12);
1690 ret = rc632_reg_write(h, RC632_REG_CRC_PRESET_MSB, 0xe0);
1697 struct mifare_authcmd {
1699 u_int8_t block_address;
1700 u_int32_t serno; /* lsb 1 2 msb */
1701 } __attribute__ ((packed));
1704 #define RFID_MIFARE_KEY_LEN 6
1705 #define RFID_MIFARE_KEY_CODED_LEN 12
1707 /* Transform crypto1 key from generic 6byte into rc632 specific 12byte */
1709 rc632_mifare_transform_key(const u_int8_t *key6, u_int8_t *key12)
1715 for (i = 0; i < RFID_MIFARE_KEY_LEN; i++) {
1716 ln = key6[i] & 0x0f;
1718 key12[i * 2 + 1] = (~ln << 4) | ln;
1719 key12[i * 2] = (~hn << 4) | hn;
1725 rc632_mifare_set_key(struct rfid_asic_handle *h, const u_int8_t *key)
1727 u_int8_t coded_key[RFID_MIFARE_KEY_CODED_LEN];
1731 ret = rc632_mifare_transform_key(key, coded_key);
1735 /* Terminate probably running command */
1736 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_IDLE);
1740 ret = rc632_fifo_write(h, RFID_MIFARE_KEY_CODED_LEN, coded_key, 0x03);
1744 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_LOAD_KEY);
1748 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1752 ret = rc632_reg_read(h, RC632_REG_ERROR_FLAG, ®);
1756 if (reg & RC632_ERR_FLAG_KEY_ERR)
1763 rc632_mifare_auth(struct rfid_asic_handle *h, u_int8_t cmd, u_int32_t serno,
1767 struct mifare_authcmd acmd;
1770 if (cmd != RFID_CMD_MIFARE_AUTH1A && cmd != RFID_CMD_MIFARE_AUTH1B) {
1771 DEBUGP("invalid auth command\n");
1775 /* Initialize acmd */
1776 acmd.block_address = block & 0xff;
1777 acmd.auth_cmd = cmd;
1778 //acmd.serno = htonl(serno);
1783 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1784 RC632_CR_RX_CRC_ENABLE);
1786 /* Clear Rx CRC, Set Tx CRC and Odd Parity */
1787 ret = rc632_reg_write(h, RC632_REG_CHANNEL_REDUNDANCY,
1788 RC632_CR_TX_CRC_ENABLE | RC632_CR_PARITY_ODD |
1789 RC632_CR_PARITY_ENABLE);
1794 /* Send Authent1 Command */
1795 ret = rc632_fifo_write(h, sizeof(acmd), (unsigned char *)&acmd, 0x03);
1799 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT1);
1801 DEBUGP("error during AUTHENT1");
1805 /* Wait until transmitter is idle */
1806 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1810 ret = rc632_reg_read(h, RC632_REG_SECONDARY_STATUS, ®);
1814 DEBUGP("bitframe?");
1819 ret = rc632_clear_bits(h, RC632_REG_CHANNEL_REDUNDANCY,
1820 RC632_CR_TX_CRC_ENABLE);
1824 /* Send Authent2 Command */
1825 ret = rc632_reg_write(h, RC632_REG_COMMAND, RC632_CMD_AUTHENT2);
1829 /* Wait until transmitter is idle */
1830 ret = rc632_wait_idle(h, RC632_TMO_AUTH1);
1834 /* Check whether authentication was successful */
1835 ret = rc632_reg_read(h, RC632_REG_CONTROL, ®);
1839 if (!(reg & RC632_CONTROL_CRYPTO1_ON)) {
1840 DEBUGP("authentication not successful");
1847 /* transceive regular frame */
1849 rc632_mifare_transceive(struct rfid_asic_handle *handle,
1850 const u_int8_t *tx_buf, unsigned int tx_len,
1851 u_int8_t *rx_buf, unsigned int *rx_len,
1852 u_int64_t timeout, unsigned int flags)
1855 u_int8_t rxl = *rx_len & 0xff;
1857 DEBUGP("entered\n");
1858 memset(rx_buf, 0, *rx_len);
1861 ret = rc632_reg_write(handle, RC632_REG_CHANNEL_REDUNDANCY,
1862 (RC632_CR_PARITY_ENABLE |
1863 RC632_CR_PARITY_ODD |
1864 RC632_CR_TX_CRC_ENABLE |
1865 RC632_CR_RX_CRC_ENABLE));
1867 ret = rc632_clear_bits(handle, RC632_REG_CHANNEL_REDUNDANCY,
1868 RC632_CR_RX_CRC_ENABLE|RC632_CR_TX_CRC_ENABLE);
1873 ret = rc632_transceive(handle, tx_buf, tx_len, rx_buf, &rxl, 0x32, 0);
1882 const struct rfid_asic rc632 = {
1883 .name = "Philips CL RC632",
1884 .fc = ISO14443_FREQ_CARRIER,
1887 .power_up = &rc632_power_up,
1888 .power_down = &rc632_power_down,
1889 .rf_power = &rc632_rf_power,
1890 .transceive = &rc632_iso14443ab_transceive,
1892 .init = &rc632_iso14443a_init,
1893 .transceive_sf = &rc632_iso14443a_transceive_sf,
1894 .transceive_acf = &rc632_iso14443a_transceive_acf,
1895 .set_speed = &rc632_iso14443a_set_speed,
1898 .init = &rc632_iso14443b_init,
1901 .init = &rc632_iso15693_init,
1902 .transceive_ac = &rc632_iso15693_transceive_ac,
1905 .setkey = &rc632_mifare_set_key,
1906 .auth = &rc632_mifare_auth,